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| PMC-Sierra,Inc. PM5316 SPECTRA-4x155 Quad Channel 155 Mbit/s SONET/SDH Framer and Aligner FEATURES * Monolithic four channel SONET/SDH Payload Extractor/Aligner for use in STS-3 (STM-1/AU-3) or STS-3c (STM1/AU-4) interface applications, operating at serial interface speeds of 155.52 Mbit/s. * Provides integrated clock recovery and clock synthesis to allow direct interface to optical modules. * Each channel provides termination for SONET Section and Line, SDH Regenerator Section and Multiplexer Section transport overhead, and path overhead of three STS-1 (STM-0/AU3) paths or a single STS-3c (STM1/AU-4) path. * Each channel maps three STS-1 (STM-0/AU-3) payloads or a single STS-3c (STM-1/AU-4) payload to system timing reference, accommodating plesiosynchronous timing offsets between the references through pointer processing. * The entire SONET/SDH transport and path overheads are extracted to and inserted from dedicated pins. * Frames to the SONET/SDH receive stream and inserts framing bytes and STS identification into the transmit stream and processes or inserts the transport overhead. * Interprets or generates the STS (AU) pointer bytes (H1, H2, H3), extracts or inserts the synchronous payload envelope(s) and processes or inserts the path overhead. * Supports Automatic Protection Switching (APS): * Ring control port communication of path REI and path RDI alarms; * Filters the APS channel (K1,K2) bytes into internal registers; inserts the APS channel into the transmit stream. * Provides Time Slot Interchange (TSI) function at the ADD and DROP TelecomBus Interfaces for grooming twelve STS-1 (STM-0/AU-3) paths. * Supports line loopback from the line side receive stream to the transmit stream and diagnostic loopback from an ADD TelecomBus interface to a DROP TelecomBus interface. * Provides a standard five signal P1149.1 JTAG test port for boundary scan board test purposes. * Provides a generic 8-bit microprocessor bus interface for configuration, control, and status monitoring. * Low power 3.3 V CMOS with TTL compatible digital inputs and CMOS/TTL digital outputs. * Industrial temperature range (-40C to +85C). * 520 pin Super BGA package. * Supports clock recovery bypass for use in applications where external clock recovery is desired. * Complies with Bellcore GR-253-CORE jitter tolerance, jitter transfer, and intrinsic jitter criteria. BLOCK DIAGRAM Transmit Transport O/H Clock Synthesis Control and Status Information Transmit Path Overhead Tx Path O/H Controller Channel Line Side Top x 4 Path Processing Slice x 12 Tx Transport Overhead Controller Tx Ring Control Port Tx ReMulitplexer Tx Path O/H Processor Tx Telecom Aligner Add Bus Tx Pointer PRBS Interpreter Generator/ (STS/ Monitor AU-TU3) Tx Timeslot Interchange 4 x Serial 155.52 Mbit/s Tx Line Interface Tx Section OH Processor Tx TelecomBus System Interface Tx Line OH Processor Transmit Path Processing Slice 8-bit x 77.76 Mbit/s TelecomBus OR 4 x 8-bit x 19.44 Mbit/s TelecomBus Section Trace Buffer Rx APS Synchronization Extractor and Bit Error Monitor Rx Line OH Processor Path Trace Buffer PMON Rx DeMulitplexer 4 x Serial 155.52 Mbit/s Rx Line Interface Clock and Data Recovery Rx Section OH Processor Rx Path O/H Processor Rx Telecom Aligner Drop Bus PRBS Generator/ Monitor Rx Timeslot Interchange Rx TelecomBus System Interface 8-bit x 77.76 Mbit/s TelecomBus OR 4 x 8-bit x 19.44 Mbit/s TelecomBus Receive Path Processing Slice WAN Synchronization Controller Rx Transport Overhead Controller Rx Ring Control Port Rx Path O/H Controller DPAIS and TPAIS Microprocessor Interface JTAG Test Access Port Receive O/H Clock, Frame Pulse, Receive Transport Overhead Control and Status Information Receive Path Overhead Path AIS Signals 8-bit Microprocessor Bus Test Data PMC-2000327 (R2) PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS' INTERNAL USE (c) Copyright PMC-Sierra, Inc. 2001 PM5316 SPECTRA-4x155 Quad Channel 155 Mbit/s SONET/SDH Framer and Aligner APPLICATIONS * Channelized STS-3/STM-1 Interfaces for: * Optical Cross Connects; * Digital Cross Connects; * Router and Switch Line Cards; * ADM Aggregate Cards for TDM and Multi-service applications; * Terminal Multiplexers. TYPICAL APPLICATIONS STS-3/STM-0 APPLICATION WITH VT/TU POINTER PROCESSING/ALIGNMENT 8-bit x 77.76 Mbit/s 155.52 Mbit/s Optical Interface RXD1+/Optical Transceiver SD1 TXD1+/- ACK AD[31:0], ADP[4:1] AJ0J1[4:1] PM5316 SPECTRA-4x155 APL[4:1] 155.52 Mbit/s Optical Interface RXD2+/Optical Transceiver SD2 TXD2+/- 155.52 Mbit/s Optical Interface RXD3+/Optical Transceiver SD3 TXD3+/DD[31:0], DDP[4:1] DJ0J1[4:1] ID[7:0], IDP OD[7:0], ODP OTV5 IC1J1 IPL To VT/TU Cross-Connect or Tributary Cards 155.52 Mbit/s Optical Interface RXD4+/Optical Transceiver SD4 TXD4+/- DPL[4:1] DCK PM5363 OTPL TUPP+622 SCLK TPOH Drop Add 16 X STS-3/STM-0 APPLICATION WITH POS/ATM PROCESSING 155.52 Mbit/s Optical Interface RXD1+/Optical Transceiver SD1 TXD1+/ACK AD[31:0], ADP[4:1] AJ0J1[4:1] APL[4:1] 155.52 Mbit/s Optical Interface RXD2+/Optical Transceiver SD2 TXD2+/- PM5316 SPECTRA-4x155 PM7390 S/UNI-MACH48 POS-PHY Level 3/ UTOPIA Level 3 155.52 Mbit/s Optical Interface RXD3+/Optical Transceiver SD3 TXD3+/- DD[31:0], DDP[4:1] DJ0J1[4:1] DPL[4:1] To a Datalink Layer Device 155.52 Mbit/s Optical Interface RXD4+/Optical Transceiver SD4 TXD4+/- DCK DFP x4 Head Office: PMC-Sierra, Inc. #105 - 8555 Baxter Place Burnaby, B.C. V5A 4V7 Canada Tel: 604.415.6000 Fax: 604.415.6200 To order documentation, send email to: document@pmc-sierra.com or contact the head office, Attn: Document Coordinator All product documentation is available on our web site at: http://www.pmc-sierra.com For corporate information, send email to: info@pmc-sierra.com PMC-2000327 (R2) (c) Copyright PMC-Sierra, Inc. 2001. SPECTRA is a trademark of PMC-Sierra, Inc. All rights reserved. PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS' INTERNAL USE |
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