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ACX704AKM
9.60cm (3.78 Type) QVGA Reflective Color LCD Module
Description The ACX704AKM is a 9.60cm diagonal, QVGA formatted active matrix reflective color TFT-LCD with a high performance front light unit. This panel provides ultra-high reflectivity (30% typ.) with high contrast ratio (25:1 typ.). These characteristics are realized by a newly developed reflective electrode structure. In addition, this panel provides low power consumption (20mW typ.) which is realized by builtin 4-bit digital interface circuitry addressed by low temperature polycrystalline silicon transistors. Features * Number of dots: 320 x RGB x 240 * Dot size: 80m x 240m * High reflectivity: 30% (typ.) * High contrast ratio: 25:1 (typ.) * Number of colors: 4096 * Low power consumption: 20mW (typ.) * Built-in 4-bit digital interface circuitry * Compact size * Thin and bright front light unit Element Structure * Active matrix TFT-LCD panel with built-in peripheral driving circuitry using low temperature polycrystalline silicon transistors * Number of dots Total number of dots: 322 x 3 (H) x 242 (V) = 233,772 Number of active dots: 320 x 3 (H) x 240 (V) = 230,400 * Dimensions Module dimensions: 96.8 (W) x 73.0 (D) x 3.96 (H) (mm) Effective display dimensions: 76.800 (H) x 57.600 (V) (mm) Applications PDA, etc.
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
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E00813
ACX704AKM
Block Diagram The panel block diagram is shown below.
TEST4, TEST5 TEST3 R01 to 31, XR01 to 31, G01 to 31, XG01 to 31, B01 to 31, XB01 to 31 VCOM VVDD, VVSS1, VVSS2 VST, XVST, ENB, XENB, VCK, XVCK TEST1, TEST2 RESET HVDD, HVSS1, HVSS2 HCK1, XHCK1, HCK2, XHCK2, HST1, XHST1, HST2, XHST2 OE1, XOE1, OE2, XOE2 V1, V2, V3, V4, V5, V6, V7, V8 R02 to 32, XR02 to 32, G02 to 32, XG02 to 32, B02 to 32, XB02 to 32 TEST6, TEST7 Horizontal Driver with Level Shifters Vertical Driver with Level Shifters
Horizontal Driver with Level Shifters
Display Area 320 x RGB x 240
Pin Location of Panel Block The FPC pin assignment is described in the page 4. The location of Pin 1 is shown below.
Pin 90 FPC Pin 1
Active Area
Front View
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ACX704AKM
Absolute Maximum Ratings (HVSS1, VVSS1 = 0V) * H driver supply voltage 1 HVDD * V driver supply voltage 1 VVDD * H driver supply voltage 2 HVSS2 * V driver supply voltage 2 VVSS2 * Power-on reset input pin voltage RESET * Vcom input pin voltage VCOM * Reference voltage input pin voltage V0, V1, V2, V3, V4, V5, V6, V7, V8 * H driver pulse input pin voltage HST1, XHST1, HST2, XHST2, HCK1, XHCK1, HCK2, XHCK2, OE1, XOE1, OE2, XOE2, TEST4, TEST5 * V driver pulse input pin voltage VST, XVST, VCK, XVCK, ENB, XENB, TEST6, TEST7 * Data signal input pin voltage Rnm, XRnm, Gnm, XGnm, Bnm, XBnm (n = 0, 1, 2, 3, m = 1, 2) * Operating temperature Topr * Storage temperature Tstg
-1.0 to +10.5 -1.0 to +10.5 -7.5 to +1.0 -7.5 to +1.0 -1.0 to +10.5 -1.0 to +10.5 -1.0 to +10.5 -1.0 to +10.5
V V V V V V V V
-1.0 to +10.5 -1.0 to +10.5 -10 to +40 -30 to +60
V V C C
Power Consumption Less than 35mW (typ. 20mW) excluding the front light and supporting circuitry on the typical operating condition.
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ACX704AKM
Pin Description of Panel Block
Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 Symbol TEST4 TEST5 TEST3 R31 R21 R11 R01 G31 G21 G11 G01 B31 B21 B11 B01 XR31 XR21 XR11 XR01 XG31 XG21 XG11 XG01 XB31 XB21 XB11 XB01 VCOM VVDD VVSS1 VVSS2 VST XVST ENB XENB Description Test input Test input Test output Data input Data input Data input Data input Data input Data input Data input Data input Data input Data input Data input Data input Data input Data input Data input Data input Data input Data input Data input Data input Data input Data input Data input Data input Common voltage Power supply GND Power supply Pulse input Pulse input Pulse input Pulse input Comment Connected to 0V Connected to 3.3V No connection Pin No. 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 Symbol VCK XVCK TEST1 TEST2 RESET HVDD HVSS1 HVSS2 HCK1 XHCK1 HCK2 XHCK2 HST1 XHST1 HST2 XHST2 OE1 XOE1 OE2 XOE2 V0 V1 V2 V3 V4 V5 V6 V7 V8 XB02 XB12 XB22 XB32 XG02 XG12 Description Pulse input Pulse input Test output Test output Power-on reset Power supply GND Power supply Pulse input Pulse input Pulse input Pulse input Pulse input Pulse input Pulse input Pulse input Pulse input Pulse input Pulse input Pulse input Reference voltage Reference voltage Reference voltage Reference Voltage Reference voltage Reference voltage Reference voltage Reference voltage Reference voltage Data input Data input Data input Data input Data input Data input No connection No connection Connected to R/C Comment
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ACX704AKM
Pin No. 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90
Symbol XG22 XG32 XR02 XR12 XR22 XR32 B02 B12 B22 B32 G02 G12 G22 G32 R02 R12 R22 R32 TEST6 TEST7
Description Data input Data input Data input Data input Data input Data input Data input Data input Data input Data input Data input Data input Data input Data input Data input Data input Data input Data input Test input Test input
Comment
Connected to 0V Connected to 3.3V
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ACX704AKM
Input Equivalent Circuits of Panel Block To prevent static charges, protective diodes are provided for each pin except the power supplies. In addition, protective resistors are added to all pins except the reference input pins, data input pins, HCK1, XHCK1, HCK2 and XHCK2. Reference input pins and VCOM are connected to HVSS1 with a high resistance of 2M (typ.). The equivalent circuit of each pin is shown below. (Resistor value: typ.) (1) TEST4, TEST5
HVDD 180 TEST4 180 TEST5 Level conversion circuit x 2 HVDD
HVSS1
HVSS1
(2) TEST3
HVDD 40 TEST3 SW Signal line
HVSS1
(3) Data, XData
HVDD HVDD
Data XData
Sampling latch circuits
Data means Rmn, Gmn, Bmn. (n = 0, 1, 2, 3, m = 1, 2) XData means XRmn, XGmn, XBmn. (n = 0, 1, 2, 3, m = 1, 2)
HVSS1
HVSS1
(4) VCOM
HVDD
VCOM 2M HVSS1 HVSS1 Cs LC
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ACX704AKM
(5) VVSS2
V driver and level conversion circuits
VVSS2 2M HVSS1
(6) VST, XVST
VVDD 850 VST 850 XVST Level conversion circuit x 2 VVDD
VVSS1
VVSS1
(7) ENB, XENB
VVDD 850 EBN 850 XEBN Level conversion circuit x 1 VVDD
VVSS1
VVSS1
(8) VCK, XVCK
VVDD 40 VCK 40 XVCK V driver
VVSS1
(9) TEST1, TEST2
VVDD 40 TEST1 TEST2 VVDD HVDD 40 HVDD
VVSS1
VVSS1
HVSS1
HVSS1
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ACX704AKM
(10) RESET
HVDD 40 RESET H driver, V driver and level conversion circuits
HVSS1
(11) HCKn, XHCKn (n = 1, 2)
HVDD
HCKn H driver XHCKn
HVSS1
(12) HSTn, XHSTn (n = 1, 2)
HVDD 180 HSTn 180 XHSTn Level conversion circuit x 4 HVDD
HVSS1
HVSS1
(13) OEn, XOEn (n = 1, 2)
HVDD 850 OEn 850 XOEn Level conversion circuit x 2 HVDD
HVSS1
HVSS1
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ACX704AKM
(14) Reference voltage input V0-V8
HVDD
V0 2M V1 450 450 V2 450 450 V3 450 450 V4 450 450 V5 450 450 V6 450 450 V7 450 450 V8 2M 2M 2M 2M 2M 2M Decoder 2M 2M
HVSS1
HVSS1
(15) TEST6, TEST7
VVDD 850 TEST6 850 TEST7 Level conversion circuit x 1 VVDD
VVSS1
VVSS1
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ACX704AKM
Operating Condition Item Supply voltage 1 Supply voltage 2 Supply voltage 3 Supply voltage 4 Reset voltage Data/pulse input (Low) Data/pulse input (High) Common voltage center Common voltage swing Reference voltage 1 Reference voltage 2 Vertical frequency Horizontal frequency Data frequency VCOM rise time VCOM fall time V0-V8 rise time V0-V8 fall time Data rise time Data fall time HST rise time HST fall time HCK rise time HCK fall time OE1 pulse rise time OE1 pulse fall time OE2 pulse rise time OE2 pulse fall time VST pulse rise time VST pulse fall time VCK pulse rise time VCK pulse fall time ENB pulse rise time ENB pulse fall time HCK duty Cross point time lag Data setup time 1 Data setup time 2 Symbol HVDD VVDD HVSS2 VVSS2 Vreset VIL VIH VcomC VcomA Vref1 Vref2 fv fh fdot trvcom tfvcom trvn tfvn trdata tfdata trhst tfhst trhck tfhck troe1 tfoe1 troe2 tfoe2 trvst tfvst trvck tfvck trenb tfenb Dhck tdcross tstp1 tstp2 48 -15 35 35 50 0 50 50 - 10 - 0.0 0.5 60 15.84 2.79 5.0 5.0 4.5 65 17.16 3.02 12.5 12.5 12.5 12.5 40 40 30 30 30 30 60 60 60 60 60 60 60 60 80 80 52 15 120 120 Min. 8.5 8.5 -7.0 -7.0 HVDD - 0.1 -0.3 3.0 Typ. 9.0 9.0 -6.5 -6.5 HVDD 0.0 3.3 Max. 9.5 9.5 -6.0 -6.0 HVDD + 0.1 0.3 3.6 Unit V V V V V V V V V V V Hz kHz MHz s s s s ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns % ns ns ns VCOM VCOM 4 4 5 5 HST1, XHST1, HST2, XHST2 HST1, XHST1, HST2, XHST2 HCK1, XHCK1, HCK2, XHCK2 HCK1, XHCK1, HCK2, XHCK2 OE1, XOE1 OE1, XOE1 OE2, XOE2 OE2, XOE2 VST, XVST VST, XVST VCK, XVCK VCK, XVCK ENB, XENB ENB, XENB 6 7 8 8 HVDD VVDD HVSS2 VVSS2 RESET, 1 2 2 VCOM, 3 VCOM V0, V1, V8 V2, V3, V4, V5, V6, V7 Pin/Remark
ACX704AKM
1 Connect the resistor and capacitor to the RESET pin as shown in the figure below.
The external C and R value differs according to the rising time of the panel supply voltage.
RESET C R HVDD HVDD ACX704AKM
HVDD Voltage [V]
HVDD, VVDD RESET
5V HVDD-RESET VVDD-RESET Time treset Set a C value that satisfies treset > 1ms.
2 This is applied to the following pins. R31, R21, R11, R01, G31, G21, G11, G01, B31, B21, B11, B01, XR31, XR21, XR11, XR01, XG31, XG21, XG11, XG01, XB31, XB21, XB11, XB01, R32, R22, R12, R02, G32, G22, G12, G02, B32, B22, B12, B02, XR32, XR22, XR12, XR02, XG32, XG22, XG12, XG02, XB32, XB22, XB12, XB02, HST1, XHST1, HST2, XHST2, HCK1, XHCK1, HCK2, XHCK2, OE1, XOE1, OE2, XOE2, VST, XVST, VCK, XVCK, ENB, XENB, TEST4, TEST5, TEST6, TEST7 3 Common voltage center VcomC should be adjusted so as to minimize flicker or maximum contrast every each module. 4 This is applied to the following pins. V0, V1, V2, V3, V4, V5, V6, V7, V8 5 This is applied to the following pins. R31, R21, R11, R01, G31, G21, G11, G01, B31, B21, B11, B01, XR31, XR21, XR11, XR01, XG31, XG21, XG11, XG01, XB31, XB21, XB11, XB01, R32, R22, R12, R02, G32, G22, G12, G02, B32, B22, B12, B02, XR32, XR22, XR12, XR02, XG32, XG22, XG12, XG02, XB32, XB22, XB12, XB02 6 This is applied to the following pins. HCK1, XHCK1, HCK2, XHCK2 7 This is applied to the following pins. HST1, XHST1, HST2, XHST2, HCK1, XHCK1, HCK2, XHCK2 8 This is applied to the following pins. R31, R21, R11, R01, G31, G21, G11, G01, B31, B21, B11, B01, XR31, XR21, XR11, XR01, XG31, XG21, XG11, XG01, XB31, XB21, XB11, XB01, R32, R22, R12, R02, G32, G22, G12, G02, B32, B22, B12, B02, XR32, XR22, XR12, XR02, XG32, XG22, XG12, XG02, XB32, XB22, XB12, XB02, HCK1, XHCK1, HCK2, XHCK2 - 11 -
ACX704AKM
Input Waveforms Item VCOM rise time Symbol trvcom
VCOM 0% 10% tfvcom
Waveform
90% 100%
Conditions
VCOM fall time
tfvcom
trvcom
V0-V8 rise time
trvn
V0, V1, V2, V3, V4, V5, V6, V7, V8 0%
90%
100%
10% trvn tfvn
V0-V8 fall time
tfvn
Data rise time
trdata
Data 0%
90%
100%
10% tfdata
Data fall time
tfdata
trdata
HST rise time
trhst
HST1, XHST1, HST2, XHST2 0%
90%
100%
10% trhst tfhst
HST fall time
tfhst
HCK rise time
trhck
HCK1, XHCK1, HCK2, XHCK2 0%
90%
100%
10% trhck tfhck
HCK fall time
tfhck
OE1 pulse rise time
troe1
OE1, XOE1 0%
90%
100%
10% troe1 tfoe1
OE1 pulse fall time
tfoe1
OE2 pulse rise time
troe2
OE2, XOE2 0%
90%
100%
10% troe2 tfoe2
OE2 pulse fall time
tfoe2
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ACX704AKM
Item VST pulse rise time
Symbol trvst
VST, XVST 0% 90%
Waveform
100%
Conditions
10% trvst tfvst
VST pulse fall time
tfvst
VCK pulse rise time
trvck
VCK, XVCK 0%
90%
100%
10% trvck tfvck
VCK pulse fall time
tfvck
ENB pulse rise time
trenb
ENB, XENB 0%
90%
100%
10% trenb tfenb
ENB pulse fall time
tfenb
HCK duty
Dhck
HCKn, XHCKn
50%
50%
50%
thckh thckl Dhck = thck/(thckh + thckl) x 100%
HCKn
50%
50%
XHCKn tdc1
50%
50% tdc2 tdc4
Cross-point time lag
tdcross
HSTn
tdc3 50%
50% tdc6
XHSTn
50% tdc5
50%
tdcross = Maximum (tdc1, tdc2, tdc3, tdc4, tdc5, tdc6)
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ACX704AKM
Item
Symbol
Waveform
Conditions
HCK1
50% 50% 50% 50%
50% 50% 50% 50%
Data setup time 1
tstp1
XHCK1 HCK2
XHCK2
tstp1a tstp2a tstp1b tstp2b
Data setup time 2
tstp2
Data, XData
50%
50%
50%
50%
tstp1 = Maximum (tstp1a, tstp1b) tstp2 = Maximum (tstp2a, tstp2b)
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Horizontal Timing Chart
Data start 11
311
321
331
341
352 351 1
Dot clock1 314 316 318 320 BLK 2 4 6
R01 to R31, G01 to G31, B01 to B31 313 315 317 319 BLK 1 3 5
R02 to R32, G02 to G32, B02 to B32
HST12
HCK12
HST22
HCK22
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OE12
OE22
ENB2
VCK2 Once a vertical period
VST2
VCOM3
5V 0V
V0-V84
VH VL
ACX704AKM
1 2 3 4
This clock is not a signal for LCD panel. Inverted pulse is required for every data/pulse input except for VCOM, V0, V1, V2, V3, V4, V5, V6, V7 and V8. VCOM should be inverted every horizontal and every vertical cycle. V0-V8 should be inverted every horizontal and every vertical cycle.
Vertical Timing Chart
241
251
261
264 1 Data start 11 21 31
HD1 BLK 1
DATA
240
VST2
VCK2
ENB2
HST2
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OE12
OE22
VCOM3
5V
V0-V84
VH
0V
VL
1 2 3 4
This clock is not a signal for LCD panel. Inverted pulse is required for every data/pulse input except for VCOM, V0, V1, V2, V3, V4, V5, V6, V7 and V8. VCOM should be inverted every horizontal and every vertical cycle. V0-V8 should be inverted every horizontal and every vertical cycle. ACX704AKM
ACX704AKM
Operating Condition of Front Light Item Voltage Current Vstart Frequency Power Consumption Symbol VL IL VS F P Typ. 335 35 1.4 520 780 60 0.5 Unit Vrms mArms Vrms Vrms kHz W
(Ta = 25C) Conditions 25C 25C 25C 0C 25C 25C
These items shall depend on the used inverter.
Lamp Life The lamp life shall be grater than 10,000 hours. The operating lamp life is defined as having ended when the illumination of light has reached 50% of the initial value.
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ACX704AKM
Electrical Characteristics HVDD = VVDD = 9V, HVSS1 = VVSS1 = 0V, HVSS2 = VVSS2 = -6.5V, VIH = 3.3V, VIL = 0V, Ta = 25C Item HVDD current consumption VVDD current consumption HVSS2 current consumption VVSS2 current consumption Symbol I (HVDD) I (VVDD) I (HVSS2) I (VVSS2) Min. -- -- -- -- Typ. 1.6 0.05 0.7 0.01 Max. 2.6 0.2 1.4 0.1 Unit mA mA mA mA HVDD VVDD HVSS2 VVSS2 Pin
HST input pin capacitance HCK input pin capacitance OE input pin capacitance Data input pin capacitance VCK input pin capacitance VST input pin capacitance EBN input pin capacitance VCOM input pin capacitance V0-V8 input pin capacitance
Chst Chck Coe Cdata Cvck Cvst Cenb Cvcom Cvn
-- -- -- -- -- -- -- -- --
70 120 40 45 70 55 45 33 25
100 150 60 70 100 85 70 40 40
pF pF pF pF pF pF pF nF nF
HST1, XHST1, HST2, XHST2 HCK1, XHCK1, HCK2, XHCK2 OE1, XOE1, OE2, XOE2 1 VCK, XVCK VST, XVST ENB, XENB VCOM V0, V1, V2, V3, V4, V5, V6, V7, V8
HST input pin current HCK input pin current OE input pin current Data input pin current VST input pin current VCK input pin current EBN input pin current
Ihst Ihck Ioe Idata Ivst Ivck Ienb
-50 -1000 -100 -10 -10 -25 -25
-10 -200 -20 -2 -2 -5 -5
-- -- -- -- -- -- --
A A A A A A A
HST1, XHST1, HST2, XHST2 HCK1, XHCK1, HCK2, XHCK2 OE1, XOE1, OE2, XOE2 1 VCK, XVCK VST, XVST ENB, XENB
1 This is applied to the following pins. R31, R21, R11, R01, G31, G21, G11, G01, B31, B21, B11, B01, XR31, XR21, XR11, XR01, XG31, XG21, XG11, XG01, XB31, XB21, XB11, XB01, R32, R22, R12, R02, G32, G22, G12, G02, B32, B22, B12, B02, XR32, XR22, XR12, XR02, XG32, XG22, XG12, XG02, XB32, XB22, XB12, XB02
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ACX704AKM
Gray Scale Table Data input Color 0 (Black) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 (White) R31 R32 L L L L L L L L H H H H H H H H R21 R22 L L L L H H H H L L L L H H H H R11 R12 L L H H L L H H L L H H L L H H R01 R02 L H L H L H L H L H L H L H L H G31 G32 L L L L L L L L H H H H H H H H G21 G22 L L L L H H H H L L L L H H H H G11 G12 L L H H L L H H L L H H L L H H G01 G02 L H L H L H L H L H L H L H L H B31 B32 L L L L L L L L H H H H H H H H B21 B22 L L L L H H H H L L L L H H H H B11 B12 L L H H L L H H L L H H L L H H B01 B02 L H L H L H L H L H L H L H L H
Xdata input Color 0 (Black) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 (White) XR31 XR21 XR11 XR01 XG31 XG21 XG11 XG01 XB31 XR32 XR22 XR12 XR02 XG32 XG22 XG12 XG02 XB32 H H H H H H H H L L L L L L L L H H H H L L L L H H H H L L L L H H L L H H L L H H L L H H L L H L H L H L H L H L H L H L H L H H H H H H H H L L L L L L L L - 19 - H H H H L L L L H H H H L L L L H H L L H H L L H H L L H H L L H L H L H L H L H L H L H L H L H H H H H H H H L L L L L L L L XB21 XB22 H H H H L L L L H H H H L L L L XB11 XB12 H H L L H H L L H H L L H H L L XB01 XB02 H L H L H L H L H L H L H L H L
ACX704AKM
Selected Reference Voltage Levels A voltage level is selected by the combination of the data input. This relations are shown below. Data input1 D3 L L L L L L L L H H H H H H H H D2 L L L L H H H H L L L L H H H H D1 L L H H L L H H L L H H L L H H D0 L H L H L H L H L H L H L H L H Selected voltage level2, 3 V0 V1 (V1 + V2)/2 V2 (V2 + V3)/2 V3 (V3 + V4)/2 V4 (V4 + V5)/2 V5 (V5 + V6)/2 V6 (V6 + V7)/2 V7 (V7 + V8)/2 V8
1 Data input: D3 means R3m, G3m, B3m (m = 1, 2). D2 means R2m, G2m, B2m (m = 1, 2). D1 means R1m, G1m, B1m (m = 1, 2). D0 means R0m, G0m, B0m (m = 1, 2). 2 Selected voltage input: This voltage is applied to display area. See the following page regarding VR characteristics. 3 V0-V8: Reference voltage inputs
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ACX704AKM
Color Coding The color filters are coded in vertical stripe arrangement. The shaded area is used for the dark border around the display.
FPC
B G R B G R
B G R B G R
**************
B G R B G R
B G R B G R
******
B G R B G R
B G R B G R
**************
B G R B G R
B G R B G R
1 x RGB
Active area
320 x RGB
B G R B G R
B G R B G R
B G R B G R
B G R B G R
******
B G R B G R
B G R B G R
B G R B G R
B G R B G R 1 x RGB
1
240
1
Front view
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ACX704AKM
Scanning Direction The scanning direction for the horizontal period and for the vertical period are A and B respectively as shown below. These scanning directions are from a front view.
FPC
A Horizontal direction Active area
Vertical direction B Front view
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ACX704AKM
Color Combination Table Data input Color R31 R32 Black Blue Green Cyan Red Magenta Yellow White L L L L H H H H R21 R22 L L L L H H H H R11 R12 L L L L H H H H R01 R02 L L L L H H H H G31 G32 L L H H L L H H G21 G22 L L H H L L H H G11 G12 L L H H L L H H G01 G02 L L H H L L H H B31 B32 L H L H L H L H B21 B22 L H L H L H L H B11 B12 L H L H L H L H B01 B02 L H L H L H L H
Xdata input Color XR31 XR21 XR11 XR01 XG31 XG21 XG11 XG01 XB31 XR32 XR22 XR12 XR02 XG32 XG22 XG12 XG02 XB32 Black Blue Green Cyan Red Magenta Yellow White H H H H L L L L H H H H L L L L H H H H L L L L H H H H L L L L H H L L H H L L H H L L H H L L H H L L H H L L H H L L H H L L H L H L H L H L XB21 XB22 H L H L H L H L XB11 XB12 H L H L H L H L XB01 XB02 H L H L H L H L
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ACX704AKM
Electro-optical Characteristics Ta = 25C, with front light turning off Item Reflectivity Contrast ratio White chromaticity x y on off Top-Bottom Left-Right V10 V-R characteristic V50 V90 Symbol R CR xfloff yfloff Ton Toff VAtb VAlr V10 V50 V90 Min. 25 19:1 0.29 0.32 -- -- 90 100 1.2 1.8 2.5 Typ. 30 25:1 0.32 0.34 15 20 100 120 1.5 2.1 2.8 Max. -- -- 0.34 0.36 30 30 -- -- 1.8 2.4 3.1 CIE CIE ms ms deg () deg () V V V 6 Unit % Notes 1 2 3
Response time
4
Viewing angle
5
Ta = 25C, with front light turning on Item Luminance Luminance uniformity Contrast ratio White chromaticity x y Symbol Lcfl Flunif CRfl xflon yflon Min. 19 -- 6 0.26 0.276 Typ. 26 1.3 8 0.287 0.301 Max. -- 1.6 -- 0.313 0.326 Unit cd/m2 -- -- CIE CIE Notes 7 8 9 10
Image Persistence Display a completely white screen for 20 minutes then continuously display the test pattern shown below for a minimum of two-hours. Then display a completely white screen. A visible image of the box pattern shall not persist more than two seconds viewed through 2% ND filter. Pattern is black box 80 pixels wide and 160 pixels in length at minimum luminance, centered horizontally and vertically in the active area. The reminder of the screen is white.
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ACX704AKM
Cross Modulation Cross modulation (cross talk) shall be inspected with following test pattern with 2% ND filter. Pattern is black box 80 pixels wide and 160 pixels in length at minimum luminance, centered horizontally and vertically in the active area. The reminder is of the screen is 50% gray.
H/4 H/2 H/4
H/4 H/2
H/4
There shall be no visible difference of luminance around the black box through 2% ND filter.
Notes: 1. Reflectivity (R) In the system-1 (see Fig. 1 (a), (b)), calculate the reflectance factor by using the formula (1). R = R (White) = Output from the "White" displayed panel x reflectance factor of the reflectance standard ...(1) Output from the reflectance standard
2. Contrast Ratio (CR) In the system-1 (see Fig. 1(a), (b)), measure the reflectance factor of "White" and "Black" respectively and calculate by using the formula (2). CR = R (White) R (Black) ...(2)
3. White Chromaticity (xfloff, yfloff) In the system-2 (see Fig. 2), measure the white chromaticity. The illumination source and viewing area are D65 and 2 respectively. 4. Response Time (Ton, Toff) In the system-3 (see Fig. 3), measure the electro-optical response time. 5. Viewing Angle (VAtb, VAlr) In the measurement system-1 (see Fig. 1 (c)), viewing area is defined by the area which makes the CR 2. 6. V-R Characteristic (V90, V50, V10) In the system-1 (see Fig.1 (a), (b)), measure the signal amplitude across the liquid crystal where R (relative) = 90% and R (relative) = 50% and R (relative) = 10% (see Fig. 4). - 25 -
ACX704AKM
7. Luminance (Lcfl) In the measurement system-4 (see Fig. 5), measure the luminance and calculate by using the formula (3). Lcfl = (Luminance (1) + Luminance (3) + Luminance (5) + Luminance (7) + Luminance (9)) / 5 ...(3) 8. Luminance Uniformity (Flunif) In the measurement system-4 (see Fig. 5), measure the luminance and calculate by using the formula (4). Flunif = Luminance (maximum spot) / Luminance (minimum spot) ...(4) 9. Contrast Ratio (CRfl) In the measurement system-4 (see Fig. 5(a)), measure the luminance of "White" and "Black" respectively and calculate by using the formula (5). CRfl = Luminance (White) ...(5) Luminance (Black)
10. White Chromaticity (xflon, yflon) In the system-4 (see Fig. 5(a)), measure the white chromaticity.
Basic Measurement Condition (1) Driving voltage typical condition (2) Measurement temperature +25C unless otherwise specified. (3) Measurement point One point on the center of the panel unless otherwise specified. (4) Light source and viewing area D65 and 2 (5) Display "White": All R, G and B signal data are high (signal amplitude across the liquid crystal: 0.5V). Display "Black": All R, G and B signal data are low (signal amplitude across the liquid crystal: 4.8V). Front light is turned off unless otherwise specified.
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ACX704AKM
Optical Fiber
Optical Detector
Mearurement Equipment
Light Source
Driving Circuit
LCD Panel
(a)
= 0 = 30
FPC Side
= 0
FPC Side
L
Top
B
Left
T R
Top
Left
Bottom
Right
Bottom
Right
(b)
(c)
Fig. 1. Measurement System-1
Optical Fiber
Optical Detector
Mearurement Equipment
Light Source
Integrated Sphere LCD Panel
Fig. 2. Measurement System-2
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ACX704AKM
Light Sourse
LCD Panel
30 Oscilloscope Optical Detector
Display Data
White (1111) Ton
Black (0000) Toff
White (1111)
100% 90% Optical Instruments Response 10% 0% Time
Fig. 3. Measurement System-3
100% 90%
Relative Reflectivity
50%
10% 0%
V90
V50
V10
Liquid crystal voltage [V] 1 1 Liquid crystal voltage = | Selected voltage level - Common voltage + Reference voltage center - Common voltage center | See page 20 for "Selected Reference Voltage Levels".
Fig. 4. V-R Characteristics
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ACX704AKM
Illuminance Colorimeter BM-5A
400 50mm
1 Reflective LCD Module
(a) The apparatus for luminance measurement
K K/6 K/3 K/3 K/6
L/6
1 L/3
2
3
L
4 L/3
5
6
FPC
7 L/6
8
9
(b) The spot locations for luminance measurement
Fig. 5. Measurement System-4
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ACX704AKM
System Configuration
+3.3V R01 to 31, XR01 to 31, R02 to 32, XR02 to 32, G01 to 31, XG01 to 31, G02 to 32, XG02 to 32, B01 to 31, XB01 to 31, B02 to 32, XB02 to 32 48
+9.0V
-6.5V
R0, R1, R2, R3, G0, G1, G2, G3, B0, B1, B2, B3 12
CXD3508TQ Hsync, Vsync, MCK 3 HCK1, HCK2, XHCK1, XHCK2, HST1, HST2, XHST1, XHST2, VCK, XVCK, VST, XVST, ENB, XENB, OE1, OE2, XOE1, XOE2 18 LCD ACX704AKM
+5.0V
FRP
V0-V8 9 CXD2475TQ
VCOM
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ACX704AKM
Notes on Handling (1) Static charge prevention Be sure to take the following protective measures. TFT-LCD panels are easily damaged by static charges. a) Use non-chargeable gloves, or simply use bare hands. b) Use an earth-band when handling. c) Do not touch any electrodes of a panel. d) Wear non-chargeable clothes and conductive shoes. e) Install grounded conductive mats on the working floor and working table. f) Keep panels away from any charged materials. g) Use ionized air to discharge the panels. (2) Protection from dust and dirt a) Operate in a clean environment. b) Do not touch the front light surface. The surface is easily scratched. c) Use ionized air to blow dust off the panel. (3) Others a) Do not twist or bend the flexible PC board especially at the connecting region because the board is easily deformed. b) Do not drop the module. c) Do not twist or bend the module. d) Keep the module away from heat sources. e) Do not dampen the module with water or other solvents. f) Avoid storage or use the module at high temperatures or high humidity, as this may result in damage.
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ACX704AKM
Package Outline
Unit: mm
73 (Outer Frame) (Metal Bezel Opening) 62.2 0.15 57.6 (Active Area) (39.6) 28.7 0.08 6.8 9.4 1.6 7 5.4
(6)
1.06 (FPC) 3.96 0.3
Electrode
45
(34.8)
3 5 (38.2)
9.46
5)Mass:56g 4)FPC-connector:FF02(JAE) 3)CCFL-connector:BHSR-02VS-1(JST) 2)The rotation angle of the active area relative to H and V is 1. Note 1)Tolerance with no indication( 0.2)
(10) (8.4) (5) 1
(43.4) (46.8) 76.8 (Active Area) 80 0.15 (MetalBezel Opening) 90.2 (Outer Frame) 96.8 (Outer Frame)
10 8.4 1.6
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PIN1
38 2
Sony Corporation

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