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| Datasheet File OCR Text: |
| CXD3120R (1/3) IL08 SIGNAL PROCESSOR FOR CCD COLOR CAMERAS --TOP VIEW-- 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 PIN NO. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 I/O I I I I O -- I I I I I O O -- O O O I I -- SIGNAL TEST18 TEST19 TEST0 INVI INVO GND TEST20 PIN NO. 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 I/O -- O O O O O O O O -- O O O O O O O O -- I SIGNAL GND DOC7 DOC6 DOC5 DOC4 DOC3 DOC2 DOC1 DOC0 VCC DOY7 DOY6 DOY5 DOY4 DOY3 DOY2 DOY1 DOY0 GND TSTON PIN NO. 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 I/O -- O O O O O O O -- O O O I I I I I I I I SIGNAL VCC MCKO MCKO14 MFRO MHRO MWEO MCKO32 CDIS GND TEST7 TEST8 TEST9 TEST10 TEST11 TEST12 TEST13 TEST14 TEST15 TEST16 TEST17 PIN NO. 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 I/O -- I O O O I I I -- I I I I I I I I I I -- SIGNAL VCC MCKI32 FRO HRO WEI MCKI DOCNT GND AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0 VCC CLR CE SCK SI SO TEST21 VCC TEST1 TEST2 TEST3 TEST4 TEST5 TEST6 w w w .d ee sh ta a u. t4 om c www..com CLPOB CXD3120R (2/3) INPUTS AD0 - AD9 CE CLR DOCNT INVI MCKI MCKI32 SCK SI WEI OUTPUTS CDIS : : : : : : : : : : DIGITAL SIGNAL DATA CHIP SELECT INITIALIZE TRI-STATE CONTROL INVERTER SYSTEM MAIN CLOCK 3/2 MCKI SERIAL CLOCK SERIAL DATA WRITE ENABLE : : CLPOB DOC0 - DOC7 : DOY0 - DOY7 : FRO : HRO : INVO : MCKO : MCKO14 : MCKO32 : MFRO : MHRO : MWEO : SO : TEST1 - TEST3, TEST21 : TEST7 - TEST9 : OTHERS TEST0 - TEST21 TSTON Cr/Cb LINE IDENTIFICATION TIMING CLAMP PULSE DIGITAL CHROMA DIGITAL Y V SYNC FOR CCD TIMING GENERATOR H SYNC FOR CCD TIMING GENERATOR INVERTER SYSTEM MAIN CLOCK 1/4 MCKO 3/2 MCKO V SYNC H SYNC WRITE ENABLE SERIAL DATA (FOR TEST) OPEN : (FOR TEST) : (FOR TEST) CXD3120R (3/3) AD0 - AD9 70 - 79 10 WRITE BLEMISH COMPENSATION WRITE BLEMISH DETECTION AE DETECTION DIGITAL CLAMP Y SIGNAL PROCESS WRITE BALANCE PEDESTAL DELAY LINE APERTURE + Y GAMMA + WRITE CLIP MPX DATA OUTPUT 31 - 38 DOY0 - DOY7 TEST PATTERN GENERATOR 66 67 62 65 64 63 42 47 43 46 45 44 VERTICAL APERTURE APERTURE HORIZONTAL LPF + CORING & LIMITER HIGH LIGHT APERTURE WEI MCKI MCKI32 AVERAGING AF DETECTION WINDOW GATE INTEGRATION CLPOB HRO FRO MCKO MCKO32 MCKO14 MWEO MHRO MFRO SERIAL FORMAT (8-BIT) SERIAL FORMAT (8-BIT) HORIZONTAL APERTURE CHROMA (ONLY YUV411) SYNC SIGNAL GENERATOR HPF WINDOW GATE PEAK HOLD VERTICAL LPF INTERPOLATION FILTER CHROMA LPF DECIMATION LPF GAMMA WHITE CLIP R-Y/B-Y MATRIX DATA OUTPUT 22 - 29 DOC0 - DOC7 68 AWB DETECTION DOCNT AVERAGING INTEGRATION SERIAL FORMAT (8-BIT) SERIAL OUTPUT FORMAT SERIAL INPUT FORMAT 10 11 9 12 8 SCK SI CE SO CLR |
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