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| ANSALDO Ansaldo Trasporti s.p.a. Unita' Semiconduttori Via N. Lorenzi 8 - I 16152 GENOVA - ITALY Tel. int. +39/(0)10 6556549 - (0)10 6556488 Fax Int. +39/(0)10 6442510 Tx 270318 ANSUSE I - PHASE CONTROL THYRISTOR AT1003 Repetitive voltage up to Mean on-state current Surge current 1600 V 1650 A 26.9 kA FINAL SPECIFICATION feb 97 - ISSUE : 03 Symbol Characteristic Conditions Tj [C] 125 125 125 Value Unit BLOCKING V V V I I RRM RSM DRM RRM DRM Repetitive peak reverse voltage Non-repetitive peak reverse voltage Repetitive peak off-state voltage Repetitive peak reverse current Repetitive peak off-state current V=VRRM V=VDRM 1600 1700 1600 50 50 V V V mA mA 125 125 CONDUCTING I I I V V r T (AV) T (AV) TSM Mean on-state current Mean on-state current Surge on-state current I t On-state voltage Threshold voltage On-state slope resistance 180 sin, 50 Hz, Th=55C, double side cooled 180 sin, 50 Hz, Tc=85C, double side cooled sine wave, 10 ms without reverse voltage On-state current = 2900 A 25 125 125 125 1650 1345 26.9 3618 x1E3 1.45 0.82 0.200 A A kA As V V mohm I t T T(TO) T SWITCHING di/dt dv/dt td tq Q rr I rr I I H L Critical rate of rise of on-state current, min. Critical rate of rise of off-state voltage, min. Gate controlled delay time, typical Circuit commutated turn-off time, typical Reverse recovery charge Peak reverse recovery current Holding current, typical Latching current, typical From 75% VDRM up to 1500 A, gate 10V 5ohm Linear ramp up to 70% of VDRM VD=100V, gate source 25V, 10 ohm , tr=.5 s dV/dt = 20 V/s linear up to 75% VDRM di/dt=-20 A/s, I= 800 A VR= 50 V VD=5V, gate open circuit VD=5V, tp=30s 125 125 25 125 25 25 200 500 1 250 A/s V/s s s C A 300 700 mA mA GATE V I V V I V P P GT GT GD FGM FGM RGM GM G Gate trigger voltage Gate trigger current Non-trigger gate voltage, min. Peak gate voltage (forward) Peak gate current Peak gate voltage (reverse) Peak gate power dissipation Average gate power dissipation VD=5V VD=5V VD=VDRM 25 25 125 3.5 300 0.25 30 10 5 V mA V V A V W W Pulse width 100 s 150 2 MOUNTING R R T F th(j-h) th(c-h) j Thermal impedance, DC Thermal impedance Operating junction temperature Mounting force Mass ORDERING INFORMATION : AT1003 S 16 standard specification Junction to heatsink, double side cooled Case to heatsink, double side cooled 26 6 -30 / 125 18.0 / 20.0 500 C/kW C/kW C kN g VDRM&VRRM/100 AT1003 PHASE CONTROL THYRISTOR FINAL SPECIFICATION feb 97 - ISSUE : 03 ANSALDO DISSIPATION CHARACTERISTICS SQUARE WAVE Th [C] 130 120 110 100 90 30 80 70 60 60 90 120 180 DC 50 0 500 1000 1500 2000 2500 IF(AV) [A] PF(AV) [W] 3000 DC 2500 120 180 90 60 30 2000 1500 1000 500 0 0 500 1000 1500 2000 2500 IF(AV) [A] AT1003 PHASE CONTROL THYRISTOR FINAL SPECIFICATION feb 97 - ISSUE : 03 ANSALDO DISSIPATION CHARACTERISTICS SINE WAVE Th [C] 130 120 110 100 90 30 80 60 70 60 90 120 180 50 0 500 1000 1500 2000 2500 IF(AV) [A] PF(AV) [W] 3000 180 2500 120 90 2000 30 60 1500 1000 500 0 0 500 1000 1500 2000 2500 IF(AV) [A] AT1003 PHASE CONTROL THYRISTOR FINAL SPECIFICATION feb 97 - ISSUE : 03 ANSALDO ON-STATE CHARACTERISTIC Tj = 125 C SURGE CHARACTERISTIC Tj = 125 C 5000 4500 4000 On-state Current [A] 3500 30 25 20 2500 2000 1500 1000 5 500 0 0.6 1.1 1.6 On-state Voltage [V] 0 1 10 n cycles 100 ITSM [kA] TRANSIENT THERMAL IMPEDANCE DOUBLE SIDE COOLED 0.01 0.1 t[s] 1 10 100 Cathode terminal type DIN 46244 - A 4.8 - 0.8 Gate terminal type AMP 60598 - 1 Distributed by 3000 15 10 30.0 25.0 Zth j-h [C/kW] 20.0 15.0 10.0 5.0 0.0 0.001 All the characteristics given in this data sheet are guaranteed only with uniform clamping force, cleaned and lubricated heatsink, surfaces with flatness < .03 mm and roughness < 2 m. In the interest of product improvement ANSALDO reserves the right to change any data given in this data sheet at any time without previous notice. If not stated otherwise the maximum value of ratings (simbols over shaded background) and characteristics is reported. |
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