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ICX282AK
Diagonal 11mm (Type 2/3) Frame Readout CCD Image Sensor with Square Pixel for Color Cameras
Description The ICX282AK is a diagonal 11mm (Type 2/3) interline CCD solid-state image sensor with a square pixel array and 5.07M effective pixels. Frame readout allows all pixels' signals to be output independently within approximately 1/3.75 second. In addition, output is possible using various addition and pulse elimination methods. This chip features an electronic shutter with variable charge-storage time. Adoption of a design specially suited for frame readout ensures a saturation signal level equivalent to that when using field readout. High resolution and high color reproductively are achieved through the use of Ye, Cy, Mg and G complementary color mosaic filters as the color filters. Further, high sensitivity and low dark current are achieved through the adoption of Super HAD CCD technology. This chip is suitable for applications such as electronic still cameras, PC input cameras, etc. 24 pin DIP (Plastic)
Features * High horizontal and vertical resolution * Supports 10 types of readout modes Frame readout mode, 2x speed mode (1), 2x speed mode (2), 8x speed mode, center scan mode (1), center scan mode (2), center scan mode (3), center scan mode (4), AF mode (1), AF mode (2) * Square pixel * Horizontal drive frequency: 22.5MHz * No voltage adjustments (reset gate and substrate bias are not adjusted.) * Ye, Cy, Mg and G complementary color mosaic filters on chip * High sensitivity, low dark current, excellent anti-blooming characteristics * Continuous variable-speed shutter V * Horizontal register, reset gate: 3.3V drive * 24-pin high-precision plastic package
Pin 1 2
Device Structure 12 * Interline CCD image sensor 58 H Pin 13 * Image size: Diagonal 11mm (Type 2/3) * Total number of pixels: 2658 (H) x 1970 (V) approx. 5.24M pixels * Number of effective pixels: 2588 (H) x 1960 (V) approx. 5.07M pixels Optical black position * Number of active pixels: 2580 (H) x 1944 (V) approx. 5.02M pixels (Top View) * Number of recommended recording pixels: 2560 (H) x 1920 (V) approx. 4.92M pixels * Chip size: 9.74mm (H) x 7.96mm (V) * Unit cell size: 3.4m (H) x 3.4m (V) * Optical black: Horizontal (H) direction: Front 12 pixels, rear 58 pixels Vertical (V) direction: Front 8 pixels, rear 2 pixels * Number of dummy bits: Horizontal 28 Vertical 1 (even fields only) * Substrate material: Silicon
8
Super HAD CCD is a registered trademark of Sony Corporation. Super HAD CCD is a CCD that drastically improves sensitivity by introducing newly developed semiconductor technology by Sony Corporation into Sony's high-performance HAD (Hole-Accumulation Diode) sensor. Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
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E01626A31-PS
ICX282AK
Block Diagram and Pin Configuration (Top View)
GND GND V1C V3C V1B V1A V3B V3A
2 Note)
V2
12
11
10
9
8
7
6
5
4
3
Ye G
Cy Mg Cy Mg Cy Mg Cy Mg
Ye G Ye G Ye G Ye G
Cy Mg Cy Mg Cy Mg Cy Mg
Vertical register
Ye G Ye G Ye G
Horizontal register
V4
1
NC
NC
Note) 13 14 15 16 17 18 19 20 21 22 23 24
: Photo sensor
VDD
RG
GND
H2B
H1B
NC
VL
H1A
Pin Description Pin No. Symbol 1 2 3 4 5 6 7 8 9 10 11 12 V4 V3A V3B V3C V2 NC NC V1A V1B V1C GND GND Vertical register transfer clock Vertical register transfer clock Vertical register transfer clock GND GND Description Vertical register transfer clock Vertical register transfer clock Vertical register transfer clock Vertical register transfer clock Vertical register transfer clock Pin No. 13 14 15 16 17 18 19 20 21 22 23 24 Symbol VOUT VDD RG H2B H1B GND NC SUB CSUB VL H1A H2A Substrate clock Substrate bias1 Protective transistor bias Horizontal register transfer clock Horizontal register transfer clock Description Signal output Supply voltage Reset gate clock Horizontal register transfer clock Horizontal register transfer clock GND
1 DC bias is generated within the CCD, so that this pin should be grounded externally through a capacitance of 0.1F.
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SUB
CSUB
VOUT
H2A
ICX282AK
Absolute Maximum Ratings Item VDD, VOUT, RG - SUB V1, V3 - SUB ( = Against SUB V2, V4, VL - SUB H1, H2, GND - SUB ( = CSUB - SUB VDD, VOUT, RG, CSUB - GND Against GND V1, V2, V3, V4 - GND ( = H1, H2 - GND ( = Against VL V1, V3 - VL ( =
A, B) A to C) A, B) A to C)
Ratings -40 to +12 -50 to +15 -50 to +0.3 -40 to +0.3 -25 to -0.3 to +22 -10 to +18 -10 to +6.5 -0.3 to +28
A, B)
Unit V V V V V V V V V V V V V C C C
Remarks
A to C)
V2, V4, H1, H2, GND - VL ( = H1 - H2 ( =
-0.3 to +15 to +15 -6.5 to +6.5 -10 to +16 -30 to +80 -10 to +60 -10 to +75
Voltage difference between vertical clock input pins Between input clock pins
A, B) A, B)
1
H1, H2 - V4 ( = Storage temperature Guaranteed temperature of performance Operating temperature
1 +24V (Max.) when clock width < 10s, clock duty factor < 0.1%. +16V (Max.) is guaranteed for turning on or off power supply.
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ICX282AK
Bias Conditions Item Supply voltage Protective transistor bias Substrate clock Reset gate clock Symbol VDD VL SUB RG Min. 14.55 Typ. 15.0 1 2 2 Max. 15.45 Unit V Remarks
1 VL setting is the VVL voltage of the vertical clock waveform, or the same voltage as the VL power supply for the V driver should be used. 2 Do not apply a DC bias to the substrate clock and reset gate clock pins, because a DC bias is generated within the CCD. DC Characteristics Item Supply current Symbol IDD Min. 4.0 Typ. 7.0 Max. 10.0 Unit mA Remarks
Clock Voltage Conditions Item Readout clock voltage Symbol VVT VVH1, VVH2 VVH3, VVH4 VVL1, VVL2, VVL3, VVL4 VV Vertical transfer clock voltage VVH3 - VVH VVH4 - VVH VVHH VVHL VVLH VVLL Horizontal transfer clock voltage VH VHL VCR VRG Reset gate clock voltage Substrate clock voltage VRGLH - VRGLL VRGL - VRGLm VSUB 21.5 22.5 3.0 -0.05 0.5 3.0 3.3 0 1.65 3.3 3.6 0.4 0.5 23.5 Min. 14.55 -0.05 -0.2 -8.0 6.8 -0.25 -0.25 Typ. 15.0 0 0 -7.5 7.5 Max. Unit 15.45 0.05 0.05 -7.0 8.05 0.1 0.1 0.6 0.9 0.9 0.5 3.6 0.05 V V V V V V V V V V V V V V V V V V Waveform diagram 1 2 2 2 2 2 2 2 2 2 2 3 3 3 4 4 4 5 Low-level coupling Low-level coupling Cross-point voltage High-level coupling High-level coupling Low-level coupling Low-level coupling VVL = (VVL3 + VVL4)/2 VV = VVHn - VVLn (n = 1 to 4) VVH = (VVH1 + VVH2)/2 Remarks
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ICX282AK
Clock Equivalent Circuit Constant Item Capacitance between vertical transfer clock and GND Symbol CV1, CV3 CV1B, CV3B CV2, CV4 CV1 2, CV34 CV1B2, CV3B4 CV23, CV41 CV23B, CV41B Capacitance between vertical transfer clocks CV1 3 CV1B3B CV1 3B, CV1B3 CV24 CV11B, CV3 3B Capacitance between horizontal transfer clock and GND Capacitance between horizontal transfer clocks Capacitance between reset gate clock and GND Capacitance between substrate clock and GND Vertical transfer clock series resistor Vertical transfer clock ground resistor Horizontal transfer clock series resistor CH1 CH2 CHH CRG CSUB R1, R3 R1B, R2, R3B, R4 RGND RH Min. Typ. 1800 6800 5600 560 680 180 270 56 330 91 120 100 82 62 110 5 1500 62 43 16 7.5 Max. Unit Remarks pF pF pF pF pF pF pF pF pF pF pF pF pF pF pF pF pF
Note 1) = A, C for each vertical transfer clock capacitance. Note 2) The relationships of V1A = V1C and V3A = V3C are established for each vertical transfer clock capacitance. Note 3) CV1A1C and CV3A3C are sufficiently small relative to other capacitance between vertical transfer clocks, and are also below the measurement limit, so these are omitted from the equivalent circuit diagrams and the above table.
V2 R2 CV1 3 CV23 V3 ( = A, C) R3
V1 ( = A, C)
R1
CV24 CV1 2
RH H1A
RH H2A
CV1B2 CV1 CV1 1B CV1B3 CV1B CV4 CV41 V1B R1B CV41B RGND CV3B4 CV1B3B R4 V4
CV23B CV2 CV3 CV3 3B CV3B CV1 3B CV3 4
RH H1B CHH CH1 CH2
RH H2B
R3B
V3B
Vertical transfer clock equivalent circuit -5-
Horizontal transfer clock equivalent circuit
ICX282AK
Drive Clock Waveform Conditions (1) Readout clock waveform
100% 90%
M VVT 10% 0% tr twh tf 0V M 2
(2) Vertical transfer clock waveform
V1A, V1B, V1C VVH1 VVHH VVH VVHL VVHL VVHH VVHL VVH3 V3A, V3B, V3C VVHH VVH
VVHH VVHL
VVL1
VVLH
VVL3
VVLH VVLL VVL
VVLL VVL
V2
V4
VVHH
VVHH
VVH VVHL
VVH
VVHH
VVHH
VVH2 VVHL
VVHL VVH4
VVHL
VVL2VVLH VVLL VVL4
VVLH
VVLL VVL
VVL
VVH = (VVH1 + VVH2)/2 VVL = (VVL3 + VVL4)/2 VV = VVHn - VVLn (n = 1 to 4)
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ICX282AK
(3) Horizontal transfer clock waveform
tr H2A, H2B 90% VCR VH VH 2 10% H1A, H1B VHL two twl twh tf
Cross-point voltage for the H1 rising side of the horizontal transfer clocks H1 and H2 waveforms is VCR. The overlap period for twh and twl of horizontal transfer clocks H1 and H2 is two. (4) Reset gate clock waveform
tr twh tf
RG waveform
VRGH
twl VRG Point A VRGLH VRGLL VRGLm VRGL
VRGLH is the maximum value and VRGLL is the minimum value of the coupling waveform during the period from Point A in the above diagram until the rising edge of RG. In addition, VRGL is the average value of VRGLH and VRGLL. VRGL = (VRGLH + VRGLL)/2 Assuming VRGH is the minimum value during the interval with twh, then: VRG = VRGH - VRGL Negative overshoot level during the falling edge of RG is VRGLm. (5) Substrate clock waveform
100% 90%
M VSUB 10% VSUB 0% (A bias generated within the CCD) M 2 tf
tr
twh
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ICX282AK
Clock Switching Characteristics (Horizontal drive frequency: 22.5MHz) Item Readout clock Symbol VT twh twl tr tf Unit s Remarks During readout When using CXD3400N During imaging, tf tr - 2ns
Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. 2.47 2.67 0.5 0.5
V1A, V1B, Vertical transfer V1C, V2, V3A, V3B, clock V3C, V4 Horizontal transfer clock Reset gate clock H1A, H1B 13 H2A, H2B 13 RG 6 16 16 8 13 13 16 16 31 6.5 9.5 6.5 9.5 3 0.5
15
350 ns 6.5 9.5 6.5 9.5 3 0.5
ns ns s
Substrate clock SUB
2.0 2.58
During drain charge
Item Horizontal transfer clock
Symbol H1A, H1B, H2A, H2B
two Min. Typ. Max. 11 16
Unit Remarks ns
Spectral Sensitivity Characteristics (excludes lens characteristics and light source characteristics)
1.0 Ye Cy 0.8 G
Relative Response
0.6
0.4
0.2 Mg 0 400
450
500
550 Wave Length [nm]
600
650
700
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ICX282AK
Image Sensor Characteristics Item Sensitivity Sensitivity comparison Saturation signal Symbol S RMgG RYeCy Vsat Vsat2 Sm Min. 264 0.75 1.10 450 900 -92 Smear -86 -80 Video signal shading SH Dark signal Dark signal shading Lag Vdt Vdt Lag -84 -78 -72 20 25 16 8 0.5 % mV mV % 5 6 7 8 dB 4 Typ. 330 1.35 1.43 mV Max. Unit mV Measurement method 1 2 3 Ta = 60C Remarks
(Ta = 25C)
1/30s accumulation, no line addition1, 2
No line addition1 2-line addition3
Frame readout mode4 2x speed mode (1)5 8x speed mode Zone 0 and I Zone 0 to II' Ta = 60C, 3.75 frame/s Ta = 60C, 3.75 frame/s, 6
1 Frame readout mode, 2x speed mode (1), and center scan modes (1), (2), (3) and (4). 2 When the accumulation time is constant, 2-line addition modes have a sensitivity double that of modes without line addition. 3 2x speed mode (2), 8x speed mode, and AF mode (1), (2) 4 After closing the mechanical shutter, the smear can be reduced to below the detection limit by performing vertical register sweep operation. This is also the same for 2x speed mode (2) and center scan modes (3) and (4). 5 Smear can be reduced by approximately 30dB to a level of approximately -116dB (typ.) by performing the following sequence. Vertical register high-speed transfer Readout (SG) Mechanical shutter closed Signal output 6 Excludes vertical dark signal shading caused by vertical register high-speed transfer.
Zone Definition of Video Signal Shading
2588 (H) 4 4 8 H 8 V 10 H 8
1960 (V)
Zone 0, I Zone II, II' V 10
8
Ignored region Effective pixel region
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ICX282AK
Measurement System
CCD signal output [A]
CCD
C.D.S
AMP
S/H
G/Ye channel signal output [B]
S/H
Mg/Cy channel signal output [C]
Note) Adjust the amplifier gain so that the gain between [A] and [B], and between [A] and [C] equals 1.
Image Sensor Characteristics Measurement Method Measurement conditions (1) In the following measurements, the device drive conditions are at the typical values of the bias and clock voltage conditions, and the frame readout mode is used. (2) In the following measurements, spot blemishes are excluded and, unless otherwise specified, the optical black level (OB) is used as the reference for the signal output, which is taken as the value of the Y signal output or chroma signal output of the measurement system. Color coding of this image sensor & Composition of luminance (Y) and chroma (color difference) signals B2 Ye G B1 Ye G Cy Mg Cy Mg Ye G Ye G Cy Mg Cy Mg A1 A2 The complementary color filters of this image sensor are arranged in the layout shown in the figure on the left. For frame readout, the A1 and A2 lines are output as signals in the A field, and the B1 and B2 lines in the B field.
Horizontal register Color Coding Diagram These signals are processed to form the Y signal and chroma (color difference) signal sa follws. The approximation: Y ={G + Mg + Ye + Cy} x 1/4 = 1/4 {2B + 3G +2R} is used for the Y signal, and the approximation: R - Y = {(Mg + Ye) - (G +Cy} = {2R -G} B - Y = {(Mg + Cy) - (G +Ye)} = {2B -G} are used for the chroma (color difference) signal. - 10 -
ICX282AK
Readout modes list The readout method, frame rate, number of output lines and other information for each readout mode are shown in the table below. Mode Frame readout Readout method Frame readout Frame readout 4/16 lines 2/4 lines 2/4 lines Frame readout Frame readout 4/16 lines 4/16 lines High-speed Addition sweep for preventing smear method Yes Yes Yes None None None Yes Yes None None None None Vertical 2 lines Vertical 2 lines None None None None Vertical 2 lines Vertical 2 lines 11.988 59.94 119.88 Frame rate [frame/s] NTSC 3.75 7.49 6.66 29.97 14.985 26.35 7.02 10 50 100 PAL 3.57 7.14 6.25 25 12.5 Number of output effective image data lines 1960 980 980 245 NTSC: 484, PAL: 587 246 968 NTSC: 492, PAL: 620 NTSC: 104, PAL: 128 NTSC: 34, PAL: 46
2x speed (1) 2/4 lines 2x speed (2) 8x speed Center scan (1) Center scan (2) Center scan (3) Center scan (4) AF (1) AF (2)
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ICX282AK
Description of frame readout mode The output methods for the following readout modes are shown below. Frame readout mode 1st field
17 (V1A) 16 (V3B) 15 (V1B) 14 (V3A) 13 (V1C) 12 (V3B) 11 (V1B) 10 (V3A) 9 (V1C) 8 (V3B) 7 (V1B) 6 (V3C) 5 (V1A) 4 (V3B) 3 (V1B) 2 (V3C) 1 (V1A) VOUT G Ye G Ye G Ye G Ye G Ye G Ye G Ye G Ye G Mg Cy Mg Cy Mg Cy Mg Cy Mg Cy Mg Cy Mg Cy Mg Cy Mg VOUT 17 (V1A) 16 (V3B) 15 (V1B) 14 (V3A) 13 (V1C) 12 (V3B) 11 (V1B) 10 (V3A) 9 (V1C) 8 (V3B) 7 (V1B) 6 (V3C) 5 (V1A) 4 (V3B) 3 (V1B) 2 (V3C) 1 (V1A)
2nd field
G Ye G Ye G Ye G Ye G Ye G Ye G Ye G Ye G Mg Cy Mg Cy Mg Cy Mg Cy Mg Cy Mg Cy Mg Cy Mg Cy Mg
2x speed mode (1) 2/4-line readout
17 (V1A) 16 (V3B) 15 (V1B) 14 (V3A) 13 (V1C) 12 (V3B) 11 (V1B) 10 (V3A) 9 (V1C) 8 (V3B) 7 (V1B) 6 (V3C) 5 (V1A) 4 (V3B) 3 (V1B) 2 (V3C) 1 (V1A) VOUT G Ye G Ye G Ye R Ye G Ye G Ye G Ye G Ye G Mg Cy Mg Cy Mg Cy Mg Cy Mg Cy Mg Cy Mg Cy Mg Cy Mg
Note) Blacked out portions in the diagram indicate pixels which are not read out. 1. Frame readout mode In this mode, all pixel signals are divided into two fields and output. All pixel signals are read out independently, making this mode suitable for high resolution image capturing. 2. 2x speed mode (1) 2/4-line readout All effective area signals are output in half the time of frame readout mode by reading out 2 lines for every 4 lines. The number of output lines is halved, but all color signals can be output in a single field, so exposure completed is read out (SG), making high-speed shutter operation possible. However, note that the G/Mg and Ye/Cy line readout timings have a time difference of approximately 6.7s (150clk). In addition, using high-speed sweep transfer and the mechanical shutter is recommended to suppress smear. Smear is reduced by approximately 30dB by performing the following sequence. Vertical register high-speed transfer Readout (SG) Mechanical shutter closed Signal output - 12 -
ICX282AK
2x speed mode (2) 2-line addition 1st field
17 (V1A) 16 (V3B) 15 (V1B) 14 (V3A) 13 (V1C) 12 (V3B) 11 (V1B) 10 (V3A) 9 (V1C) 8 (V3B) 7 (V1B) 6 (V3C) 5 (V1A) 4 (V3B) 3 (V1B) 2 (V3C) 1 (V1A) VOUT G Ye G Ye G Ye G Ye G Ye G Ye G Ye G Ye G Mg Cy Mg Cy Mg Cy Mg Cy Mg Cy Mg Cy Mg Cy Mg Cy Mg VOUT 17 (V1A) 16 (V3B) 15 (V1B) 14 (V3A) 13 (V1C) 12 (V3B) 11 (V1B) 10 (V3A) 9 (V1C) 8 (V3B) 7 (V1B) 6 (V3C) 5 (V1A) 4 (V3B) 3 (V1B) 2 (V3C) 1 (V1A)
2nd field
G Ye G Ye G Ye G Ye G Ye G Ye G Ye G Ye G Mg Cy Mg Cy Mg Cy Mg Cy Mg Cy Mg Cy Mg Cy Mg Cy Mg
8x speed mode 4/16-line readout
17 (V1A) 16 (V3B) 15 (V1B) 14 (V3A) 13 (V1C) 12 (V3B) 11 (V1B) 10 (V3A) 9 (V1C) 8 (V3B) 7 (V1B) 6 (V3C) 5 (V1A) 4 (V3B) 3 (V1B) 2 (V3C) 1 (V1A) VOUT G Ye G Ye G Ye G Ye G Ye G Ye G Ye G Ye G Mg Cy Mg Cy Mg Cy Mg Cy Mg Cy Mg Cy Mg Cy Mg Cy Mg
Note) Blacked out portions in the diagram indicate pixels which are not read out. 3. 2x speed mode (2) 2-line addition In this mode, the G/Mg line is read out in the 1st field and the Ye/Cy line in the 2nd field, 2 lines are transferred during the horizontal blanking period, and 2 lines are added in the horizontal register. All pixel signals are divided into two fields and output in approximately half the time (slightly longer than half) of frame readout mode. At this time, the sensitivity (for 1/30s accumulation) and saturation signal level are double that during frame readout mode, allowing high sensitivity imaging with a wide dynamic range. 4. 8x speed mode, 4/16-line readout All effective area signals are output in 1/8 the time of frame readout mode by reading out 4 lines for every 16 lines, transferring 4 lines during the horizontal blanking period, and adding 2 lines in the horizontal register. The number of output lines is 245 lines. However, note that the G/Mg and Ye/Cy line readout timings have a time difference of approximately 6.7s (150clk). This mode emphasizes processing speed over vertical resolution, making it suitable for AE/AF and other control and for image verification on LCD viewfinders.
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ICX282AK
Center scan mode (1) 484-line output
Undesired portion (Swept by vertical register high-speed transfer)
Center scan mode (2) 246-line output
Undesired portion (Swept by vertical register high-speed transfer)
V: 968 pixels
Picture center cut-out portion
V: 492 pixels
Picture center cut-out portion
5. Center scan mode (1) 484-line output This mode sweeps the undesired portions by vertical register high-speed transfer, and outputs only the vertical 968-pixel region of the picture center by reading out 2 lines for every 4 lines (like 2x speed mode (1)). The number of output lines is 484 lines. The frame rate is increased (approximately 15 frames/s) by setting the number of vertical output lines to that of VGA mode, making this mode suitable for VGA moving pictures. (However, the angle of view is equivalent to 2x electronic zoom.) 6. Center scan mode (2) 246-line output This mode sweeps the undesired portions by vertical register high-speed transfer, and outputs only the vertical 492-pixel region of the picture center by reading out 2 lines for every 4 lines (like 2x speed mode (1)). The number of output lines is 246 lines. This mode is suitable for enlarged display when verifying image on LCD viewfinders.
Center scan mode (3) 968-line output
Undesired portion (Swept by vertical register high-speed transfer)
Center scan mode (4) 492-line output
Undesired portion (Swept by vertical register high-speed transfer)
V: 968 pixels
Picture center cut-out portion
V: 492 pixels
Picture center cut-out portion
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ICX282AK
7. Center scan mode (3) 968-line output This mode sweeps the undesired portions by vertical register high-speed transfer, and outputs only the vertical 968-pixel region of the the picture center divided into two fields (like frame readout mode). The number of output lines is 968 lines. This mode is used to shorten the frame rate when shooting 2x electronic zoom image. 8. Center scan mode (4) 492-line output This mode sweeps the undesired portions by vertical register high-speed transfer, and outputs only the vertical 492-pixel region of the picture center divided into two fields (like frame readout mode). The number of output lines is 492 lines. This mode is used to shorten the frame rate when shooting 4x electronic zoom image.
AF mode (1), (2)
Undesired portion (Swept by vertical register high-speed transfer)
Picture center cut-out portion AF mode (2) V: 272 pixels AF mode (1) V: 832 pixels
9. AF modes (1), (2) The AF modes are used to achieve even higher-speed AF control than 8x speed mode. AF mode (1) outputs only the vertical 832-pixel (in NTSC mode) region of the picture center at approximately 60 frames/s by reading out 4 lines for every 16 lines (like 8x speed mode). AF mode (2) outputs only the vertical 272-pixel (in NTSC mode) region of the picture center at approximately 120 frames/s by reading out 4 lines for every 16 lines (like 8x speed mode). The number of output lines for each mode is shown below. AF mode (1) NTSC mode PAL mode 60 frame/s 50 frame/s 104 lines 128 lines AF mode (2) 120 frame/s 100 frame/s 34 lines 46 lines
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ICX282AK
Definition of standard imaging conditions (1) Standard imaging condition I: Use a pattern box (luminance: 706cd/m2, color temperature of 3200K halogen source) as a subject. (Pattern for evaluation is not applicable.) Use a testing standard lens with CM500S (t = 1.0mm) as an IR cut filter and image at F5.6. The luminous intensity to the sensor receiving surface at this point is defined as the standard sensitivity testing luminous intensity. (2) Standard imaging condition II: Image a light source (color temperature of 3200K) with a uniformity of brightness within 2% at all angles. Use a testing standard lens with CM500S (t = 1.0mm) as an IR cut filter. The luminous intensity is adjusted to the value indicated in each testing item by the lens diaphragm. 1. Sensitivity Set to the standard imaging condition I. After selecting the electronic shutter mode with a shutter speed of 1/100s, measure the signal outputs (VG, VMg, VYe and VCy) at the center of each G, Mg, Ye and Cy channel screen, and substitute the values into the following formulas. V = (VG + VMg + VYe + VCy)/4 S = V x 100 [mV] 30 2. Saturation comparison Set to the standard imaging condition II: Adjust the luminous intensity so that the average value of the G/ Mg/Ye/Cy channel signal output is 150mV, and then measure the Mg signal output (SMg [mV]) and G signal output (SG [mV]), and the Ye signal output (SYe [mV]) and Cy signal output (SCy [mV]) at the center of the screen. Substitute the values into the following formulas. RMgG = SMg/SG RYeCy = SYe/SCy 3. Satutation signal Set to standaed imageing condition II. After adjusting the luminous intensity to 10 times the intsnsity with the avarage value of the G/Mg/Ye/Cy channel signal output, 150mV, measure the minimum values of the G, Mg, Ye and Cy signal outputs. Smear Set to the standard imaging condition II. With the lens diaphragm at F5.6 to F8, first adjust the luminous intensity to 500 times the intensity with the average value of the G/Mg/Ye/Cy channel signal output, 150mV. After the readout clock is stopped and the charge drain is executed by the electronic shutter at the respective H blankings, measure the maximum value (VSm [mV]) independent of the G, Mg, Ye and Cy signal outputs, and substitute the values into the following formula. The smear for modes other than frame readout mode is calculated from the storage time and signal addition method. As a result, 2x speed mode (2) is the same, 2x speed mode (1) is double, and 8x speed mode is 4 times that for frame readout mode. Sm = 20 x log ( VSm x 1 x 1 ) [dB] (1/10V method conversion value) 500 150 10
4.
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ICX282AK
5.
Video signal shading Set to the standard imaging condition II. With the lens diaphragm at F5.6 to F8, adjusting the luminous intensity so that the average value of the G/Mg/Ye/Cy channel signal output is 200mV. Then measure the maximum value (Vmax [mV]) and minimum value (Vmin [mV]) of the G/Mg/Ye/Cy channel signal output and substitute the values into the following formula. SH = (Vmax - Vmin)/150 x 100 [%]
6.
Dark signal Measure the average value of the signal output (Vdt [mV]) with the device ambient temperature of 60C and the device in the light-obstructed state, using the horizontal idle transfer level as a reference. Dark signal shading After measuring 6, measure the maximum (Vdmax [mV]) and minimum (Vdmin [mV]) values of the dark signal output and substitute the values into the following formula. Vdt = Vdmax - Vdmin [mV]
7.
8.
Lag Adjust the G/Mg/Ye/Cy channel output generated by the strobe light to 150mV. After setting the strobe light so that it strobes with the following timing, measure the residual signal amount (Vlag). Substitute the value into the following formula. Lag = (Vlag/150) x 100 [%]
VD
V1A/V1B/V1C Light Strobe light timing G/Mg/Ye/Cy channel signal output 150mV
Vlag (lag)
Output
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ICX282AK
Drive Circuit
3.3V 0.1 1 XSUB XV3 XSG3B XSG3A XV1 XSG1B XSG1A XV4 XV2 2 3 4 5 6 7 8 9 10 CXD3400N 20 19 18 17 16 15 14 13 12 11 47 1 0.1 2 XV3 3 4 XSG3C XV1 5 6 7 XSG1C 8 9 10 H2A H1A H2B H1B RG 0.1 Substrate bias control signal VSUB Cont. Substrate bias SUB pin voltage 0.1 1M
Mechanical shutter mode
-7.5V 15V
1/35V 100k
0.1
0.1
20 19 18 17 CXD3400N 16 15 14 13 12 11 0.1
SUB CSUB VOUT GND H2A H1A H1B H2B RG VDD NC VL
2SK1875 1
V4
2
V3A
3
V3B
4
V3C
5
V2
6
NC
7
NC
8
V1A
9
V1B
10 11 12
V1C GND GND
CCD OUT 1.8k
0.1
ICX282 (BOTTOM VIEW) 3.3/20V 0.01
24 23 22 21 20 19 18 17 16 15 14 13
VR1 (2.7k) VSUB Cont.
3.3/16V
0.1
GND Internally generated value VSUB
tf 20ms
tr 2ms
Notes) Substrate bias control 1. The saturation signal level decreases when exposure is performed using the mechanical shutter, so control the substrate bias. 2. A saturation signal level equivalent to that for continuous exposure can be assured by connecting a 2.7k grounding registor to the CCD CSUB pin. Drive timing precautions 1. Blooming occurs in modes (2x speed (1), 8x speed, etc.) where exposure is not completed by closing the mechanical shutter, so do not ground the connected 2.7k resistor. 2. tf is slow, so the internally generated voltage VSUB may not drop to a sufficiently low level if the substrate bias control signal is not set to high level 30ms before entering the exposure period and the 2.7k resistor connected to the CSUB pin is not grounded. 3. The blooming signal generated during exposure in mechanical shutter mode is swept by providing one field or more (two fields is recommended) of idle transfer through vertical register high-speed sweep transfer from the time the mechanical shutter closes until sensor readout is performed. However, note that the VL potential and the SUB pin DC voltage sag at this time. 4. When exposure time is several seconds or more, we recommend the sequence that the substrate bias control is performed just before the completion of exposure (Mechanical shutter is closed.), not before the start of exposure. - 18 -
Drive Timing Chart (Vertical Sequence)
x x 8x Speed Mode Frame Readout Mode (or 2x Speed Mode (1)) / Electronic Shutter Normal Operation
Act.
8x speed mode
Exposure operation
Frame readout mode
8x speed mode
VD
V1A
V1B/C
V2
V3A
- 19 -
V3B/C
V4
SUB
A
B
C
D
E
F
TRG Mechanical shutter VSUB Cont. CCD OUT
Output after frame readout
OPEN
CLOSE
OPEN
A output signal B output signal C output signal
D output signal (ODD)
D output signal (EVEN)
E output signal F output signal
ICX282AK
The B and C output signals contain a blooming component and should therefore not be used. Apply 20 or more electronic shutter pulses at the start of exposure for the recording image. If less than 20 pulses are applied, the electronic shutter may occur a discharge error.
Drive Timing Chart (Vertical Sequence)
Act. VD 8x speed mode
x x 8x Speed Mode 2x Speed Mode (1) / Electronic Shutter Normal Operation
Exposure operation
2x speed mode (1)
8x speed mode
V1A
V1C
V1B
V2
V3A
- 20 -
V3C
V3B
V4
SUB
A
B
C
D
E
F
G
H
TRG Mechanical shutter VSUB Cont. CCD OUT A output signal B output signal C output signal D output signal
Output after 2x Speed Mode (1)
OPEN
CLOSE
OPEN
E output signal F output signal G output signal H output signal
ICX282AK
The substrate bias control signal (VSUB Cont.) should not be used in the above sequence. Apply 20 or more electronic shutter pulses at the start of exposure for the recording image. If less than 20 pulses are applied, the electronic shutter may occur a discharge error.
Drive Timing Chart (Vertical Sequence)
Act. VD 8x speed mode
x x 8x Speed Mode 2x Speed Mode (1) / High-speed Shutter Operation
Exposure operation
2x speed mode (1)
8x speed mode
V1A
V1C
V1B
V2
V3A
- 21 -
V3C
V3B
V4 D
SUB
A
B
C
E
F
G
H
TRG Mechanical shutter VSUB Cont. CCD OUT A output signal B output signal C output signal D output signal
Output after 2x Speed Mode (1)
OPEN
CLOSE
OPEN
E output signal F output signal G output signal H output signal
ICX282AK
The substrate bias control signal (VSUB Cont.) should not be used in the above sequence. Apply 20 or more electronic shutter pulses at the start of exposure for the recording image. If less than 20 pulses are applied, the electronic shutter may occur a discharge error.
Drive Timing Chart (Vertical Sync)
Exposure period
NTSC/PAL
Frame Readout Mode
All pixel output period
VD HD
10 1 2 3 70 1060 1060 2068 2068 1055 1055 1069 1069
NTSC PAL
"c" V1A/B/C
"a"
"d"
1084 1084
"b"
V2
V3A/B/C
V4 SUB
TRG Mechanical shutter VSUB Cont.
1953 1955 1957 1959
OPEN
CLOSE
2072 2072
CCD OUT
1954 1956 1958 1960
2 4 6 8 2 4 6 8 10
1 3 5 7 1 3 5 7 9
2177 2076 1 1 2 2 3 3
10
1 2 3
70
- 22 -
OPEN
ICX282AK
2894fH. However, 2076H in NTSC mode is 950 clk, and 2177H in PAL mode is 2656 clk. Also, the number of high-speed sweep transfer stages and the transfer speed differ for the 1st field and 2nd field sides, so the fields should not be reversed.
Drive Timing Chart (Vertical Sync)
Frame Readout Mode Center Scan Mode (3) 968-line output Center Scan Mode (4) 492-line output
''a'' Enlarged
H1A/B
270 2894 1 62 2894 1 62
1380
1440 1470
89
166
166 89
V1A/B/C
141 219
141
219
V2
193 193
V3A/B/C
115
245
1410
115
245
V4
''b'' Enlarged
297 1620
V1A/B/C
1560 1680
V2
1530 1590 1650
V3A/B/C
323 1710
270
- 23 -
ICX282AK
V4
Drive Timing Chart (Vertical Sync)
Frame Readout Mode / Center Scan Mode (3) / Center Scan Mode (4) 2x Speed Mode (1) x Center Scan Mode (1) Center Scan Mode (2)
''c'' Enlarged
Frame readout mode / Center scan mode (3) / Center scan mode (4): 71H 2x speed mode: 48H, Center scan mode (1): 11H, Center scan mode (2): 17H H1A/B
2894 1 62 2894 1 62 270 270
V1A/B/C
V2
26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26
#1
#2
#3
#4
Frame readout mode: Center scan mode (3): Center scan mode (4): 2x speed mode (1): Center scan mode (1): Center scan mode (2):
26 26 26 26
- 24 -
V3A/B/C
V4
#1970 #1970 #1970 #1335 #305 #472
ICX282AK
Drive Timing Chart (Vertical Sync)
Frame Readout Mode / Center Scan Mode (3) / Center Scan Mode (4)
''d'' Enlarged
Frame readout mode / Center scan mode (3) / Center scan mode (4): 25H
H1A/B
2894 1 62 2894 1 62 270 270
V1A/B/C
V2
18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18
#1
#2
#3
#4
Frame readout mode: #986 Center scan mode (3): #986 Center scan mode (4): #986
18 18 18 18
- 25 -
V3A/B/C
V4
ICX282AK
Drive Timing Chart (Horizontal Sync)
Frame readout mode 2x speed mode (1) 2/4-line readout x Center scan mode (1) 484-line output Center scan mode (2) 246-line output Center scan mode (3) 968-line output Center scan mode (4) 492-line output
Ignored pixel 4 bits
2894
Ignored pixel 4 bits
270 298 315 12 62
CLK
208 1
1 5
RG SHP SHD
1 27 1 77 1 104
V1A/B/C
1
79 1 78 131 1 1
1
51
V2
1
V3A/B/C
77 130 1 25
V4
1
53
H1A/B H2A/B
1 58 1 36
SUB
1
114
28 1
58 1
1
- 26 -
ICX282AK
Drive Timing Chart (Vertical Sync)
NTSC/PAL
x 2x Speed Mode (1)
Exposure period
2/4-line readout
Signal output period
VD HD
1020 1020 1030 1030 10 48 1 2 3
NTSC PAL
"c" V1A/C
"e"
V1B
V2
V3A/C
V3B
V4 SUB TRG Mechanical shutter VSUB Cont.
1949 1950 1953 1954 1957 1958
OPEN
CLOSE
1036 1036
1089 1038
10
48
1 2 3
60
60
2 5 6 1 2 5 6 9 10
- 27 -
OPEN
CCD OUT
ICX282AK
2894fH. However, 1038H in NTSC mode is 1922 clk, and 1089H in PAL mode is 1328 clk.
Drive Timing Chart (Vertical Sync)
x 2x Speed Mode (1) 2/4-line readout Center Scan Mode (1) 484-line output Center Scan Mode (2) 246-line output
''e'' Enlarged
H1A/B
2894 1 62 2894 1 62 270
1380 1440 1470
89
166
166
V1A/C
89 166 1470 166
V1B
141 219 1560 219
V2
1530 1590 193 193
V3A/C
193
193
V3B
115 1410 1500 245
V4
270
- 28 -
ICX282AK
Drive Timing Chart (Vertical Sync)
Exposure period
NTSC/PAL
x 2x Speed Mode (2)
2-line addition
Signal output period
VD HD NTSC PAL
1080 1080 1161 1090 1 1 2 2 3 3 10 1 2 3 66 561 565 573 573 586 586
10
1 2 3
66
"h" V1A/B/C
"f"
561
"i"
565
"g"
V2
CCD OUT
1954 1956 1958 1960
1953 1955 1957 1959
3 7 3 7 11 15 19
1 5 1 5 9 13 17
2 6 2 6 10 14 18
4 8 4 8 12 16 20
- 29 -
V3A/B/C
V4 SUB
TRG Mechanical shutter VSUB Cont. OPEN CLOSE OPEN
ICX282AK
3102fH. However, 1089H and 1090H in NTSC mode are 1700 clk and 1699 clk, respectively, and 1161H in PAL mode is 1680 clk. Also, the number of high-speed sweep transfer stages and the transfer speed differ for the 1st field and 2nd field sides, so the fields should not be reversed.
Drive Timing Chart (Vertical Sync)
x 2x Speed Mode (2)
2-line addition
'' f '' Enlarged
H1A/B
1380 1440 1470 89 141 219 349 427 141 219 349 427
3102 1 62 3102 1 62 478 478
89
166
297
374
166
297
374
V1A/B/C
V2
193 270 401 193 270 401
V3A/B/C
115 245 323 453 1410 115 245 323 453
- 30 -
V4
''g'' Enlarged
505 1620
V1A/B/C
1560 1680
V2
1530 1590 1650
V3A/B/C
531 1710
V4
ICX282AK
Drive Timing Chart (Vertical Sync)
x 2x Speed Mode (2)
2-line addition
''h'' Enlarged
2x Speed Mode (2): 67H H1A/B
3102 1 62 3102 1 62 478 478
V1A/B/C
V2
26 26 26 26 26 26 26 26 26 26 26 26 26 26 26 26
#1
#2
#3
#4
2x Speed Mode (2): #1970
26 26 26 26
- 31 -
V3A/B/C
V4
ICX282AK
Drive Timing Chart (Vertical Sync)
2x Speed Mode (2) x
2-line addition
'' i '' Enlarged
2x Speed Mode (2): 23H
H1A/B
3102 1 62 3102 1 62 478 478
V1A/B/C
V2
18 18 18 18 18 18 18 18 18 18 18 18 18 18 18 18
#1
#2
#3
#4
2x Speed Mode (2): #986
18 18 18 18
- 32 -
V3A/B/C
V4
ICX282AK
Drive Timing Chart (Horizontal Sync)
2x Speed Mode (2) x
2-line addition
Ignored pixel 4 bits
3102
Ignored pixel 4 bits
478 506 523 12 62
CLK
416 1
1 5
RG SHP SHD
1 27 1 77 1
V1A/B/C
131 1
1 77
104
1
V2
1
79 1 131 1 1
1 78 1 77 130 1 78 1
130 1 131 1
1 78
51
V3A/B/C
77 130 1 25
V4
1
53
H1A/B H2A/B
1 58 1 36
SUB
1
322
28 1
58 1
1
- 33 -
ICX282AK
1921 1930 1937 1946 1953
1925 1934 1941 1950 1957
2 1 10 17 26 33
6 5 14 21 30 37
1921 1930 1937 1946 1953
1925 1934 1941 1950 1957
2 1 10 17 26 33
6 5 14 21 30 37
- 34 -
HD VD V1A V3A V3B/C V1B/C V4 V2 CCD OUT
245 245
NTSC
PAL "j"
298 249 1 1 2 2 3 3 4 4 5 5 10 10 15 15 20 20 245 245
Drive Timing Chart (Vertical Sync) NTSC/PAL x 8x Speed Mode
3022fH. However, 249H in NTSC mode is 1294 clk, and 298H in PAL mode is 2466 clk.
"j"
298 249 1 1 2 2 3 3 4 4 5 5
10
10
15
15
20
20
ICX282AK
Drive Timing Chart (Vertical Sync)
x 8x Speed Mode AF Mode (1) AF Mode (2)
'' j '' Enlarged
H1A/B
3022 1 62 3022 1 62 398
1530 1590 1320 1440
73
V1A
73
V1B/C
94 1410 1500
V2
1380 1440 1290 1470
V3A
V3B/C
84 1350 1560
V4
398
- 35 -
ICX282AK
Drive Timing Chart (Horizontal Sync)
x 8x Speed Mode AF Mode (1) AF Mode (2)
Ignored pixel 4 bits
3022
Ignored pixel 4 bits
398 426 443 12 62
CLK
336 1
1 5
RG SHP SHD
1 11 1 31 53 1 31 1 53 1 31 1 53 1 31 1 42
58 1
V1A/B/C
1
1
V2
32 1 53 1 1
1 32 1 31 52 1 1 32
52 1 53 1 32
1
52 1 1 31 52 1 1 32 53 1
1 32 1 31 52 1 1 32
52 1
1 32 53 1
20
1
V3A/B/C
31 52 1 10
V4
1
22
H1A/B H2A/B
11 58 1 33
SUB
1
245
28 1
1
- 36 -
ICX282AK
Drive Timing Chart (Vertical Sync)
NTSC/PAL
Center Scan Mode (1)
484-line output (in NTSC mode)
VD
HD
519 1 2 3 519 1 2 3 12 33
NTSC PAL
12
20
20
33
622 1 2 3
622 1 2 3
12
12
"c" V1A/C
"e"
"k"
20
"c"
"e"
"k"
V1B
V2
V3A/C
V3B
V4
CCD OUT
20
33
9
9
33
9
9
501 502 505 506 509 510
2894fH. However, 519H in NTSC mode is 2408 clk, and 622H in PAL mode is 2826 clk.
501 502 505 506 509
2
2
- 37 -
ICX282AK
Drive Timing Chart (Vertical Sync)
Center Scan Mode (1) / Center Scan Mode (3) Center Scan Mode (2) / Center Scan Mode (4)
''k'' Enlarged
Center Scan Mode (1) / Center Scan Mode (3): 18H Center Scan Mode (2) / Center Scan Mode (4): 27H H1A/B
2894 1 62 2894 1 62 270 270
89
166
V1A/B/C
141
219
V2
27 26 26 25 27 26 26 25
#1
Center Scan Mode (1): #250 Center Scan Mode (3): #250 Center Scan Mode (2): #369 Center Scan Mode (4): #369
27 26 26 25 27 26 26 25
- 38 -
193
V3A/B/C
115
245
V4
ICX282AK
Drive Timing Chart (Vertical Sync)
Center Scan Mode (2)
246-line output
VD
HD
295 1 2 3 25 17 46 295 1 2 3 25 17 46 9 9
"c" V1A/C
"e"
"k"
"c"
"e"
"k"
V1B
V2
737 738 741 742 745 746
2894fH.
737 738 741 742
2
2
- 39 -
V3A/C
V3B
V4
CCD OUT
ICX282AK
Drive Timing Chart (Vertical Sync)
Center Scan Mode (3)
968-line output
Exposure period
All pixel output period
VD HD
601 1106 1 2 3 576 586 621 10 70 1 2 3 91
"c" V1A/B/C
"a"
"k"
"d"
"b"
"k"
V2
497 499 501 502 503
498 500 502 504 505
1
2
- 40 -
V3A/B/C
V4 SUB
TRG Mechanical shutter VSUB Cont. CCD OUT OPEN CLOSE OPEN
ICX282AK
2894fH. Also, the number of high-speed sweep transfer stages and the transfer speed differ for the 1st field and 2nd field sides, so the fields should not be reversed.
Drive Timing Chart (Vertical Sync)
NTSC/PAL
Center Scan Mode (4)
492-line output (in NTSC mode)
Exposure period
All pixel output period
VD HD NTSC PAL
649 1 2 3 778 1 2 3 372 347 357 400 10 70 99 1 2 3 647 647
372
"c" V1A/B/C
"a"
"k"
347
"d"
357
"b"
"k"
V2
V3A/B/C
V4 SUB
TRG Mechanical shutter VSUB Cont.
735 737 739 741
OPEN
CLOSE
400
10
70
99
1 2 3
CCD OUT
736 738 740 742
1
2
- 41 -
OPEN
ICX282AK
2894fH. However, 649H in NTSC mode is 1563 clk, and 778H in PAL mode is 1362 clk. Also, the number of high-speed sweep transfer stages and the transfer speed differ for the 1st field and 2nd field sides, so the fields should not be reversed.
Drive Timing Chart (Vertical Sync)
NTSC/PAL
AF Mode (1)
VD
HD
125 1 2 3 4 5 10 125 1 2 3 4 5
NTSC PAL
20
149 1 2 3 4 5
10
149 1 2 3 4 5
10
"m" V1A
"j"
"l"
20
"m"
10
"j"
"l"
V1B/C
V2
V3A
V3B/C
V4
20
20
561 570 577 586 593
3022fH. However, 125H in NTSC mode is 647 clk, and 149H in PAL mode is 2744 clk.
561 570 577 586 593
2
2
CCD OUT
565 574 581 590 597
565 574 581 590 597
6
6
- 42 -
ICX282AK
Drive Timing Chart (Vertical Sync)
AF Mode (1) AF Mode (2)
'' l '' Enlarged
AF Mode (1): 8H, AF Mode (2): 12H H1A/B
3022 1 62 3022 1 62 398 398
73
V1A/B/C
31 53 31 53 94
V2
32 52 32 52
- 43 -
V3A/B/C
31 53 31 53
84
V4
32 52 32 52
#1
#2
#3
#4
AF Mode (1): #276 AF Mode (2): #420
ICX282AK
Drive Timing Chart (Vertical Sync)
AF Mode (1) AF Mode (2)
''m'' Enlarged
AF Mode (1): 8H, AF Mode (2): 12H H1A/B
3022 1 62 3022 1 62 398 398
73
V1A/B/C
31 53 31 53 94
V2
32 52 32 52
- 44 -
V3A/B/C
31 53 31 53
84
V4
32 52 32 52
#1
#2
#3
#4
AF Mode (1): #285 AF Mode (2): #421
ICX282AK
Drive Timing Chart (Vertical Sync)
NTSC/PAL
AF Mode (2)
VD
HD
63 1 2 3 4 5 63 1 2 3 4 5 10 10
NTSC PAL
20
75 1 2 3 4 5
75 1 2 3 4 5
10
10
20
"m" V1A
"j"
"l"
"m"
"j"
"l"
V1B/C
V2
V3A
V3B/C
V4
20
20
849 853 858 862 865 869
2
3022fH. However, 63H in NTSC mode is 324 clk, and 75H in PAL mode is 1372 clk.
2
CCD OUT
849 853
6
6
- 45 -
ICX282AK
ICX282AK
Notes on Handling 1) Static charge prevention CCD image sensors are easily damaged by static discharge. Before handling be sure to take the following protective measures. a) Either handle bare handed or use non-chargeable gloves, clothes or material. Also use conductive shoes. b) When handling directly use an earth band. c) Install a conductive mat on the floor or working table to prevent the generation of static electricity. d) Ionized air is recommended for discharge when handling CCD image sensors. e) For the shipment of mounted substrates, use boxes treated for the prevention of static charges. 2) Soldering a) Make sure the package temperature does not exceed 80C. b) Solder dipping in a mounting furnace causes damage to the glass and other defects. Use a ground 30W soldering iron and solder each pin in less than 2 seconds. For repairs and remount, cool sufficiently. c) To dismount an image sensor, do not use a solder suction equipment. When using an electric desoldering tool, use a thermal controller of the zero-cross On/Off type and connect it to ground. 3) Dust and dirt protection Image sensors are packed and delivered by taking care of protecting its glass plates from harmful dust and dirt. Clean glass plates with the following operations as required, and use them. a) Perform all assembly operations in a clean room (class 1000 or less). b) Do not either touch glass plates by hand or have any object come in contact with glass surfaces. Should dirt stick to a glass surface, blow it off with an air blower. (For dirt stuck through static electricity ionized air is recommended.) c) Clean with a cotton bud and ethyl alcohol if grease stained. Be careful not to scratch the glass. d) Keep in a case to protect from dust and dirt. To prevent dew condensation, preheat or precool when moving to a room with great temperature differences. e) When a protective tape is applied before shipping, just before use remove the tape applied for electrostatic protection. Do not reuse the tape. 4) Installing (attaching) a) Remain within the following limits when applying a static load to the package. Do not apply any load more than 0.7mm inside the outer perimeter of the glass portion, and do not apply any load or impact to limited portions. (This may cause cracks in the package.)
Cover glass
50N Plastic package Compressive strength
50N
1.2Nm Torsional strength
b) If a load is applied to the entire surface by a hard component, bending stress may be generated and the package may fracture, etc., depending on the flatness of the bottom of the package. Therefore, for installation, use either an elastic load, such as a spring plate, or an adhesive. - 46 -
ICX282AK
c) The adhesive may cause the marking on the rear surface to disappear, especially in case the regulated voltage value is indicated on the rear surface. Therefore, the adhesive should not be applied to this area, and indicated values should be transferred to other locations as a precaution. d) The notch of the package is used for directional index, and that can not be used for reference of fixing. In addition, the cover glass and seal resin may overlap with the notch of the package. e) If the leads are bent repeatedly and metal, etc., clash or rub against the package, the dust may be generated by the fragments of resin. f) Acrylate anaerobic adhesives are generally used to attach CCD image sensors. In addition, cyano-acrylate instantaneous adhesives are sometimes used jointly with acrylate anaerobic adhesives. (reference) 5) Others a) Do not expose to strong light (sun rays) for long periods, as color filters will be discolored. When high luminous objects are imaged with the exposure level controlled by the electronic iris, the luminance of the image-plane may become excessive and discoloring of the color filter will possibly be accelerated. In such a case, it is advisable that taking-lens with the automatic-iris and closing of the shutter during the power-off mode should be properly arranged. For continuous using under cruel condition exceeding the normal using condition, consult our company. b) Exposure to high temperature or humidity will affect the characteristics. Accordingly avoid storage or usage in such conditions. c) Brown stains may be seen on the bottom or side of the package. But this does not affect the CCD characteristics.
- 47 -
Package Outline
Unit: mm
24 pin DIP
A 13
2.5
C
to
24
13
2.35
8.0
D
24
8.2
14.4
B
14.2 0.1
2.35
13.2
2.5
7.1
2.35
0.25
2.35
0.5
13.7 16.0 0.1 B
12
1
0.8
3.5 0.3
13.0
2.5
0.8
0.5
2.9
0.15
0.3 1.27 0.3
2.4
- 48 -
Sony Corporation
1. "A" is the center of the effective image area. 2. The two points "B" of the package are the horizontal reference. The point "B'" of the package is the vertical reference. 3. The bottom "C" of the package, and the top of the cover glass "D" are the height reference. 4. The center of the effective image area relative to "B" and "B'" is (H, V) = (8.0, 7.1) 0.075mm 5. The rotation angle of the effective image area relative to H and V is 1. 6. The height from the bottom "C" to the effective image area is 1.41 0.10mm. The height from the top of the cover glass "D" to the effective image area is 1.49 0.15mm. 7. The tilt of the effective image area relative to the bottom "C" is less than 50m. The tilt of the effective image area relative to the top "D" of the cover glass is less than 50m 8. The thickness of the cover glass is 0.5mm, and the refractive index is 1.5. 9. The notches on the bottom of the package are used only for directional index, they must not be used for reference of fixing.
ICX282AK
PACKAGE STRUCTURE
PACKAGE MATERIAL LEAD TREATMENT LEAD MATERIAL PACKAGE MASS DRAWING NUMBER Plastic GOLD PLATING 42 ALLOY 1.23g AS-A9-02(E)

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