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Global Mixed-mode Technology Inc. G2992 3A DDR Bus Termination Regulator Features VCNTL Supply Voltage: 3.3V to 5.5V Termination Supply Voltage: 1.8V to 3.6V Support Both DDR I(1.25VTT) and DDR II (0.9 VTT) Requirements Requires Only 20F Ceramic Output Capacitor Low Output Offset 3A Source and Sink Current Low External Component Count No Inductor Required Thermal Shutdown Protection Over Current Protection Suspend to RAM (STR) Function with High-impedance output SOP-8 (FD) Package General Description The G2992 is a linear regulator designed to meet the JEDEC SSTL-18, SSTL-2 and SSTL-3 (Series Stub Termination Logic) specifications for termination of DDR I / II -SDRAM. It contains a high-speed operational amplifier that provides excellent response to the load transients. This device can deliver 3A continuous current in the application such as required for DDR I/ II SDRAM termination. The G2992 can easily provide the accurate VTT voltage with two external resistors generating reference voltage. The quiescent current is as low as 750A @ VCNTL = 3.3V. So the power consumption can meet the low power consumption applications. The G2992 also has a shutdown function by setting VREF smaller than 0.2V, that provides Suspend to RAM (STR) functionality. When in the shutdown mode, the VTT output (on VOUT pin) will be tri-state providing a high impendence. A power saving advantage can be obtained in this mode through lowering the quiescent current to 50A @ VCNTL = 3.3V. Applications DDR-SDRAM Termination Voltage DDR I / DDR II Termination Voltage SSTL-18 SSTL-2 SSTL-3 Ordering Information ORDER MARKING NUMBER G2992F1U G2992 Note: U: Tape & Reel (FD): Thermal Pad TEMP. RANGE -40C to +85C PACKAGE (Pb free) SOP-8 (FD) Pin Configuration Typical Application Circuit G2992 VIN GND 1 2 8 7 6 5 VCNTL=3.3V NC NC VCNTL NC 2N7002 EN VIN=2.5V R1 VIN VREF R2 CSS VCNTL VOUT GND COUT RDUMMY CIN CCNTL RTT VREF 3 VOUT 4 SOP-8(FD) Ver: 0.3 Preliminary Sep 13, 2005 TEL: 886-3-5788833 http://www.gmt.com.tw 1 |
Price & Availability of G2992
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