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| STSJ50NH3LL N-channel 30V - 0.008 - 12A - PowerSO-8TM Ultra low gate charge STripFETTM Power MOSFET General features Type STSJ50NH3LL VDSS 30V RDS(on) < 0.0105 ID 12A(1) Optimal RDS(on) x Qg trade-off @ 4.5V Reduced switching losses Reduced conduction losses Improved junction-case thermal resistance PowerSO-8TM Description This series utilizes the latest advanced design rules of ST's proprietary STripFETTM technology, and a propriertary process for integrating a monolithic Scottky diode. The new Power MOSFET is optimized for the most demanding synchronous switch function in DC-DC converter for Computer and Telecom. Internal schematic diagram Applications Switching application DRAIN CONTACT ALSO ON THE BACKSIDE Order codes Part number STSJ50NH3LL Marking 50H3LLPackage PowerSO-8 Packaging Tape & reel April 2006 Rev 5 1/13 www.st.com 13 Contents STSJ50NH3LL Contents 1 2 Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 2.1 Electrical characteristics (curves) ............................. 6 3 4 5 Test circuit ................................................ 9 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 2/13 STSJ50NH3LL Electrical ratings 1 Electrical ratings Table 1. Symbol VDS VGS(1) VGS(2) ID(4) ID(3) ID(4) ID(3) IDM(5) PTOT TJ Tstg Absolute maximum ratings Parameter Drain-source voltage (VGS = 0) Gate-source voltage Gate-source voltage Drain current (continuous) at TC = 25C Drain current (continuous) at TC=25C Drain current (continuous) at TC=100C Drain current (continuous) at TC=100C Drain current (pulsed) Total dissipation at T C = 25C Total dissipation at T C = 25C (4) Operating junction temperature Storage temperature (3) Value 30 16 18 50 12 31.3 7.5 48 3 50 -55 to 150 Unit V V V A A A A A W W C 1. Continuous mode 2. Guaranteed for test time < 15ms 3. This value is rated accordingly to Rthj-pcb 4. This value is rated accordingly to Rthj-c 5. Pulse width limited by safe operating area Table 2. Symbol Rthj-c Rthj-pcb(1) Thermal resistance Parameter Thermal resistance junction-case Max Thermal resistance junction-pcb Max Value 2.5 42 Unit C/W C/W 1. When mounted on 1 inch FR-4 board, 2oz Cu (t<10sec.) Table 3. Symbol IAV EAS Avalanche data Parameter Not repetitive avalanche current (pulse width limited by Tjmax) Single pulse avalanche energy (starting Tj=25C, ID=IAV, VDD=24V) Value 6 800 Unit A mJ 3/13 Electrical characteristics STSJ50NH3LL 2 Electrical characteristics (TCASE=25C unless otherwise specified) Table 4. Symbol V(BR)DSS IDSS On/off states Parameter Drain-source breakdown voltage Zero gate voltage drain current (V GS = 0) Gate body leakage current (V DS = 0) Gate threshold voltage Static drain-source on resistance Static drain-source on resistance Test condictions ID = 250A, V GS= 0 VDS = Max rating VDS = Max rating TC=125C VGS = 16V VDS= VGS, ID =250A VGS= 10V, ID= 6A VGS= 4.5V, ID= 6A VGS= 10V, ID= 6A @125C VGS= 4.5V, ID= 6A @125C 1 0.008 0.010 0.012 0.016 0.0105 0.013 Min. 30 1 10 100 Typ. Max. Unit V A A nA V IGSS VGS(th) RDS(on) RDS(on) Table 5. Symbol gfs (1) Ciss Coss Crss Qg Qgs Qgd RG Dynamic Parameter Forward transconductance Input capacitance Output capacitance Reverse transfer capacitance Total gate charge Gate-source charge Gate-drain charge Test Condictions VDS =10V, ID = 12A Min. Typ. 38 965 285 38 9 3.7 3 12 Max. Unit S pF pF pF nC nC nC VDS =25V, f=1MHz, VGS=0 VDD=15V, ID =12A VGS =4.5V,(see Figure 15) f=1MHz Gate DC Bias=0 Test signal level =20mv open drain Gate input resistance 0.5 1.5 2.5 1. Pulsed: pulse duration=300s, duty cycle 1.5% 4/13 STSJ50NH3LL Electrical characteristics Table 6. Symbol td(on) tr td(off) tf Switching times Parameter Turn-on delay time Rise time Test condictions VDD =15V, ID=6A, RG=4.7, VGS=4.5V (see Figure 14) VDD =15V, ID=6A, RG=4.7, VGS=4.5V (see Figure 14) Min. Typ. 15 32 Max. Unit ns ns Turn-off delay time Fall time 18 8.5 ns ns Table 7. Symbol ISD ISDM(1) VSD(2) trr Qrr IRRM Source drain diode Parameter Source-drain current Source-drain current (pulsed) Forward on voltage Reverse recovery time Reverse recovery charge Reverse recovery current ISD=12A, VGS=0 ISD=12A, di/dt = 100A/s, VDD=20V, Tj=150C (see Figure 19) 24 17.4 1.45 Test Condictions Min. Typ. Max. 12 48 1.3 Unit A A V ns nC A 1. Pulse width limited by safe operating area 2. Pulsed: pulse duration=300s, duty cycle 1.5% 5/13 Electrical characteristics STSJ50NH3LL 2.1 Figure 1. Electrical characteristics (curves) Safe operating area Figure 2. Thermal impedance Figure 3. Output characterisics Figure 4. Transfer characteristics Figure 5. Transconductance Figure 6. Static drain-source on resistance 6/13 STSJ50NH3LL Figure 7. Gate charge vs gate-source voltage Figure 8. Electrical characteristics Capacitance variations Figure 9. Normalized gate threshold voltage vs temperature Figure 10. Normalized on resistance vs temperature Figure 11. Source-drain diode forward characteristics Figure 12. Normalized BVDSS vs temperature 7/13 Electrical characteristics Figure 13. Allowable Iav vs time in avalanche STSJ50NH3LL The previous curve gives the single pulse safe operating area for unclamped inductive loads under the following conditions: PD(AVE) =0.5*(1.3*BV DSS *I AV ) EAS(AR) =PD(AVE) *tAV Where: IAV is the Allowable Current in Avalanche PD(AVE) is the Average Power Dissipation in Avalanche (Single Pulse) tAV is the Time in Avalanche 8/13 STSJ50NH3LL Test circuit 3 Test circuit Figure 15. Gate charge test circuit Figure 14. Switching times test circuit for resistive load Figure 16. Test circuit for inductive load Figure 17. Unclamped inductive load test switching and diode recovery times circuit Figure 18. Unclamped inductive waveform Figure 19. Switching time waveform 9/13 Package mechanical data STSJ50NH3LL 4 Package mechanical data In order to meet environmental requirements, ST offers these devices in ECOPACK(R) packages. These packages have a Lead-free second level interconnect . The category of second level interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com 10/13 STSJ50NH3LL Package mechanical data PowerSO-8TM MECHANICAL DATA mm. MIN. 0.1 0.65 0.35 0.19 0.25 4.8 5.8 1.27 3.81 2.79 3.8 0.4 4.0 1.27 0.6 8 (max.) 0.14 0.015 TYP MAX. 1.75 0.25 1.65 0.85 0.48 0.25 0.5 45 (typ.) 5.0 6.2 0.188 0.228 0.050 0.150 0.110 0.157 0.050 0.023 0.196 0.244 0.025 0.013 0.007 0.010 0.003 MIN. inch TYP. MAX. 0.068 0.009 0.064 0.033 0.018 0.010 0.019 DIM. A a1 a2 a3 b b1 C c1 D E e e3 e4 F L M S 11/13 Revision history STSJ50NH3LL 5 Revision history Table 8. Date 21-Jul-2004 24-May-2005 23-Jun-2005 16-Nov-2005 03-Apr-2006 Revision history Revision 1 2 3 4 5 Initial release. New value on Table 6 New Rg value on Table 6 Complete version New template Changes 12/13 STSJ50NH3LL Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries ("ST") reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST's terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such third party products or services or any intellectual property contained therein. UNLESS OTHERWISE SET FORTH IN ST'S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. UNLESS EXPRESSLY APPROVED IN WRITING BY AN AUTHORIZE REPRESENTATIVE OF ST, ST PRODUCTS ARE NOT DESIGNED, AUTHORIZED OR WARRANTED FOR USE IN MILITARY, AIR CRAFT, SPACE, LIFE SAVING, OR LIFE SUSTAINING APPLICATIONS, NOR IN PRODUCTS OR SYSTEMS, WHERE FAILURE OR MALFUNCTION MAY RESULT IN PERSONAL INJURY, DEATH, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE. Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any liability of ST. ST and the ST logo are trademarks or registered trademarks of ST in various countries. Information in this document supersedes and replaces all information previously supplied. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners. (c) 2006 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com 13/13 |
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