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HANBit
HMF2M32M4VGL
Flash-ROM Module 8MByte (2Mx32Bit), 72Pin-SIMM, 3.3V Design Part No. HMF2M32M4VGL GENERAL DESCRIPTION
The HMF2M32M4VGL is a high-speed flash read only memory (FROM) module containing 2,097,152 words organized in a x32bit configuration. The module consists of four 2M x 8bit FROM mounted on a 72 -pin, single-sided, FR4-printed circuit board. Commands are written to the command register using standard microprocessor write timings. Register contents serve as input to an internal state-machine, which controls the erase and programming circuitry. Write cycles also internally latch addresses and data needed for the programming and erase operations. Reading data out of the device is similar to reading from 12.0V flash or EPROM devices. Four chip enable inputs, (/WE0, /WE1, /WE2, /WE3) are used to enable the module's 8 bits independently. Output enable (/OE) and write enable (/WE) can set the memory input and output. When FROM module is disable condition the module is becoming power standby mode, system designer can get low -power design. All module components may be powered from a single + 3.3V DC power supply and all inputs and outputs are TTLcompatible.
FEATURES
w Access time : 70, 80, 90, 120ns w High-density 8MByte design w High-reliability, low-power design w Single + 3.3V 0.3V power supply w Easy memory expansion w All inputs and outputs are TTL-compatible w FR4-PCB design w Low profile 72-pin SIMM w Minimum 1,000,000 write/erase cycle w Sectors erase architecture w Sector group protection w Temporary sector group unprotection PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 Symbol Vss NC DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 Vcc DQ7 /WE0 /RY_BY DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 /WE1 NC DQ16
PIN ASSIGNMENT
PIN 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 Symbol DQ17 DQ18 DQ19 DQ20 DQ21 Vcc DQ22 DQ23 /WE2 NC DQ24 DQ25 DQ26 DQ27 Vss DQ28 DQ29 DQ30 DQ31 /WE3 NC /RESET A2 /OE PIN 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 Symbol /BANKE0 A3 A4 A5 A6 A7 A8 A9 A10 A11 Vcc A12 A13 A14 A15 A16 A17 A18 A19 A20 A0 A1 NC Vss
OPTIONS
w Timing 70ns access 80ns access 90ns access 120ns access w Packages 72-pin SIMM
MARKING
-70 -80 -90 -120
14 15 16 17 18 19 20 21
M
22 23 24
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FUNCTIONAL BLOCK DIAGRAM
HMF2M32M4VGL
32 DQ0 - DQ31 20 A0 - A19 A0-19 DQ 0-7 /WE0 /WE /OE /CE RY-BY /Reset
U1
A0-20 DQ 8-15 /WE1 /WE /OE /CE RY-BY /Reset
U2
A0-20 DQ16-23 /WE2 /WE /OE /CE RY-BY /Reset
U3
A0-20 DQ24-31 /WE3 /OE /BANK-E0 /RY_BY /Reset /WE /OE /CE RY-BY /Reset
U4
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TRUTH TABLE
MODE STANDBY NOT SELECTED READ WRITE or ERASE NOTE: X means don't care /OE X H L X /CE H L L L /WE X H H L /RESET Vcc0.3V H H H
HMF2M32M4VGL
DQ ( /BYTE=L ) HIGH-Z HIGH-Z DOUT DIN
POWER STANDBY ACTIVE ACTIVE ACTIVE
ABSOLUTE MAXIMUM RATINGS
PARAMETER Voltage with respect to ground all other pins Voltage with respect to ground Vcc SYMBOL VIN,OUT VCC RATING -0.5V to Vcc+0.5V -0.5V to +4.0V
Storage Temperature
TSTG
-65oC to +150oC
Operating Temperature TA -55oC to +125 oC w Stresses greater than those listed under " Absolute Maximum Ratings" may cause permanent damage to the device . This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operating section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
RECOMMENDED DC OPERATING CONDITIONS
PARAMETER Vcc for 10% device Supply Voltages Ground SYMBOL Vcc VSS MIN 2.7V 0 0 TYP. MAX 3.6V 0
DC AND OPERATING CHARACTERISTICS ( 0oC TA 70 oC )
PARAMETER Input Load Current A9 Input Loda Current Output Leakage Current TEST CONDITIONS Vcc=Vcc max, V IN= Vss to Vcc Vcc=Vcc max, ; A9=12.5 V Vcc=Vcc max, V OUT= Vss to Vcc /CE= VIL, /OE= VIH, Byte Mode Vcc Active Read Current (1) /CE= VIL, /OE= VIH, Word Mode Vcc Active Write Current /CE = VIL, /OE=VIH (Note2,3,4) Vcc Standby Current(Note2) /CE, /RESET=Vcc0.3V ICC3 0.2 5 mA ICC2 20 30 mA 5MHz 1MHz 5MHz 1MHz ICC1 9 2 16 4 SYMBO L IL1 IL1T IL0 9 2 MIN TYP MAX 1.0 35 1.0 16 4 A UNI T A A A
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Vcc Standby Current During /RESET=Vss0.3V Reset(Note2) Automatic Sleep Mode(Note2,5) Input Low Voltage Input High Voltage Voltage for Autoselect and VCC = 3.3V Temporary Sector Unprotect Output Low Voltage IOL = 4.0mA, Vcc =Vcc min IOH = -2.0mA, Vcc =Vcc min Output High Voltage IOH = -100A, Vcc =Vcc min Low Vcc Lock-Out Voltage(Note VLKO 4) Notes 1. 2. 3. c Vcc-0.4 VOL 0.85xVc VID VIH= Vcc 0.3V; VIL= Vss 0.3V; VCC5 VIL VIH ICC4
HMF2M32M4VGL
0.2 5 mA
0.2 -0.5 0.7xVc c 11.5
5 0.8 Vcc+0
V V V
.3 12.5 0.45 V V V
2.3
2.5
V
The Icc Current listed is typically less than 2 ma/MHz,with /OE at VIH. Typical Vcc is 3.0V. Maximum Icc Specifications are tested with Vcc=Vccmax. Icc active while Embedded Erase of Embedded Program is in progress .
ERASE AND PROGRAMMING PERFORMANCE
LIMITS PARAMETER MIN. Sector Erase Time Chip Erase Time Byte Programming Time Chip Programming Time TYP. 0.7 25 9 18 300 54 MAX. 15 sec sec s sec Excludes system-level overhead Excludes 00H programming prior to erasure UNIT COMMENTS
TSOP CAPACITANCE
PARAMETER SYMBOL CIN COUT CIN2 PARAMETER DESCRIPTION Input Capacitance Output Capacitance Control Pin Capacitance
o
TEST SETUP VIN = 0 VOUT = 0 VIN = 0
MIN 6 8.5 7.5
MAX 7.5 12 9
UNIT pF pF pF
Notes : Test conditions TA = 25 C, f=1.0 MHz.
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AC CHARACTERISTICS u Read Only Operations Characteristics
PARAMETER SYMBOLS DESCRIPTION JEDEC STANDARD tAVAV tAVQV tELQV tGLQV tEHQZ tGHQZ tRC tACC tCE tOE tDF tDF Read Cycle Time (Note 1) Address to Output Delay Chip Enable to Output Delay Chip Enable to Output Delay Chip Enable to Output High-Z Output Enable to Output High-Z Read Output Enable Toggle and Hold Time(Note 1) tAXQX tQH Notes : 1. Not 100% tested. 2. See Figure 5 and Table 10 for test specifications. /Data Polling Output Hold Time From Addresses, /CE or /OE, Whichever Occurs First Min Min /CE = V IL /OE = VIL /OE = VIL Min Max Max Max Max Max Min TEST SETUP -70R 70 70 70 30 25 25
HMF2M32M4VGL
Speed Options UNIT -80 80 80 80 30 25 25 0 ns 10 0 ns -90 90 90 90 35 30 30 -120 120 120 120 35 30 30 ns ns ns ns ns ns
TEST SPECIFICATIONS
TEST CONDITION Output load Output load capacitance,CL (Including jig capacitance) Input rise and fall times Input pulse levels Input timing measurement reference levels Output timing measurement reference levels 30 5 0.0-3.0 1.5 1.5 70R, 80 1TTL gate 100 pF ns V V V 90, 120 UNIT
3.3V 2.7k Device Under Test CL IN3064 or Equivalent
6.2k
Diodes = IN3064 or Equivalent
Note : CL = 100pF including jig capacitance
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u Erase/Program Operations
PARAMETER SYMBOLS DESCRIPTION JEDEC tAVAV tAVWL tWLAX tDVWH tWHDX STANDARD tWC tAS tAH tDS tDH tOES tGHWL tELWL tWHEH tWLWH tWHWL tWHWH1 tWHWH2 tGHWL tCS tCH tWP tWPH tWHWH1 Operation tWHWH2 tVCS tRB tBUSY Delay Notes : 1. 2. Not 100% tested. See the "Erase and Programming Performance " section for more information. Word Typ Typ Min Min Min Write Cycle Time Address Setup Time Address Hold Time Data Setup Time Data Hold Time Output Enable Setup Time Read Recover Time Before Write /CE Setup Time /CE Hold Time Write Pulse Width Write Pulse Width High Byte Programming Byte Min Min Min Min Min Min Min Min Min Min Min Typ 35 35 45 35 45 35 70R 70 80 80
HMF2M32M4VGL
Speed Options UNIT 90 90 0 45 45 0 0 0 0 0 35 30 9 11 0.7 50 0 90 sec s ns ns 50 50 50 120 120 ns ns ns ns ns ns ns ns ns ns ns s
Sector Erase Operation (Note1) Vcc set up time Recovery Time from RY//BY Program/Erase Valid to RY//BY
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u Erase/Program Operations Alternate /CE Controlled Writes
PARAMETER SYMBOLS DESCRIPTION JEDEC tAVAV tAVWL tWLAX tDVEH tEHDX STANDARD tWC tAS tAH tDS tDH tOES tGHEL tWLEL tEHEH tELEH TEHEL tWHWH1 tGHEL tWS tWH tCP tCPH tWHWH1 Write Cycle Time Address Setup Time Address Hold Time Data Setup Time Data Hold Time Output Enable Setup Time Read Recover Time Before Write /WE Setup Time /WE Hold Time /CE Pulse Width /CE Pulse Width High Byte Programming Operation tWHWH2 Notes : 1. 2. Not 100% tested. See the "Erase and Programming Performance " section for more information. tWHWH2 Sector Erase Operation Byte Word Min Min Min Min Min Min Min Min Min Min Min Typ Typ Typ 35 45 35 -70R 70
HMF2M32M4VGL
Speed Options UNIT -80 80 0 45 35 0 0 0 0 0 35 30 9 11 0.7 sec 35 50 45 45 50 50 -90 90 120 120 ns ns ns ns ns ns ns ns ns ns ns s
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u READ OPERATIONS TIMING
HMF2M32M4VGL
u RESET TIMING
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u PROGRAM OPERATIONS TIMING
HMF2M32M4VGL
u CHIP/SECTOR ERASE OPERATION TIMINGS
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u DATA# POLLING TIMES(DURING EMBEDDED ALGORITHMS)
HMF2M32M4VGL
u TOGGLE# BIT TIMINGS (DURING EMBEDDED ALGORITHMS)
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u SECTOR PROTECT UNPROTECT TIMEING DIAGRAM
HMF2M32M4VGL
u ALTERNATE CE# CONTROLLED WRITE OPERATING TIMINGS
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PACKAGE DIMENSIONS
HMF2M32M4VGL
2.54 mm 0.25 mm MAX MIN
Gold: 1.040.10 mm 1.27 Solder: 0.9140.10 mm
1.270.08 mm
(Solder & Gold Plating)
ORDERING INFORMATION
Component Number 4EA 4EA 4EA 4EA
Part Number
Density
Org.
Package
Vcc
SPEED
HMF2M32M4VGL-70 HMF2M32M4VGL-80 HMF2M32M4VGL-90 HMF2M32M4VGL-120
8MByte 8MByte 8MByte 8MByte
2Mx 32Bit 2Mx 32Bit 2Mx 32Bit 2Mx 32Bit
72Pin -SIMM 72Pin -SIMM 72Pin -SIMM 72Pin -SIMM
3.3V 3.3V 3.3V 3.3V
70ns 80ns 90ns 120ns
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