View PI74ALVCH16344_657415.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74ALVCH16344
1-Bit to 4-Bit Address/Driver with 3-State Outputs
Product Features
* * * * * * * * PI74ALVCH16344 is designed for low voltage operation VCC = 2.3V to 3.6V Hysteresis on all inputs Typical VOLP (Output Ground Bounce) < 0.8V at VCC = 3.3V, TA = 25C Typical VOHV (Output VOH Undershoot) < 2.0V at VCC = 3.3V, TA = 25C Bus Hold retains last active bus state during 3-State, eliminating the need for external pullup resistors Industrial operation at 40C to +85C Packages available: 56-pin 240 mil wide plastic TSSOP (A) 56-pin 300 mil wide plastic SSOP (V)
Product Description
Pericom Semiconductor's PI74ALVCH series of logic circuits are produced in the Company's advanced 0.5 micron CMOS technology, achieving industry leading speed. The PI74ALVCH16344 is a 1-bit to 4-bit buffer/driver designed for 2.3V to 3.6V Vcc operation. The address/driver is designed for applications where four seperate memory locations must be addressed by a single address. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. The PI74ALVCH16344 has "Bus Hold" which retains the data input's last state whenever the data input goes to high-impedance preventing "floating" inputs and eliminating the need for pullup/ down resistors.
Logic Block Diagram
OE1 1 2 A1 8 6 B14 B11 A5 36 30 B54 OE3 29 34 B51
9 A2 14 13
B21 A6 B24 42
41
B61
37
B64
OE2
28 16 B31
OE4
56 48 B71
A3
15 20 B34
A7
43 44 B74
23 B41 A4 21 27 B44 A8 49
55 B81
51
B84
1
PS8166B
10/19/99
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74ALVCH16344 1-Bit to 4-Bit Address Driver with 3-State Outputs
Product Pin Description
Pin Name OE A B GND VCC Description 3-State Output Enable Inputs (Active LOW) Inputs 3-State Outputs Ground Power
Truth Table(1)
Inputs OE L L H A H L H Outputs Bn H L Z
Product Pin Configuration
OE1 B11 B12 GND B13 B14 VCC A1 B21 B22 GND B23 B24 A2 A3 B31 B32 GND B33 B34 A4 VCC B41 B42 GND B43 B44 OE2 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 56 55 54 53 52 51 50 49 48 47 46 OE4 B81 B82 GND B83 B84 VCC A8 B71 B72 GND B73 B74 A7 A6 B61 B62 GND B63 B64 A5 VCC B51 B52 GND B53 B54 OE3
Notes: 1. H = High Signal Level L = Low Signal Level X = Don't Care or Irrelevant Z = High Impedance
56-Pin A,V
45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29
2
PS8166B
10/19/99
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74ALVCH16344 1-Bit to 4-Bit Address Driver with 3-State Outputs
Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.) Supply Voltage Range,VCC ............................................................... 0.5V to 4.6V Input Voltage Range, VI: Except I/O ports (1) .............................. 0.5V to 4.6V I/O ports (1,2) ........................... 0.5V to VCC + 0.5V Output Voltage Range, VO (1,2) ............................................ 0.5V to VCC +0.5V Input Clamp Current, IIK (VI <0) ........................................................ 50mA Output Clamp Current, IOK (VO <0) .................................................. 50mA Continuous Output Current, IO ................................................................... 50mA Continuous Current through each VCC or GND ............................... 100mA Package Thermal Impedance, JA(3) ............................................................ 39C/W Storage Temperature Range, TSTG ............................................... 65C to 150C Note:
Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
Note: 1. The input negative voltage and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. This value is limited to 4.6V maximum. 3. The package thermal impedance is calculated in accordance with JESD 51. Recommended Operating Condition(1)
Parame te rs VCC D e s cription Supply Voltage VCC = 1.65V to 1.95V VIH HIGH Level Input Voltage VCC = 2.3V to 2.7V VCC = 2.7V to 3.6V VCC = 1.65V to 1.95V VIL LO W Level Input Voltage VCC = 2.3V to 2.7V VCC = 2.7V to 3.6V VI VO Input Voltage O utput Voltage VCC = 1.65V IOH High- level O utput Current VCC = 2.3V VCC = 2.7V VCC = 3.0V VCC = 1.65V IOL Low- level O utput Current VCC = 2.3V VCC = 2.7V VCC = 3.0V t/v TA Input Transition rise or fall time O perating Free- Air Temperature 0 - 40 0 0 Te s t Conditions M in. 1.65 0.65x VCC 1.7 2 0.35x VCC 0.7 0.8 VCC VCC 4 12 12 24 4 12 12 24 10 85 ns/V C mA V Typ. M ax. 3.6 Units
Note: 1. Unused control inputs must be held at VCC or GND to ensure proper device operation.
3
PS8166B
10/19/99
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74ALVCH16344 1-Bit to 4-Bit Address Driver with 3-State Outputs
DC Electrical Characteristics (Over the Operating Range, TA = 40C to +85C, VCC = 3.3V 10%)
Parame te rs Te s t Conditions IOH = 100A IOH = 4mA IOH = 6mA VOH IOH = 12mA VCC 1.65V 2.3V 2.3V 2.7V 3.0V IOH = 24mA IOL = 100A IOL = 4mA VOL IOL = 6mA IOL = 12mA IOL = 24mA II VI = VCC or GND VI = 0.58V VI = 1.07V VI = 0.7V II (Hold) VI = 1.7V VI = 0.8V VI = 2V VI = 0 to 3.6V(2) IOZ(3) ICC ICC CI Control Inputs VO = VCC or GND VI = VCC or GND IO = 0 One input at VCC 0.6V, Other inputs at VCC or GND VI = VCC or GND 3.0V 1.65V to 3.6V 1.65V 2.3V 2.3V 2.7V 3V 3.6V 1.65V 25 25 45 45 75 75 500 10 20 750 4 8 pF A M in. Typ.(1) M ax. Units 1.65V to 3.6V VCC 0.2 1.2 2.0 1.7 2.2 2.4 2.0 0.2 0.45 0.4 0.7 0.4 0.55 5 V
2.3V
3V 3.6V 3.6V 3.6V 3V to 3.6V 3.3V 3.3V
CIO A or B ports VO = VCC or GND
Notes: 1. All typical values are at VCC = 3.3V, TA = 25C. 2. This is the bus-hold maximum dynamic current. It is the minimum overdrive current required to switch the input from one state to another. 3. For I/O ports, the IOZ includes the input leakage current.
4
PS8166B
10/19/99
Switching Characteristics over Operating Range(1)
Parame te rs tPD tEN tsk(0)(3) tDIS VCC = 2.5V 0.2V From To (INPUT) (OUTPUT) M in.(2) M ax. A OE OE B B B 1.0 1.0 1.0 5.0 6.8 6.0 VCC = 2.7V M in.(2) M ax. 4.0 6.0 5.2 VCC = 3.3V 0.3V M in.(2) 1.0 1.0 1.0 M ax. 3.6 5.0 5.0 0.35 0.5 ns Units
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74ALVCH16344 1-Bit to 4-Bit Address Driver with 3-State Outputs
tsk(0)(4)
Notes: 1. See test circuit and waveforms, Figures 1 and 2. 2. Minimum limits are guaranteed but not tested on Propagation Delays. 3. Skew between outputs of same bank, and same device and same transition. This parameter is warranted but not production tested. 4. Skew between outputs of all banks, and same device, A1-A8 tied together. This parameter is warranted but not production tested.
Operating Characteristics, TA = 25C
Parame te r CPD Power Dissipation O utputs Enabled Capacitance O utputs Disabled Te s t Conditions CL = 50pF, f = 10 MHz VCC = 2.5V 0.2V Typical 68 11 84 14 pF VCC = 3.3V 0.3V Units
5
PS8166B
10/19/99
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74ALVCH16344 1-Bit to 4-Bit Address Driver with 3-State Outputs
Parameter Measurement Information VCC = 2.5V 0.2V
Load Circuit
2 x VCC From Output Under Test CL = 30pF
(See Note A)
500
S1
Open GND
Te s t tpd tPLZ/tPZL tPHZ/tPZH
S1 O pen 2 x VCC GND
500
Voltage Waveforms Setup and Hold Times
VCC Timing Input VCC/2 0V
Voltage Waveforms Pulse Duration
tw VCC Input VCC/2 VCC/2 0V
tsu
th VCC
Data Input
VCC/2
VCC/2 0V
Voltage Waveforms Enable and Disable Times
Output Control (Low-level enabling) Output Waveform 1 S1 at 2 x VCC (see Note B)
VCC VCC/2 tPZL VCC/2 VCC/2 0V tPLZ VCC VOL +0.15V tPHZ VCC/2 VOH -0.15V VOH VOL
Voltage Waveforms Propagation Delay Times
INPUT
tPLH
VCC/2
VCC/2
tPHL
VCC 0V VCC/2 VOH VOL
tPZH
Output Waveform 2 S1 at GND (see Note B)
0V
OUTPUT
VCC/2
Figure 1. Load Circuit and Voltage Waveforms
Notes: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All inputs pulses are supplied by generators having the following characteristics: PRR 10 MHz, ZO = 50, tr 2ns, tf 2ns. D. The outputs are measured one at a time with one transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. tPZL and tPZH are the same as tten. G. tPLH and tPHL are the same as tpd. .
6
PS8166B
10/19/99
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74ALVCH16344 1-Bit to 4-Bit Address Driver with 3-State Outputs
Parameter Measurement Information VCC = 2.7V and 3.3V 0.3V
Load Circuit
6V From Output Under Test CL = 50pF
(See Note A)
500
S1
Open GND
Te s t tpd tPLZ/tPZL tPHZ/tPZH
S1 O pen 6V GND
500
Voltage Waveforms Setup and Hold Times
2.7V Timing Input 1.5V 0V
Voltage Waveforms Pulse Duration
tw 2.7V Input 1.5V 1.5V 0V
tsu
th 2.7V
Data Input
1.5V
1.5V 0V
Voltage Waveforms Enable and Disable Times
Output Control (Low-level enabling)
2.7V 1.5V tPZL 1.5V 0V tPLZ 3V 1.5V VOL +0.3V
Voltage Waveforms Propagation Delay Times
Output Waveform 1 S1 at 6V (see Note B)
INPUT
tPLH
1.5V
1.5V
tPHL
2.7V 0V 1.5V VOH VOL
VOL
tPZH
Output Waveform 2 S1 at GND (see Note B)
tPHZ 1.5V VOH -0.3V
VOH
0V
OUTPUT
1.5V
Figure 2. Load Circuit and Voltage Waveforms
Notes: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All inputs pulses are supplied by generators having the following characteristics: PRR 10 MHz, ZO = 50, tr 2 ns, tf 2 ns. D. The outputs are measured one at a time with one transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. tPZL and tPZH are the same as tten. G. tPLH and tPHL are the same as tpd. . Pericom Semiconductor Corporation 2380 Bering Drive * San Jose, CA 95131 * 1-800-435-2336 * Fax (408) 435-1100 * http://www.pericom.com
7
PS8166B 10/19/99

▲Up To Search▲

Price & Availability of PI74ALVCH16344

	To Download PI74ALVCH16344 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .