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TPS79901, TPS79915, TPS79916, TPS79918 TPS79925, TPS79927, TPS79928, TPS799285 TPS79929, TPS79930, TPS79932, TPS79933
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SBVS056C - JANUARY 2005 - REVISED MAY 2005
200mA Low Quiescent Current, Ultra-Low Noise, High PSRR, Low Dropout Linear Regulator
FEATURES
* * * 200mA Low Dropout Regulator with EN Low IQ: 40A Available in Multiple Output Voltage Versions: - Fixed Outputs of 1.5V, 1.6V, 1.8V, 2.5V, 2.7V, 2.8V, 2.85V, 2.9V, 3.0V, 3.2V and 3.3V - Adjustable Outputs from 1.2V to 6.5V - Additional Outputs Available Using Innovative Factory EEPROM Programming High PSRR: 66dB at 1kHz Ultra-low Noise: 29.5VRMS Fast Start-Up Time: 45s Stable with a 2.0F Ceramic Output Capacitance Excellent Load/Line Transient Response 2% Overall Accuracy (Load/Line/Temp) Very Low Dropout: 100mV ThinSOT-23, WCSP, and 2mm x 2mm SON (Available 9/05) Packages
DESCRIPTION
The TPS799xx family of low-dropout (LDO) low-power linear regulators offer excellent AC performance with very low ground current. High power-supply rejection ratio (PSRR), low noise, fast start-up, and excellent line and load transient response are provided while consuming a very low 40A (typical) ground current. The TPS799xx is stable with ceramic capacitors and uses an advanced BiCMOS fabrication process to yield dropout voltage typically 110mV at 200mA output. The TPS799xx uses a precision voltage reference and feedback loop to achieve overall accuracy of 2% over all load, line, process, and temperature variations. It is fully specified from TJ = -40C to +125C and is offered in low profile ThinSOT23 and Wafer Chip-Scale packages (WCSP), ideal for wireless handsets and WLAN cards.
* * * * * * * *
APPLICATIONS
* * * * Cellular Phones Wireless LAN, BluetoothTM VCOs, RF Handheld Organizers, PDAs
TPS799xxDDC TSOT23-5 (TOP VIEW) TPS79901DDC TSOT23-5 (TOP VIEW) TPS799xxYZU WCSP PACKAGE (TOP VIEW) C3 C1 B2 A3 A1 TPS79901YZU WCSP PACKAGE (TOP VIEW) C3 C1 B2 A3 A1
IN GND EN
1 2 3
5
OUT
IN GND
1 2 3
5
OUT
IN GND
OUT
IN GND
OUT
4
NR
EN
4
FB
NR
EN
FB
EN
TPS799xx DRV PACKAGE 2mm x 2mm SON (TOP VIEW) OUT NR GND 1 2 3 6 5 4 IN N/C EN
TPS79901 DRV PACKAGE 2mm x 2mm SON (TOP VIEW) OUT FB GND 1 2 3 6 5 4 IN N/C EN
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Bluetooth is a trademark of Bluetooth SIG, Inc. All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Copyright (c) 2005, Texas Instruments Incorporated
TPS79901, TPS79915, TPS79916, TPS79918 TPS79925, TPS79927, TPS79928, TPS799285 TPS79929, TPS79930, TPS79932, TPS79933
SBVS056C - JANUARY 2005 - REVISED MAY 2005
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This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications. ORDERING INFORMATION (1)
PRODUCT TPS799xxyyyz VOUT (2) XX is nominal output voltage (for example, 28 = 2.8V, 285 = 2.85V, 01 = Adjustable). YYY is package designator. Z is package quantity.
(1) (2)
For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com. Output voltages from 1.2V to 4.5V in 50mV increments are available through the use of innovative factory EEPROM programming; minimum order quantities may apply. Contact factory for details and availability. PRODUCT TPS79901 TPS79915 TPS79916 TPS79918 TPS79925 TPS79927 TPS79928 TPS79285 TPS79929 TPS79930 TPS79932 TPS79933 VOLTAGE Adjustable 1.2V to 5.5V (1) 1.5V 1.6V 1.8V 2.5V 2.7V 2.8V 2.85V 2.9V 3.0V 3.2V 3.3V PACKAGE-LEAD (DESIGNATOR) SOT23 (DDC) WCSP (YZU) SOT23 (DDC) WCSP (YZU) WCSP (YZU) SOT23 (DDC) WCSP (YZU) SOT23 (DDC) WCSP (YZU) WCSP (YZU) SOT23 (DDC) WCSP (YZU) SOT23 (DDC) WCSP (YZU) WCSP (YZU) SOT23 (DDC) WCSP (YZU) WCSP (YZU) SOT23 (DDC) WCSP (YZU) PACKAGE MARKING AWT E9 AWU EA F2 AWV EB AWW EC F5 AWX ED AXY EE EZ AXZ EF F4 AXX EG
(1)
For fixed 1.2V operation, tie FB to OUT.
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TPS79901, TPS79915, TPS79916, TPS79918 TPS79925, TPS79927, TPS79928, TPS799285 TPS79929, TPS79930, TPS79932, TPS79933
SBVS056C - JANUARY 2005 - REVISED MAY 2005
ABSOLUTE MAXIMUM RATINGS
Over operating temperature range (unless otherwise noted) (1)
PARAMETER VIN range VEN range VOUT range Peak output current Continuous total power dissipation Junction temperature range, TJ Storage junction temperature range , TSTG ESD rating, HBM ESD rating, CDM (1) TPS799xx -0.3 to +7.0 -0.3 to VIN +0.3 -0.3 to VIN +0.3 Internally limited See Dissipation Ratings Table -55 to +150 -55 to +150 2 500 C C kV V UNIT V V V
Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may degrade device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those specified is not implied.
DISSIPATION RATINGS
BOARD Low-K (1) High-K (2) Low-K (1) High-K (2) (1) (2) PACKAGE DDC DDC YZU YZU RJC 90C/W 90C/W 27C/W 27C/W RJA 280C 200C 255C 190C DERATING FACTOR ABOVE TA = 25C 3.6mW/C 5.0mW/C 3.9mW/C 5.3mW/C TA < 25C 360mW 500mW 390mW 530mW TA = 70C 200mW 275mW 215mW 295mW TA = 85C 145mW 200mW 155mW 215mW
The JEDEC low-K (1s) board used to derive this data was a 3in x 3in, two-layer board with 2-ounce copper traces on top of the board. The JEDEC high-K (2s2p) board used to derive this data was a 3in x 3in, multilayer board with 1-ounce internal power and ground planes and 2-ounce copper traces on top and bottom of the board.
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TPS79901, TPS79915, TPS79916, TPS79918 TPS79925, TPS79927, TPS79928, TPS799285 TPS79929, TPS79930, TPS79932, TPS79933
SBVS056C - JANUARY 2005 - REVISED MAY 2005
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ELECTRICAL CHARACTERISTICS
Over operating temperature range (TJ = - 40C to +125C), VIN = VOUT(TYP) + 0.3V or 2.7V, whichever is greater; IOUT = 1mA, VEN = VIN, COUT = 2.2F, CNR = 0.01F, unless otherwise noted. For TPS79901, VOUT = 3.0V. Typical values are at TJ = +25C.
PARAMETER VIN VFB VOUT VOUT VOUT VOUT%/ VIN Input voltage range (1) Internal reference (TPS79901) Output voltage range (TPS79901) Output accuracy Output accuracy (1) Nominal Over VIN, IOUT, Temp TJ = +25C VOUT + 0.3V VIN 6.5V 500A IOUT 200mA VOUT(NOM) + 0.3V VIN 6.5V 500A IOUT 200mA VOUT < 3.3V IOUT = 200mA VOUT 3.3V IOUT = 200mA VOUT = 0.9 x VOUT(NOM) 500A IOUT 200mA VEN 0.4V, 2.7V VIN 6.5V -0.5 f = 100Hz PSRR Power-supply rejection ratio VIN = 3.85V, VOUT = 2.85V, CNR = 0.01F, IOUT = 100mA Output noise voltage BW = 10Hz - 100kHz, VOUT = 2.8V Startup time VOUT = 2.85V, RL = 14, COUT = 2.2F Enable high (enabled) Enable low (shutdown) Enable pin current, enabled Thermal shutdown temperature Operating junction temperature Under voltage lockout Hysteresis VIN rising VIN falling VEN = VIN = 6.5V Shutdown, temperature increasing Reset, temperature decreasing -40 1.90 2.20 70 f = 1kHz f = 10kHz f = 100kHz VN CNR = 0.01F CNR = none CNR = 0.001F TSTR CNR = 0.047F CNR = 0.01F CNR = none VEN(HI) VEN(LO) IEN(HI) TSD TJ UVLO 1.2 0 0.03 165 145 +125 2.50 70 66 51 38 29.5 263 45 45 50 50 VIN 0.4 1.0 200 TEST CONDITIONS MIN 2.7 1.169 VFB -1.0 -2.0 1.0 0.02 0.002 100 90 400 40 0.15 175 160 600 60 1.0 0.5 1.193 TYP MAX 6.5 1.217 6.5-VDO +1.0 +2.0 UNIT V V V % % %/V %/mA mV mV mA A A A dB dB dB dB VRMS VRMS s s s s V V A C C C V mV
Line regulation (1) Dropout voltage (2) (VIN = VOUT(NOM) - 0.1V) Dropout voltage (VIN = VOUT(NOM) - 0.1V) Output current limit Ground pin current Shutdown current (IGND) Feedback pin current (TPS79901)
VOUT%/ IOUT Load regulation VDO VDO ICL IGND ISHDN IFB
(1) (2)
Minimum VIN = VOUT + VDO or 2.7V, whichever is greater. VDO is not measured for devices with VOUT(NOM) < 2.8V because minimum VIN = 2.7V.
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TPS79901, TPS79915, TPS79916, TPS79918 TPS79925, TPS79927, TPS79928, TPS799285 TPS79929, TPS79930, TPS79932, TPS79933
SBVS056C - JANUARY 2005 - REVISED MAY 2005
DEVICE INFORMATION FUNCTIONAL BLOCK DIAGRAMS
IN 400 Current Limit EN Thermal Shutdown 2A Current Limit Overshoot Detect EN Thermal Shutdown 3.3M OUT IN 400 OUT
Overshoot Detect
UVLO Quickstart 1.193V Bandgap 500k
UVLO
NR
1.193V Bandgap 500k
FB
GND
GND
Figure 1. Fixed Voltage Versions
Figure 2. Adjustable Voltage Versions
Table 1. PIN DESCRIPTIONS
TPS799xx NAME IN GND EN NR FB OUT DDC 1 2 3 4 4 5 YZU C3 B2 A1 A3 A3 C1 DESCRIPTION Input supply. Ground Driving the enable pin (EN) high turns on the regulator. Driving this pin low puts the regulator into shutdown mode. EN can be connected to IN if not used. Fixed voltage versions only; connecting an external capacitor to this pin bypasses noise generated by the internal bandgap. This allows output noise to be reduced to very low levels. Adjustable version only; this is the input to the control loop error amplifier, and is used to set the output voltage of the device. Output of the regulator. A small capacitor (total typical capacitance 2.0F ceramic) is needed from this pin to ground to assure stability.
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TPS79901, TPS79915, TPS79916, TPS79918 TPS79925, TPS79927, TPS79928, TPS799285 TPS79929, TPS79930, TPS79932, TPS79933
SBVS056C - JANUARY 2005 - REVISED MAY 2005
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TYPICAL CHARACTERISTICS
Over operating temperature range (TJ=- 40C to +125C), VIN=VOUT(TYP) + 0.3V or 2.7V, whichever is greater; IOUT=1mA, VEN = VIN, COUT=2.2F, CNR=0.01F, unless otherwise noted. For TPS79901, VOUT=3.0V. Typical values are at TJ=+25C.
LOAD REGULATION
28.50 21.38 Change in VOUT (mV) Change in VOUT (%) 14.25 7.13 0 -7.13 -14.25 -21.38 -28.50 0 50 100 IOUT (mA) 150 200 TJ = +125C TJ = +85C TJ = +25C TJ = -40C 1.0 0.8 0.6 0.4 0.2 0 -0.2 -0.4 -0.6 -0.8 -1.0 2.5 3.5 4.5 VIN (V) 5.5 6.5 7.5 TJ = +85C TJ = +125C TJ = -40C TJ = +25C
LINE REGULATION
IOUT = 100mA
Figure 3. OUTPUT VOLTAGE vs JUNCTION TEMPERATURE
2.0 1.5 Change in VOUT (%) 1.0 IOUT = 1mA 0.5 0 -0.5 -1.0 -1.5 -2.0 -40 -25 -15 5 20 35 50 65 80 95 110 125 IOUT = 200mA VDO (mV) IOUT = 100mA 200 180 160 140 120 100 80 60 40 20 0 0 50
Figure 4. TPS799285 DROPOUT VOLTAGE vs OUTPUT CURRENT
TJ = +125C TJ = +85C
TJ = +25C
TJ = -40C
100 I OUT (mA)
150
200
TJ (C)
Figure 5. TPS799285 DROPOUT VOLTAGE vs JUNCTION TEMPERATURE
200 180 160 140 VDO (mV) 120 100 80 60 40 20 0 -40 -25 -15 5 20 35 50 65 80 95 110 125 IOUT = 1mA IOUT = 100mA I OUT = 200mA VDO (mV) 110 100 90 80 70 60 50 40 30 20 10 0 2.5 3.0 3.5 4.0
Figure 6. TPS79901 DROPOUT vs INPUT VOLTAGE
I OUT = 200mA
4.5
5.0
5.5
6.0
6.5
7.0
TJ (C)
VIN (V)
Figure 7. 6
Figure 8.
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TPS79901, TPS79915, TPS79916, TPS79918 TPS79925, TPS79927, TPS79928, TPS799285 TPS79929, TPS79930, TPS79932, TPS79933
SBVS056C - JANUARY 2005 - REVISED MAY 2005
TYPICAL CHARACTERISTICS (continued)
Over operating temperature range (TJ=- 40C to +125C), VIN=VOUT(TYP) + 0.3V or 2.7V, whichever is greater; IOUT=1mA, VEN = VIN, COUT=2.2F, CNR=0.01F, unless otherwise noted. For TPS79901, VOUT=3.0V. Typical values are at TJ=+25C.
GROUND PIN CURRENT vs INPUT VOLTAGE
60 50 IOUT = 200mA 40 IGND (A) 30 20 10 0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 7.0 IGND (A) IOUT = 500A 40 30 20 10 0 -40 -25 -15 5 20 35 50 65 80 95 110 125 60 50 VIN = 3.2V VIN = 5.0V
TPS799285 GROUND PIN CURRENT vs JUNCTION TEMPERATURE
VIN = 2.7V (dropout)
VOUT = 2.85V IOUT = 200mA
VIN (V)
TJ (C)
Figure 9. GROUND PIN CURRENT (DISABLED) vs JUNCTION TEMPERATURE
600 500 70 PSRR (dB) 400 IGND (nA) 300 200 VIN = 6.5V 100 VIN = 3.2V 0 -40 -25 -15 5 20 35 50 65 80 95 110 125 TJ (C) 10 0 10 100 1k 60 50 40 30 20 CNR = 0.01F COUT = 2.2F IOUT = 200mA VEN = 0.4V
Figure 10. TPS799285 POWER-SUPPLY RIPPLE REJECTION vs FREQUENCY (VIN- VOUT = 1.0V)
90 80 I OUT = 100mA I OUT = 1mA
10k
100k
1M
10M
Frequency (Hz)
Figure 11.
Figure 12.
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TPS79901, TPS79915, TPS79916, TPS79918 TPS79925, TPS79927, TPS79928, TPS799285 TPS79929, TPS79930, TPS79932, TPS79933
SBVS056C - JANUARY 2005 - REVISED MAY 2005
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TYPICAL CHARACTERISTICS (continued)
Over operating temperature range (TJ=- 40C to +125C), VIN=VOUT(TYP) + 0.3V or 2.7V, whichever is greater; IOUT=1mA, VEN = VIN, COUT=2.2F, CNR=0.01F, unless otherwise noted. For TPS79901, VOUT=3.0V. Typical values are at TJ=+25C.
TPS799285 POWER-SUPPLY RIPPLE REJECTION vs FREQUENCY (VIN- VOUT = 0.5V)
90 80 70 PSRR (dB) 60 50 40 30 20 10 0 10 100 1k 10k 100k 1M 10M Frequency (Hz) CNR = 0.01F COUT = 2.2F IOUT = 200mA PSRR (dB) IOUT = 100mA IOUT = 1mA
TPS799285 POWER-SUPPLY RIPPLE REJECTION vs FREQUENCY (VIN- VOUT = 0.25V)
90 80 70 60 50 40 30 20 10 0 10 100 1k 10k 100k 1M 10M Frequency (Hz) CNR = 0.01F COUT = 2.2F IOUT = 100mA IOUT = 200mA IOUT = 1mA
Figure 13. TPS799285 POWER-SUPPLY RIPPLE REJECTION vs FREQUENCY (VIN- VOUT = 1.0V)
90 80 70 PSRR (dB) 60 50 40 30 20 10 0 10 100 1k 10k 100k 1M 10M Frequency (Hz) CNR = 0.01F COUT = 10.0F IOUT = 200mA PSRR (dB) IOUT = 1mA
Figure 14. TPS799285 POWER-SUPPLY RIPPLE REJECTION vs FREQUENCY (VIN- VOUT = 0.25V)
90 80 70 60 50 40 30 20 10 0 10 100 1k 10k 100k 1M 10M Frequency (Hz) CNR = 0.01F COUT = 10.0F IOUT = 200mA IOUT = 1mA
Figure 15. TPS799285 POWER-SUPPLY RIPPLE REJECTION vs FREQUENCY (VIN- VOUT = 1.0V)
90 80 70 PSRR (dB) 60 50 40 30 20 10 0 10 100 1k 10k 100k 1M 10M Frequency (Hz) IOUT = 200mA CNR = None COUT = 10.0F PSRR (dB) IOUT = 1mA 90 80 70 60 50 40 10kHz 30 20 10 0 0.0 CNR = 0.01F COUT = 2.2F 0.5 1.0 1.5 1MHz 0.1kHz
Figure 16. POWER-SUPPLY RIPPLE REJECTION vs VIN - VOUT, IOUT = 1mA
1kHz
100kHz
2.0
2.5
3.0
3.5
4.0
VIN - VOUT (V)
Figure 17. 8
Figure 18.
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TPS79901, TPS79915, TPS79916, TPS79918 TPS79925, TPS79927, TPS79928, TPS799285 TPS79929, TPS79930, TPS79932, TPS79933
SBVS056C - JANUARY 2005 - REVISED MAY 2005
TYPICAL CHARACTERISTICS (continued)
Over operating temperature range (TJ=- 40C to +125C), VIN=VOUT(TYP) + 0.3V or 2.7V, whichever is greater; IOUT=1mA, VEN = VIN, COUT=2.2F, CNR=0.01F, unless otherwise noted. For TPS79901, VOUT=3.0V. Typical values are at TJ=+25C.
POWER-SUPPLY RIPPLE REJECTION vs VIN - VOUT, IOUT = 100mA
90 80 70 60 PSRR (dB) 50 40 30 100kHz 20 10 0 0.0 0.5 1.0 1.5 2.0 2.5 1MHz CNR = 0.01F COUT = 2.2F 3.0 3.5 4.0 PSRR (dB) 10kHz 0.1kHz 1kHz 90 80 70 60 50 40 30 20 10 0 0.0 0.5 1.0 1.5 2.0 2.5 1MHz 100kHz CNR = 0.01F COUT = 2.2F 3.0 3.5 4.0 10kHz 0.1kHz 1kHz
POWER-SUPPLY RIPPLE REJECTION vs VIN- VOUT, IOUT = 200mA
VIN - VOUT (V)
VIN - VOUT (V)
Figure 19. TPS799285 TOTAL NOISE vs CNR
200 180 160 Total Noise (Vrms) 140 PSRR (dB) 120 100 80 60 40 20 0 0.01 0.1 CNR (nF) 1 10 5 0 0 5 IOUT = 1mA COUT = 2.2F 35 30 25 20 15 10
Figure 20. TPS799285 TOTAL NOISE vs COUT
IOUT = 1mA CNR = 0.01F 10 COUT (F) 15 20 25
Figure 21. TPS799285 LINE TRANSIENT RESPONSE
IOUT = 150mA COUT = 10F 20mV/div VOUT 100mV/div 100mV/div
Figure 22. TPS799285 LOAD TRANSIENT RESPONSE
VIN = 3.35V COUT = 2.2F IOUT COUT = 10 F
IOUT
20mV/div
C OUT = 2.2F 4.15V dVIN dt
VOUT = 1V/s VIN 20s/div 100mA/div
150mA 1mA IOUT
1V/div
3.15V
20s/div
Figure 23.
Figure 24.
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TPS79901, TPS79915, TPS79916, TPS79918 TPS79925, TPS79927, TPS79928, TPS799285 TPS79929, TPS79930, TPS79932, TPS79933
SBVS056C - JANUARY 2005 - REVISED MAY 2005
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TYPICAL CHARACTERISTICS (continued)
Over operating temperature range (TJ=- 40C to +125C), VIN=VOUT(TYP) + 0.3V or 2.7V, whichever is greater; IOUT=1mA, VEN = VIN, COUT=2.2F, CNR=0.01F, unless otherwise noted. For TPS79901, VOUT=3.0V. Typical values are at TJ=+25C.
TPS799285 TURN-ON RESPONSE (VEN = VIN)
RLOAD = 19 COUT = 2.2F RLOAD = 2.85k C OUT = 2.2F, 10F 1V/div 1V/div VOUT
TPS799285 ENABLE RESPONSE
RLOAD = 19, 2.85k COUT = 2.2F VIN = 3.85V RLOAD = 19, 2.85k COUT = 10F VOUT
3.85V 0V 4V/div VIN 5V/div VEN
10s/div
10s/div
Figure 25. TPS799285 POWER-UP / POWER-DOWN
7 RL = 19 6 VIN 5 4 Volts 3 2 1 0 -1 50ms/div VOUT
Figure 26.
Figure 27.
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TPS79901, TPS79915, TPS79916, TPS79918 TPS79925, TPS79927, TPS79928, TPS799285 TPS79929, TPS79930, TPS79932, TPS79933
SBVS056C - JANUARY 2005 - REVISED MAY 2005
APPLICATION INFORMATION
The TPS799xx family of LDO regulators combines the high performance required of many RF and precision analog applications with ultra-low current consumption. High PSRR is provided by a high gain, high bandwidth error loop with good supply rejection at very low headroom (VIN - VOUT). Fixed voltage versions provide a noise reduction pin to bypass noise generated by the bandgap reference and to improve PSRR while a quick-start circuit fast-charges this capacitor at startup for quick startup times. The combination of high performance and low ground current also make the TPS799xx an excellent choice for portable applications. All versions have thermal and over-current protection and are fully specified from -40C to +125C. Figure 28 shows the basic circuit connections for fixed voltage models. Figure 29 gives the connections for the adjustable output version (TPS79901). R1 and R2 can be calculated for any output voltage using the formula in Figure 29. Sample resistor values for common output voltages are shown in Figure 29.
Optional input capacitor. May improve source impedance, noise, or PSRR. VIN IN EN GND OUT TPS799xx NR 2.2F Ceramic VOUT
Optional input capacitor. May improve source impedance, noise, or PSRR. VIN IN TPS799xx EN GND FB OUT
VOUT =
(R1 + R2) R2
x 1.193
VOUT R1 CFB 2.2F Ceramic
VEN
Optional bypass capacitor to reduce output noise and increase PSRR.
R2 VEN
Figure 28. Typical Application Circuit for Fixed Voltage Versions
Figure 29. Typical Application Circuit for Adjustable Voltage Version
Input and Output Capacitor Requirements
Although an input capacitor is not required for stability, it is good analog design practice to connect a 0.1F to 1F low ESR capacitor across the input supply near the regulator. This will counteract reactive input sources and improve transient response, noise rejection, and ripple rejection. A higher-value capacitor may be necessary if large, fast rise-time load transients are anticipated or the device is located several inches from the power source. If source impedance is not sufficiently low, a 0.1F input capacitor may be necessary to ensure stability. The TPS799xx is designed to be stable with standard ceramic capacitors of values 2.2F or larger. X5R and X7R type capacitors are best as they have minimal variation in value and ESR over temperature. Maximum ESR should be < 1.0.
Feedback Capacitor Requirements (TPS79901 only)
The feedback capacitor, CFB, shown in Figure 29 is required for stability. For a parallel combination of R1 and R2 equal to 250k, any value from 3pF to 1nF can be used. Fixed voltage versions have an internal 30pF feedback capacitor which is quick-charged at start-up. The adjustable version does not have this quick-charge circuit, so values below 5pF should be used to ensure fast startup; values above 47pF can be used to implement an output voltage soft-start. Larger value capacitors also improve noise slightly. The TPS79901 is stable in unity-gain configuration (OUT tied to FB) without CFB.
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TPS79901, TPS79915, TPS79916, TPS79918 TPS79925, TPS79927, TPS79928, TPS799285 TPS79929, TPS79930, TPS79932, TPS79933
SBVS056C - JANUARY 2005 - REVISED MAY 2005
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Output Noise
In most LDOs, the bandgap is the dominant noise source. If a noise reduction capacitor (CNR) is used with the TPS799xx, the bandgap does not contribute significantly to noise. Instead, noise is dominated by the output resistor divider and the error amplifier input. To minimize noise in a given application, use a 0.01F noise reduction capacitor; for the adjustable version, smaller value resistors in the output resistor divider reduce noise. A parallel combination that gives 2A of divider current will have the same noise performance as a fixed voltage version. To further optimize noise, equivalent series resistance of the output capacitor can be set to approximately 0.2. This configuration maximizes phase margin in the control loop, reducing total output noise by up to 10%. Noise can be referred to the feedback point (FB pin) such that with CNR = 0.01F total noise is approximately given by Equation 1: 10.7mVRMS VN + * VOUT V (1) The TPS79901 adjustable version does not have the noise-reduction pin available, so ultra-low noise operation is not possible. Noise can be minimized according to the above recommendations.
Board Layout Recommendations to Improve PSRR and Noise Performance
To improve ac performance such as PSRR, output noise, and transient response, it is recommended that the board be designed with separate ground planes for VIN and VOUT, with each ground plane connected only at the GND pin of the device. In addition, the ground connection for the bypass capacitor should connect directly to the GND pin of the device.
Internal Current Limit
The TPS799xx internal current limit helps protect the regulator during fault conditions. During current limit, the output will source a fixed amount of current that is largely independent of output voltage. For reliable operation, the device should not be operated in current limit for extended periods of time. The PMOS pass element in the TPS799xx has a built-in body diode that conducts current when the voltage at OUT exceeds the voltage at IN. This current is not limited, so if extended reverse voltage operation is anticipated, external limiting may be appropriate.
Shutdown
The enable pin (EN) is active high and is compatible with standard and low voltage TTL-CMOS levels. When shutdown capability is not required, EN can be connected to IN.
Dropout Voltage
The TPS799xx uses a PMOS pass transistor to achieve low dropout. When (VIN - VOUT) is less than the dropout voltage (VDO), the PMOS pass device is in its linear region of operation and the input-to-output resistance is the RDS,ON of the PMOS pass element. Because the PMOS device behaves like a resistor in dropout, VDO will approximately scale with output current. As with any linear regulator, PSRR and transient response are degraded as (VIN - VOUT) approaches dropout. This effect is shown in Figure 18 through Figure 20 in the Typical Characteristics section.
Startup
Fixed voltage versions of the TPS799xx use a quick-start circuit to fast-charge the noise reduction capacitor, CNR, if present (see Functional Block Diagrams, Figure 1). This allows the combination of very low output noise and fast start-up times. The NR pin is high impedance so a low leakage CNR capacitor must be used; most ceramic capacitors are appropriate in this configuration. Note that for fastest startup, VIN should be applied first, then the enable pin (EN) driven high. If EN is tied to IN, startup will be somewhat slower. Refer to Figure 25 and Figure 26 in the Typical Characteristics section. The quick-start switch is closed for approximately 135s. To ensure that CNR is fully charged during the quick-start time, a 0.01F or smaller capacitor should be used.
12
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TPS79901, TPS79915, TPS79916, TPS79918 TPS79925, TPS79927, TPS79928, TPS799285 TPS79929, TPS79930, TPS79932, TPS79933
SBVS056C - JANUARY 2005 - REVISED MAY 2005
Transient Response
As with any regulator, increasing the size of the output capacitor will reduce over/undershoot magnitude but increase duration of the transient response. In the adjustable version, adding CFB between OUT and FB will improve stability and transient response. The transient response of the TPS799xx is enhanced by an active pull-down that engages when the output overshoots by approximately 5% or more when the device is enabled. When enabled, the pull-down device behaves like a 350 resistor to ground.
Under-Voltage Lock-Out (UVLO)
The TPS799xx utilizes an under-voltage lock-out circuit to keep the output shut off until internal circuitry is operating properly. The UVLO circuit has a de-glitch feature so that it will typically ignore undershoot transients on the input if they are less than 50s duration.
Minimum Load
The TPS799xx is stable and well-behaved with no output load. To meet the specified accuracy, a minimum load of 500A is required. Below 500A at junction temperatures near +125C, the output can drift up enough to cause the output pull-down to turn on. The output pull-down will limit voltage drift to 5% typically but ground current could increase by approximately 50A. In typical applications, the junction cannot reach high temperatures at light loads since there is no appreciable dissipated power. The specified ground current would then be valid at no load in most applications.
Thermal Information Thermal Protection
Thermal protection disables the output when the junction temperature rises to approximately +165C, allowing the device to cool. When the junction temperature cools to approximately +145C the output circuitry is again enabled. Depending on power dissipation, thermal resistance, and ambient temperature, the thermal protection circuit may cycle on and off. This cycling limits the dissipation of the regulator, protecting it from damage due to overheating. Any tendency to activate the thermal protection circuit indicates excessive power dissipation or an inadequate heatsink. For reliable operation, junction temperature should be limited to +125C maximum. To estimate the margin of safety in a complete design (including heatsink), increase the ambient temperature until the thermal protection is triggered; use worst-case loads and signal conditions. For good reliability, thermal protection should trigger at least +35C above the maximum expected ambient condition of your particular application. This configuration produces a worst-case junction temperature of +125C at the highest expected ambient temperature and worst-case load. The internal protection circuitry of the TPS799xx has been designed to protect against overload conditions. It was not intended to replace proper heatsinking. Continuously running the TPS799xx into thermal shutdown will degrade device reliability.
Power Dissipation
The ability to remove heat from the die is different for each package type, presenting different considerations in the PCB layout. The PCB area around the device that is free of other components moves the head from the device to the ambient air. Performance data for JEDEC low- and high-K boards are given in the Dissipation Ratings table. Using heavier copper will increase the effectiveness in removing heat from the device. The addition of plated through-holes to heat-dissipating layers will also improve the heatsink effectiveness. Power dissipation depends on input voltage and load conditions. Power dissipation is equal to the product of the output current time the voltage drop across the output pass element, as shown in Equation 2: P D + VIN*V OUT @ I OUT (2)
Package Mounting
Solder pad footprint recommendations for the TPS799xx are available from the Texas Instruments' web site at www.ti.com.
13
TPS79901, TPS79915, TPS79916, TPS79918 TPS79925, TPS79927, TPS79928, TPS799285 TPS79929, TPS79930, TPS79932, TPS79933
SBVS056C - JANUARY 2005 - REVISED MAY 2005
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Thermal Information (continued)
1,052 0,952
1,416 1,316
Pin A1 Index Area
0,35 0,25
0,625 Max
0,30 0,20
NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. NanoStarTM package configuration. NanoStar is a trademark of Texas Instruments.
Figure 30. YZU Wafer Chip-Scale Preliminary Package Dimensions (mm)
14
PACKAGE OPTION ADDENDUM
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21-Jul-2005
PACKAGING INFORMATION
Orderable Device HPA00086DDCR TPS79901DDCR TPS79901DDCRG4 TPS79901DDCT TPS79901DDCTG4 TPS79915DDCR TPS79915DDCRG4 TPS79915DDCT TPS79915DDCTG4 TPS79918DDCR TPS79918DDCRG4 TPS79918DDCT TPS79918DDCTG4 TPS79925DDCR TPS79925DDCRG4 TPS79925DDCT TPS79925DDCTG4 TPS799285DDCR TPS799285DDCRG4 TPS799285DDCT TPS799285DDCTG4 TPS79928DDCR TPS79928DDCRG4 TPS79928DDCT TPS79928DDCTG4 Status (1) ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE Package Type TO/SOT TO/SOT TO/SOT TO/SOT TO/SOT TO/SOT TO/SOT TO/SOT TO/SOT TO/SOT TO/SOT TO/SOT TO/SOT TO/SOT TO/SOT TO/SOT TO/SOT TO/SOT TO/SOT TO/SOT TO/SOT TO/SOT TO/SOT TO/SOT TO/SOT Package Drawing DDC DDC DDC DDC DDC DDC DDC DDC DDC DDC DDC DDC DDC DDC DDC DDC DDC DDC DDC DDC DDC DDC DDC DDC DDC Pins Package Eco Plan (2) Qty 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 3000 TBD 3000 Green (RoHS & no Sb/Br) 3000 Green (RoHS & no Sb/Br) 250 250 Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Lead/Ball Finish Call TI CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU MSL Peak Temp (3) Call TI Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM
3000 Green (RoHS & no Sb/Br) 3000 Green (RoHS & no Sb/Br) 250 250 Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br)
3000 Green (RoHS & no Sb/Br) 3000 Green (RoHS & no Sb/Br) 250 250 Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br)
3000 Green (RoHS & no Sb/Br) 3000 Green (RoHS & no Sb/Br) 250 250 Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br)
3000 Green (RoHS & no Sb/Br) 3000 Green (RoHS & no Sb/Br) 250 250 Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br)
3000 Green (RoHS & no Sb/Br) 3000 Green (RoHS & no Sb/Br) 250 250 Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br)
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
21-Jul-2005
Orderable Device TPS79930DDCR TPS79930DDCRG4 TPS79930DDCT TPS79930DDCTG4 TPS79933DDCR TPS79933DDCRG4 TPS79933DDCT TPS79933DDCTG4
(1)
Status (1) ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE
Package Type TO/SOT TO/SOT TO/SOT TO/SOT TO/SOT TO/SOT TO/SOT TO/SOT
Package Drawing DDC DDC DDC DDC DDC DDC DDC DDC
Pins Package Eco Plan (2) Qty 5 5 5 5 5 5 5 5 3000 Green (RoHS & no Sb/Br) 3000 Green (RoHS & no Sb/Br) 250 250 Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br)
Lead/Ball Finish CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU
MSL Peak Temp (3) Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM
3000 Green (RoHS & no Sb/Br) 3000 Green (RoHS & no Sb/Br) 250 250 Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br)
The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
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