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| NTMD2P01R2 Power MOSFET -2.3 Amps, -16 Volts Dual SOIC-8 Package Features http://onsemi.com * * * * * High Efficiency Components in a Single SOIC-8 Package High Density Power MOSFET with Low RDS(on) Logic Level Gate Drive SOIC-8 Surface Mount Package, Mounting Information for SOIC-8 Package Provided Pb-Free Packages are Available VDSS -16 V RDS(ON) Typ 100 mW @ -4.5 V ID Max -2.3 A Applications P-Channel D * Power Management in Portable and Battery-Powered Products, i.e.: MAXIMUM RATINGS (TJ = 25C unless otherwise noted) Rating Drain-to-Source Voltage Gate-to-Source Voltage - Continuous Thermal Resistance - Junction-to-Ambient (Note 1) Total Power Dissipation @ TA = 25C Continuous Drain Current @ TA = 25C Continuous Drain Current @ TA = 100C Pulsed Drain Current (Note 4) Thermal Resistance - Junction-to-Ambient (Note 2) Total Power Dissipation @ TA = 25C Continuous Drain Current @ TA = 25C Continuous Drain Current @ TA = 100C Pulsed Drain Current (Note 4) Thermal Resistance - Junction-to-Ambient (Note 3) Total Power Dissipation @ TA = 25C Continuous Drain Current @ TA = 25C Continuous Drain Current @ TA = 100C Pulsed Drain Current (Note 4) Operating and Storage Temperature Range Single Pulse Drain-to-Source Avalanche Energy - Starting TJ = 25C (VDD = -16 Vdc, VGS = -4.5 Vdc, Peak IL = -5.0 Apk, L = 28 mH, RG = 25 W) Maximum Lead Temperature for Soldering Purposes, 1/8 from case for 10 seconds Symbol VDSS VGS RqJA PD ID ID IDM RqJA PD ID ID IDM RqJA PD ID ID IDM TJ, Tstg EAS Value -16 "10 175 0.71 -2.3 -1.45 -9.0 105 1.19 -2.97 -1.88 -12 62.5 2.0 -3.85 -2.43 -15 -55 to +150 350 Unit V V C/W W A A A C/W W A A A C/W W A A A C mJ Computers, Printers, PCMCIA Cards, Cellular and Cordless Telephones G S 8 1 SOIC-8 SUFFIX NB CASE 751 STYLE 11 MARKING DIAGRAM* AND PIN ASSIGNMENT D1 D1 D2 D2 8 ED2P01 AYWW G G 1 S1 G1 S2 G2 ED2P01= Specific Device Code A = Assembly Location Y = Year WW = Work Week G = Pb-Free Package (Note: Microdot may be in either location) *For additional marking information, refer to Application Note AND8002/D. ORDERING INFORMATION TL 260 C Device NTMD2P01R2 NTMD2P01R2G Package SOIC-8 SOIC-8 (Pb-Free) Shipping 2500/Tape & Reel 2500/Tape & Reel Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. 1. Minimum FR-4 or G-10 PCB, Steady State. 2. Mounted onto a 2 square FR-4 Board (1 in sq, 2 oz Cu 0.06 thick single sided), Steady State. 3. Mounted onto a 2 square FR-4 Board (1 in sq, 2 oz Cu 0.06 thick single sided), t 10 seconds. 4. Pulse Test: Pulse Width = 300 ms, Duty Cycle = 2%. (c) Semiconductor Components Industries, LLC, 2006 For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D February, 2006 - Rev. 2 1 Publication Order Number: NTMD2P01R2/D NTMD2P01R2 ELECTRICAL CHARACTERISTICS (TJ = 25C unless otherwise noted) (Note 5) Characteristic OFF CHARACTERISTICS Drain-to-Source Breakdown Voltage (VGS = 0 Vdc, ID = -250 mAdc) Temperature Coefficient (Positive) Zero Gate Voltage Drain Current (VDS = -16 Vdc, VGS = 0 Vdc, TJ = 25C) (VDS = -16 Vdc, VGS = 0 Vdc, TJ = 125C) Gate-Body Leakage Current (VGS = -10 Vdc, VDS = 0 Vdc) Gate-Body Leakage Current (VGS = +10 Vdc, VDS = 0 Vdc) ON CHARACTERISTICS Gate Threshold Voltage (VDS = VGS, ID = -250 mAdc) Temperature Coefficient (Negative) Static Drain-to-Source On-State Resistance (VGS = -4.5 Vdc, ID = -2.4 Adc) (VGS = -2.7 Vdc, ID = -1.2 Adc) (VGS = -2.5 Vdc, ID = -1.2 Adc) Forward Transconductance (VDS = -10 Vdc, ID = -1.2 Adc) DYNAMIC CHARACTERISTICS Input Capacitance Output Capacitance Reverse Transfer Capacitance (VDS = -16 Vdc, VGS = 0 Vdc, f = 1.0 MHz) Ciss Coss Crss td(on) (VDD = -10 Vdc, ID = -2.4 Adc, VGS = -4.5 Vdc, RG = 6.0 W) tr td(off) tf td(on) (VDD = -10 Vdc, ID = -1.2 Adc, VGS = -2.7 Vdc, RG = 6.0 W) tr td(off) tf (VDS = -16 Vdc, VGS = -4.5 Vdc, ID = -2.4 Adc) Qtot Qgs Qgd VSD trr (IS = -2.4 Adc, VGS = 0 Vdc, dIS/dt = 100 A/ms) Reverse Recovery Stored Charge 5. Handling precautions to protect against electrostatic discharge is mandatory. 6. Indicates Pulse Test: Pulse Width = 300 ms max, Duty Cycle = 2%. 7. Switching characteristics are independent of operating junction temperature. ta tb QRR - - - - - - - - - - - - - - - - - - - - 540 215 100 10 35 33 29 15 40 35 35 10 1.5 5.0 -0.88 -0.75 37 16 21 0.025 750 325 175 20 65 60 55 - - - - 18 - - -1.0 - - - - - mC Vdc ns nC ns ns pF VGS(th) -0.5 - - - - - -0.90 2.5 0.070 0.100 0.110 4.2 -1.5 - 0.100 0.130 0.150 - Vdc mV/C W V(BR)DSS -16 - - - - - - -12.7 - - - - - - -1.0 -10 -100 100 Vdc mV/C mAdc Symbol Min Typ Max Unit IDSS IGSS IGSS nAdc nAdc RDS(on) gFS Mhos SWITCHING CHARACTERISTICS (Notes 6 and 7) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge BODY-DRAIN DIODE RATINGS (Note 6) Diode Forward On-Voltage Reverse Recovery Time (IS = -2.4 Adc, VGS = 0 Vdc) (IS = -2.4 Adc, VGS = 0 Vdc, TJ = 125C) http://onsemi.com 2 NTMD2P01R2 4 -ID, DRAIN CURRENT (AMPS) VGS = -2.1 V VGS = -10 V VGS = -4.5 V VGS = -2.5 V 5 TJ = 25C -ID, DRAIN CURRENT (AMPS) 4 3 2 1 0 TJ = 25C VGS = -1.9 V VDS > = -10 V 3 2 VGS = -1.7 V 1 VGS = -1.5 V 0 TJ = 100C 1 1.5 TJ = 55C 2 2.5 3 0 2 4 6 8 10 -VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS) -VGS, GATE-TO-SOURCE VOLTAGE (VOLTS) Figure 1. On-Region Characteristics. RDS(on), DRAIN-TO-SOURCE RESISTANCE (W) RDS(on), DRAIN-TO-SOURCE RESISTANCE (W) Figure 2. Transfer Characteristics. 0.2 TJ = 25C 0.12 TJ = 25C 0.15 0.1 VGS = -2.7 V 0.1 0.08 VGS = -4.5 V 0.06 0.05 0 2 4 6 8 0.04 1 1.5 2 2.5 3 3.5 4 4.5 -VGS, GATE-TO-SOURCE VOLTAGE (VOLTS) -ID, DRAIN CURRENT (AMPS) Figure 3. On-Resistance vs. Gate-to-Source Voltage. Figure 4. On-Resistance vs. Drain Current and Gate Voltage. 1.6 RDS(on), DRAIN-TO-SOURCE RESISTANCE (NORMALIZED) 1.4 1.2 1 0.8 0.6 -50 ID = -2.4 A VGS = -4.5 V 1000 VGS = 0 V -IDSS, LEAKAGE (nA) 100 10 1 0.1 TJ = 125C TJ = 100C TJ = 25C -25 0 25 75 50 100 125 TJ, JUNCTION TEMPERATURE (C) 150 0.01 0 4 8 12 16 -VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS) 20 Figure 5. On-Resistance Variation with Temperature. http://onsemi.com 3 Figure 6. Drain-to-Source Leakage Current vs. Voltage. NTMD2P01R2 -VGS, GATE-TO-SOURCE VOLTAGE (VOLTS) 1500 VDS = 0 V C, CAPACITANCE (pF) 1200 900 600 300 0 Ciss VGS = 0 V TJ = 25C 5 QT 4 3 Q1 2 1 0 Q2 20 18 16 14 VGS 12 10 8 ID = -2.4 A TJ = 25C 6 8 10 12 14 6 4 2 0 -VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS) Crss Ciss Coss Crss 10 5 0 -VGS -VDS 5 10 15 20 VDS 0 2 4 Qg, TOTAL GATE CHARGE (nC) GATE-TO-SOURCE OR DRAIN-TO-SOURCE VOLTAGE (VOLTS) Figure 7. Capacitance Variation 1000 Figure 8. Gate-to-Source and Drain-to-Source Voltage versus Total Charge 100 VDD = -10 V ID = -1.2 A VGS = -2.7 V td (off) tr tf t, TIME (ns) t, TIME (ns) 100 tr td (off) td (on) 1.0 10 RG, GATE RESISTANCE (OHMS) 100 tf 10 td (on) VDD = -10 V ID = -2.4 A VGS = -4.5 V 1.0 1.0 10 RG, GATE RESISTANCE (OHMS) 100 10 Figure 9. Resistive Switching Time Variation versus Gate Resistance 2 -IS, SOURCE CURRENT (AMPS) 1.6 1.2 0.8 0.4 0 0.4 VGS = 0 V TJ = 25C Figure 10. Resistive Switching Time Variation versus Gate Resistance di/dt IS trr ta tb TIME tp IS 0.5 0.6 0.7 0.8 0.9 1 0.25 IS -VSD, SOURCE-TO-DRAIN VOLTAGE (VOLTS) Figure 11. Diode Forward Voltage versus Current Figure 12. Diode Reverse Recovery Waveform http://onsemi.com 4 NTMD2P01R2 1 Rthja(t), EFFECTIVE TRANSIENT THERMAL RESPONSE D = 0.5 0.2 Normalized to Rja at Steady State (1 inch pad) 0.0125 W 0.0563 W 0.110 W 0.273 W 0.113 W 0.436 W 0.1 0.1 0.05 0.02 0.01 Single Pulse 0.021 F 0.137 F 1.15 F 2.93 F 152 F 261 F 0.01 1E-03 1E-02 1E-01 1E+00 t, TIME (s) 1E+03 1E+02 1E+03 Figure 13. FET Thermal Response http://onsemi.com 5 NTMD2P01R2 PACKAGE DIMENSIONS SOIC-8 NB CASE 751-07 ISSUE AG -X- A 8 5 B 1 S 4 0.25 (0.010) M Y M -Y- G K NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. 751-01 THRU 751-06 ARE OBSOLETE. NEW STANDARD IS 751-07. MILLIMETERS DIM MIN MAX A 4.80 5.00 B 3.80 4.00 C 1.35 1.75 D 0.33 0.51 G 1.27 BSC H 0.10 0.25 J 0.19 0.25 K 0.40 1.27 M 0_ 8_ N 0.25 0.50 S 5.80 6.20 STYLE 11: PIN 1. SOURCE 1 2. GATE 1 3. SOURCE 2 4. GATE 2 5. DRAIN 2 6. DRAIN 2 7. DRAIN 1 8. DRAIN 1 INCHES MIN MAX 0.189 0.197 0.150 0.157 0.053 0.069 0.013 0.020 0.050 BSC 0.004 0.010 0.007 0.010 0.016 0.050 0_ 8_ 0.010 0.020 0.228 0.244 C -Z- H D 0.25 (0.010) M SEATING PLANE N X 45 _ 0.10 (0.004) ZY S M J X S SOLDERING FOOTPRINT* 1.52 0.060 7.0 0.275 4.0 0.155 0.6 0.024 1.270 0.050 SCALE 6:1 mm inches *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 61312, Phoenix, Arizona 85082-1312 USA Phone: 480-829-7710 or 800-344-3860 Toll Free USA/Canada Fax: 480-829-7709 or 800-344-3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800-282-9855 Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center 2-9-1 Kamimeguro, Meguro-ku, Tokyo, Japan 153-0051 Phone: 81-3-5773-3850 ON Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder For additional information, please contact your local Sales Representative. http://onsemi.com 6 NTMD2P01R2/D |
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