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 MC10LVEP11, MC100LVEP11 2.5V / 3.3V ECL 1:2 Differential Fanout Buffer
Description
The MC10/100LVEP11 is a differential 1:2 fanout buffer. The device is pin and functionally equivalent to the EP11 device. With AC performance the same as the EP11 device, the LVEP11 is ideal for applications requiring lower voltage. Single-ended CLK input operation is limited to a VCC w 3.0 V in PECL mode, or VEE v -3.0 V in NECL mode. The 100 Series contains temperature compensation.
Features
8 1 SOIC-8 D SUFFIX CASE 751
http://onsemi.com MARKING DIAGRAMS*
8 HVP11 ALYW G 1 1 8 KVP11 ALYW G
* 240 ps Typical Propagation Delay * Maximum Frequency > 3.0 GHz Typical * PECL Mode Operating Range: VCC = 2.375 V to 3.8 V *
with VEE = 0 V NECL Mode Operating Range: VCC = 0 V with VEE = -2.375 V to -3.8 V Open Input Default State
8 1 TSSOP-8 DT SUFFIX CASE 948R
8 HU11 ALYWG G
8 KU11 ALYWG G
* * Q Output Will Default LOW with Inputs Open or at VEE * LVDS Input Compatible * Pb-Free Packages are Available
1
1
5X MG G
DFN8 MN SUFFIX CASE 506AA H K 5X 4K = MC10 = MC100 = MC10 = MC100
1
4
1
A = Assembly Location L = Wafer Lot Y= Year W = Work Week M = Date Code G = Pb-Free Package
(Note: Microdot may be in either location) *For additional marking information, refer to Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package dimensions section on page 8 of this data sheet.
(c) Semiconductor Components Industries, LLC, 2006
December, 2006 - Rev. 11
1
Publication Order Number: MC10LVEP11/D
4K MG G 4
MC10LVEP11, MC100LVEP11
Table 1. PIN DESCRIPTION
Q0 1 8 VCC D*, D** Q0, Q0, Q1, Q1 Q0 2 7 D VCC VEE EP Q1 3 6 D PIN FUNCTION ECL Data Inputs ECL Data Outputs Positive Supply Negative Supply Exposed pad must be connected to a sufficient thermal conduit. Electrically connect to the most negative supply or leave floating open.
*Pins will default to 2/3 VCC when left open. **Pins will default LOW when left open.
Q1
4
5
VEE
Figure 1. 8-Lead Pinout (Top View) and Logic Diagram
Table 2. ATTRIBUTES
Characteristics Internal Input Pulldown Resistor Internal Input Pullup Resistor ESD Protection Human Body Model Machine Model Charged Device Model Value 75 kW 37.5 kW > 4 kV > 200 V > 2 kV Level 1 UL 94 V-0 @ 0.125 in 110 Devices
Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1) Flammability Rating Transistor Count Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test 1. For additional information, see Application Note AND8003/D. Oxygen Index: 28 to 34
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MC10LVEP11, MC100LVEP11
Table 3. MAXIMUM RATINGS
Symbol VCC VEE VI Iout TA Tstg qJA qJC qJA qJC qJA Tsol Parameter PECL Mode Power Supply NECL Mode Power Supply PECL Mode Input Voltage NECL Mode Input Voltage Output Current Operating Temperature Range Storage Temperature Range Thermal Resistance (Junction-to-Ambient) Thermal Resistance (Junction-to-Case) Thermal Resistance (Junction-to-Ambient) Thermal Resistance (Junction-to-Case) Thermal Resistance (Junction-to-Ambient) Wave Solder Pb Pb-Free 0 lfpm 500 lfpm Standard Board 0 lfpm 500 lfpm Standard Board 0 lfpm 500 lfpm <2 to 3 sec @ 248C <2 to 3 sec @ 260C SOIC-8 SOIC-8 SOIC-8 TSSOP-8 TSSOP-8 TSSOP-8 DFN8 DFN8 Condition 1 VEE = 0 V VCC = 0 V VEE = 0 V VCC = 0 V Continuous Surge VI v VCC VI w VEE Condition 2 Rating 6 -6 6 -6 50 100 -40 to +85 -65 to +150 190 130 41 to 44 185 140 41 to 44 129 84 265 265 Unit V V V V mA mA C C C/W C/W C/W C/W C/W C/W C/W C/W C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability.
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MC10LVEP11, MC100LVEP11
Table 4. 10LVEP DC CHARACTERISTICS, PECL VCC = 2.5 V, VEE = 0 V (Note 2)
-40C Symbol IEE VOH VOL VIHCMR Characteristic Power Supply Current Output HIGH Voltage (Note 3) Output LOW Voltage (Note 3) Input HIGH Voltage Common Mode Range (Differential Configuration) (Note 4) Input HIGH Current Input LOW Current D D 0.5 -150 Min 25 1365 565 1.2 Typ 33 1490 740 Max 40 1615 865 2.5 Min 29 1430 630 1.2 25C Typ 33 1555 805 Max 40 1680 930 2.5 Min 32 1490 690 1.2 85C Typ 34 1615 865 Max 42 1740 990 2.5 Unit mA mV mV V
IIH IIL
150 0.5 -150
150 0.5 -150
150
mA mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 2. Input and output parameters vary 1:1 with VCC. VEE can vary +0.125 V to -1.3 V. 3. All loading with 50 W to VCC - 2.0 V. 4. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal. Single-Ended input CLK pin operation is limited to VCC w 3.0 V in PECL mode.
Table 5. 10LVEP DC CHARACTERISTICS, PECL VCC = 3.3 V, VEE = 0 V (Note 5)
-40C Symbol IEE VOH VOL VIH VIL VIHCMR Characteristic Power Supply Current Output HIGH Voltage (Note 6) Output LOW Voltage (Note 6) Input HIGH Voltage (Single-Ended) (Note 7) Input LOW Voltage (Single-Ended) (Note 7) Input HIGH Voltage Common Mode Range (Differential Configuration) (Note 8) Input HIGH Current Input LOW Current D D 0.5 -150 Min 25 2165 1365 2090 1365 1.2 Typ 33 2290 1540 Max 40 2415 1665 2415 1690 3.3 Min 29 2230 1430 2155 1430 1.2 25C Typ 33 2355 1605 Max 40 2480 1730 2480 1755 3.3 Min 32 2290 1490 2215 1490 1.2 85C Typ 34 2415 1665 Max 42 2540 1790 2540 1815 3.3 Unit mA mV mV mV mV V
IIH IIL
150 0.5 -150
150 0.5 -150
150
mA mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 5. Input and output parameters vary 1:1 with VCC. VEE can vary +0.925 V to -0.5 V. 6. All loading with 50 W to VCC - 2.0 V. 7. Single-Ended input CLK pin operation is limited to VCC w 3.0 V in PECL mode. 8. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal.
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MC10LVEP11, MC100LVEP11
Table 6. 10LVEP DC CHARACTERISTICS, NECL VCC = 0 V, VEE = -3.8 V to -2.375 V (Note 9)
-40C Symbol IEE VOH VOL VIH VIL VIHCMR Characteristic Power Supply Current Output HIGH Voltage (Note 10) Output LOW Voltage (Note 10) Input HIGH Voltage (Single-Ended) (Note 11) Input LOW Voltage (Single-Ended) (Note 11) Input HIGH Voltage Common Mode Range (Differential Configuration) (Note 12) Input HIGH Current Input LOW Current D D 0.5 -150 Min 25 -1135 -1935 -1210 -1935 VEE+1.2 Typ 33 -1010 -1760 Max 40 -885 -1635 -885 -1610 0.0 Min 29 -1070 -1870 -1145 -1870 VEE+1.2 25C Typ 33 -945 -1695 Max 40 -820 -1570 -820 -1545 0.0 Min 32 -1010 -1810 -1085 -1810 VEE+1.2 85C Typ 34 -885 -1635 Max 42 -760 -1510 -760 -1485 0.0 Unit mA mV mV mV mV V
IIH IIL
150 0.5 -150
150 0.5 -150
150
mA mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 9. Input and output parameters vary 1:1 with VCC. 10. All loading with 50 W to VCC - 2.0 V. 11. Single-Ended input CLK pin operation is limited to VEE v -3.0 V in NECL mode. 12. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal.
Table 7. 100LVEP DC CHARACTERISTICS, PECL VCC = 2.5 V, VEE = 0 V (Note 13)
-40C Symbol IEE VOH VOL VIH VIL VIHCMR Characteristic Power Supply Current Output HIGH Voltage (Note 14) Output LOW Voltage (Note 14) Input HIGH Voltage (Single-Ended) Input LOW Voltage (Single-Ended) Input HIGH Voltage Common Mode Range (Differential Configuration) (Note 15) Input HIGH Current Input LOW Current D D 0.5 -150 Min 25 1355 555 1335 555 1.2 Typ 35 1480 730 Max 42 1605 900 1620 900 2.5 Min 29 1355 555 1335 555 1.2 25C Typ 38 1480 730 Max 46 1605 900 1620 900 2.5 Min 32 1355 555 1335 555 1.2 85C Typ 41 1480 730 Max 50 1605 900 1620 900 2.5 Unit mA mV mV mV mV V
IIH IIL
150 0.5 -150
150 0.5 -150
150
mA mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 13. Input and output parameters vary 1:1 with VCC. VEE can vary +0.125 V to -1.3 V. 14. All loading with 50 W to VCC - 2.0 V. 15. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal. Single-Ended input CLK pin operation is limited to VCC w 3.0 V in PECL mode.
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MC10LVEP11, MC100LVEP11
Table 8. 100LVEP DC CHARACTERISTICS, PECL VCC = 3.3 V, VEE = 0 V (Note 16)
-40C Symbol IEE VOH VOL VIH VIL VIHCMR Characteristic Power Supply Current Output HIGH Voltage (Note 17) Output LOW Voltage (Note 17) Input HIGH Voltage (Single-Ended) (Note 18) Input LOW Voltage (Single-Ended) (Note 18) Input HIGH Voltage Common Mode Range (Differential Configuration) (Note 19) Input HIGH Current Input LOW Current D D 0.5 -150 Min 25 2155 1355 2135 1355 1.2 Typ 35 2280 1530 Max 42 2405 1700 2420 1700 3.3 Min 29 2155 1355 2135 1355 1.2 25C Typ 38 2280 1530 Max 46 2405 1700 2420 1700 3.3 Min 32 2155 1355 2135 1355 1.2 85C Typ 41 2280 1530 Max 50 2405 1700 2420 1700 3.3 Unit mA mV mV mV mV V
IIH IIL
150 0.5 -150
150 0.5 -150
150
mA mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 16. Input and output parameters vary 1:1 with VCC. VEE can vary +0.925 V to -0.5 V. 17. All loading with 50 W to VCC - 2.0 V. 18. Single-Ended input CLK pin operation is limited to VCC w 3.0 V in PECL mode. 19. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal.
Table 9. 100LVEP DC CHARACTERISTICS, NECL VCC = 0 V; VEE = -3.8 V to -2.375 V (Note 20)
-40C Symbol IEE VOH VOL VIH VIL VIHCMR Characteristic Power Supply Current Output HIGH Voltage (Note 21) Output LOW Voltage (Note 21) Input HIGH Voltage (Single-Ended) (Note 22) Input LOW Voltage (Single-Ended) (Note 22) Input HIGH Voltage Common Mode Range (Differential Configuration) (Note 23) Input HIGH Current Input LOW Current D D 0.5 -150 Min 25 -1145 -1945 -1165 -1945 -1425 Typ 35 -1020 -1770 Max 42 -895 -1600 -880 -1600 0.0 Min 29 -1145 -1945 -1165 -1945 -1425 25C Typ 38 -1020 -1770 Max 46 -895 -1600 -880 -1600 0.0 Min 32 -1145 -1945 -1165 -1945 -1425 85C Typ 41 -1020 -1770 Max 50 -895 -1600 -880 -1600 0.0 Unit mA mV mV mV mV V
VEE+1.2
VEE+1.2
VEE+1.2
IIH IIL
150 0.5 -150
150 0.5 -150
150
mA mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 20. Input and output parameters vary 1:1 with VCC. 21. All loading with 50 W to VCC - 2.0 V. 22. Single-Ended input CLK pin operation is limited to VEE -3.0 V in NECL mode. 23. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input signal.
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MC10LVEP11, MC100LVEP11
Table 10. AC CHARACTERISTICS VCC = 0 V; VEE = -3.8 V to -2.375 V or VCC = 2.375 V to 3.8 V; VEE = 0 V (Note 24)
-40C Symbol fmax tPLH, tPHL tSKEW tJITTER Characteristic Maximum Frequency (Figure 2) Propagation Delay (Differential Configuration) CLK to Q, Q Within Device Skew Q, Q Device to Device Skew (Note 25) CLOCK Random Jitter (RMS) @ v1.0 GHz @ v1.5 GHz @ v2.0 GHz @ v2.5 GHz @ v3.0 GHz Input Voltage Swing (Differential Configuration) Output Rise/Fall Times (20% - 80%) Q, Q 150 70 5.0 20 130 0.3 0.2 0.3 0.2 0.2 1200 170 150 80 5.0 20 130 0.4 0.3 0.2 0.3 0.3 1200 180 150 100 5.0 20 150 0.3 0.2 0.3 0.3 0.6 1200 200 ps ps 170 Min Typ 3 230 300 180 Max Min 25C Typ 3 240 310 210 Max Min 85C Typ 3 270 360 Max Unit GHz ps
0.126 0.112 0.111 0.112 0.155 800 110
0.142 0.162 0.122 0.172 0.217 800 120
0.209 0.162 0.170 0.235 0.368 800 140
VPP tr tf
mV ps
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 24. Measured using a 750 mV source, 50% duty cycle clock source. All loading with 50 W to VCC - 2.0 V. 25. Skew is measured between outputs under identical transitions.
1000 900 VOUTpp (mV) 800 700 600 500 400 300 200 100 0 0
3.3 V 2.5 V
1000
2000 FREQUENCY (MHz)
3000
4000
Figure 2. Fmax Typical
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MC10LVEP11, MC100LVEP11
Q Driver Device Q Zo = 50 W 50 W 50 W D Zo = 50 W D Receiver Device
VTT VTT = VCC - 2.0 V
Figure 3. Typical Termination for Output Driver and Device Evaluation (See Application Note AND8020/D - Termination of ECL Logic Devices.)
ORDERING INFORMATION
Device MC10LVEP11D MC10LVEP11DG MC10LVEP11DR2 MC10LVEP11DR2G MC10LVEP11DT MC10LVEP11DTG MC10LVEP11DTR2 MC10LVEP11DTR2G MC10LVEP11MNR4 MC10LVEP11MNR4G MC100LVEP11D MC100LVEP11DG MC100LVEP11DR2 MC100LVEP11DR2G MC100LVEP11DT MC100LVEP11DTG MC100LVEP11DTR2 MC100LVEP11DTR2G MC100LVEP11MNR4 MC100LVEP11MNR4G Package SOIC-8 SOIC-8 (Pb-Free) SOIC-8 SOIC-8 (Pb-Free) TSSOP-8 TSSOP-8 (Pb-Free) TSSOP-8 TSSOP-8 (Pb-Free) DFN8 DFN8 (Pb-Free) SOIC-8 SOIC-8 (Pb-Free) SOIC-8 SOIC-8 (Pb-Free) TSSOP-8 TSSOP-8 (Pb-Free) TSSOP-8 TSSOP-8 (Pb-Free) DFN8 DFN8 (Pb-Free) Shipping 98 Units / Rail 98 Units / Rail 2500 / Tape & Reel 2500 / Tape & Reel 100 Units / Rail 100 Units / Rail 2500 / Tape & Reel 2500 / Tape & Reel 1000 / Tape & Reel 1000 / Tape & Reel 98 Units / Rail 98 Units / Rail 2500 / Tape & Reel 2500 / Tape & Reel 100 Units / Rail 100 Units / Rail 2500 / Tape & Reel 2500 / Tape & Reel 1000 / Tape & Reel 1000 / Tape & Reel
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D.
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MC10LVEP11, MC100LVEP11
Resource Reference of Application Notes
AN1405/D AN1406/D AN1503/D AN1504/D AN1568/D AN1672/D AND8001/D AND8002/D AND8020/D AND8066/D AND8090/D - ECL Clock Distribution Techniques - Designing with PECL (ECL at +5.0 V) - ECLinPSt I/O SPiCE Modeling Kit - Metastability and the ECLinPS Family - Interfacing Between LVDS and ECL - The ECL Translator Guide - Odd Number Counters Design - Marking and Date Codes - Termination of ECL Logic Devices - Interfacing with ECLinPS - AC Characteristics of ECL Devices
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MC10LVEP11, MC100LVEP11
PACKAGE DIMENSIONS
SOIC-8 NB CASE 751-07 ISSUE AH
-X-
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. 751-01 THRU 751-06 ARE OBSOLETE. NEW STANDARD IS 751-07. MILLIMETERS MIN MAX 4.80 5.00 3.80 4.00 1.35 1.75 0.33 0.51 1.27 BSC 0.10 0.25 0.19 0.25 0.40 1.27 0_ 8_ 0.25 0.50 5.80 6.20 INCHES MIN MAX 0.189 0.197 0.150 0.157 0.053 0.069 0.013 0.020 0.050 BSC 0.004 0.010 0.007 0.010 0.016 0.050 0_ 8_ 0.010 0.020 0.228 0.244
A
8 5
B
1
S
4
0.25 (0.010)
M
Y
M
-Y- G
K
C -Z- H D 0.25 (0.010)
M SEATING PLANE
N
X 45 _
0.10 (0.004)
M
J
ZY
S
X
S
DIM A B C D G H J K M N S
SOLDERING FOOTPRINT*
1.52 0.060
7.0 0.275
4.0 0.155
0.6 0.024
1.270 0.050
SCALE 6:1 mm inches
*For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D.
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MC10LVEP11, MC100LVEP11
PACKAGE DIMENSIONS
TSSOP-8 DT SUFFIX PLASTIC TSSOP PACKAGE CASE 948R-02 ISSUE A
8x
K REF 0.10 (0.004)
M
0.15 (0.006) T U
S 2X
TU
S
V
S
L/2
8 1
5
L
PIN 1 IDENT
4
B -U-
0.25 (0.010) M
0.15 (0.006) T U
S
A -V-
F DETAIL E
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A DOES NOT INCLUDE MOLD FLASH. PROTRUSIONS OR GATE BURRS. MOLD FLASH OR GATE BURRS SHALL NOT EXCEED 0.15 (0.006) PER SIDE. 4. DIMENSION B DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSION. INTERLEAD FLASH OR PROTRUSION SHALL NOT EXCEED 0.25 (0.010) PER SIDE. 5. TERMINAL NUMBERS ARE SHOWN FOR REFERENCE ONLY. 6. DIMENSION A AND B ARE TO BE DETERMINED AT DATUM PLANE -W-. MILLIMETERS MIN MAX 2.90 3.10 2.90 3.10 0.80 1.10 0.05 0.15 0.40 0.70 0.65 BSC 0.25 0.40 4.90 BSC 0_ 6_ INCHES MIN MAX 0.114 0.122 0.114 0.122 0.031 0.043 0.002 0.006 0.016 0.028 0.026 BSC 0.010 0.016 0.193 BSC 0_ 6_
C 0.10 (0.004) -T- SEATING
PLANE
D
G DETAIL E
-W-
DIM A B C D F G K L M
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MC10LVEP11, MC100LVEP11
PACKAGE DIMENSIONS
DFN8 CASE 506AA-01 ISSUE D
D
A B
PIN ONE REFERENCE
NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994 . 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.25 AND 0.30 MM FROM TERMINAL. 4. COPLANARITY APPLIES TO THE EXPOSED PAD AS WELL AS THE TERMINALS. DIM A A1 A3 b D D2 E E2 e K L MILLIMETERS MIN MAX 0.80 1.00 0.00 0.05 0.20 REF 0.20 0.30 2.00 BSC 1.10 1.30 2.00 BSC 0.70 0.90 0.50 BSC 0.20 --- 0.25 0.35
2X
0.10 C
2X
0.10 C
0.10 C
8X
0.08 C
SEATING PLANE
A1
e/2
1 8X 4
L
K
ECLinPS is a trademark of Semiconductor Components Industries, LLC (SCILLC).
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800-282-9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81-3-5773-3850 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative
CCC CCC CCC CCC
8
E
TOP VIEW
A (A3) C e
SIDE VIEW D2
E2
5 8X
b
0.10 C A B 0.05 C
NOTE 3
BOTTOM VIEW
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MC10LVEP11/D


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