 |
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
| Datasheet File OCR Text: |
| KS86C6308/P6308 PRODUCT OVERVIEW 1 PRODUCT OVERVIEW SAM88RCRI PRODUCT FAMILY Samsung's SAM88RCRI family of 8-bit single-chip CMOS microcontrollers offers a fast and efficient CPU, a wide range of integrated peripherals, and various mask-programmable ROM sizes. A dual address/data bus architecture and a large number of bit- or nibble-configurable I/O ports provide a flexible programming environment for applications with varied memory and I/O requirements. Timer/counters with selectable operating modes are included to support real-time operations. Many SAM88RCRI microcontrollers have an external interface that provides access to external memory and other peripheral devices. KS86C6308/P6308 MICROCONTROLLER The KS86C6308/P6308 single-chip 8-bit microcontroller is fabricated using an advanced CMOS process. It is built around the powerful SAM88RCRI CPU core. Stop and Idle power-down modes were implemented to reduce power consumption. To increase on-chip register space, the size of the internal register file was logically expanded. The KS86C6308 has 8 K bytes of program memory on-chip. Using the SAM88RCRI design approach, the following peripherals were integrated with the SAM88RCRI core: -- Five configurable I/O ports (32 pins) -- 20 bit-programmable pins for external interrupts -- 8-bit timer/counter and 16-bit timwe/counter with three operating modes -- Full speed low speed USB function The KS86C6308/P6308 is a versatile microcontroller that can be used in a wide range of full/low speed USB support general purpose applications. It is especially suitable for use as a keyboard with hub controller and is available in a 64-pin SDIP and a 64-pin QFP package. OTP The KS86C6308 microcontroller is also available in OTP (One Time Programmable) version, KS86P6308. KS86P6308 microcontroller has an on-chip 8-Kbyte one-time-programmable EPROM instead of masked ROM. The KS86P6308 is comparable to KS86C6308, both in function and in pin configuration. 1-1 PRODUCT OVERVIEW KS86C6308/P6308 (Preliminary Spec) FEATURES CPU * SAM88RCRI CPU core Timer A * One 8-bit basic timer for watchdog function and programmable oscillation stabilization programmable 8-bit timer internal generation function interval, capture, PWM mode match/capture overflow interrupt Memory * * 8-KB Internal program memory(ROM) 256-byte internal register file (160-byte:General Purpose) Instruction Set * * 41 instructions IDLE and STOP instructions added for powerdown modes Timer B * Programmable 16-bit timer interval generation function interval, capture, PWM mode match/capture overflow interrupt Universal Serial Bus with HUB * * 1 upstream port 4 downstream port and one embedded function each port supports separated enable LED builtin 3.3 V voltage regulator Instruction Execution Time * 332ns at 12 MHz fOSC Interrupts * * 32 interrupt sources with one vector, each source has its pending bits One level, one vector interrupt structure USB/GPIO Function * Upstream port Operation Temperature Range * - 40 C to + 85 C Oscillation Frequency * * 12 MHz crystal/ceramic oscillator External clock source Operation Voltage Range * 4.0 V to 5.5 V General I/O * Bit programmable five I/O ports (30 pins total) Package Types * * 64-pin SDIP 64-pin QFP 1-2 KS86C6308/P6308 (Preliminary Spec) PRODUCT OVERVIEW BLOCK DIAGRAM USB Transceiver & Voltage Regulator LPF 12 MHz XI OSC XO PLL 48 MHz USB Module DP0/GPIO, DM0/GPIO DP1, DM1 DP2, DM2 DP3, DM3 DP4, DM4 3.3 VOUT PWREN1 PWREN2 PWREN3 PWREN4 OCDET1 OCDET2 OCDET3 OCDET4 12 MHz SAM88RCRI CORE USB Device Control LVD VDD VSS VSS1 TEST RESET 8K ROM LEDON0 LEDON1 LEDON2 LEDON3 LEDON4 GANGED 8 B i t B U S Port P0.0/INT2 - P0.7/INT2 160 Byte RAM Port P1.0 - P1.7 TMOD Timer A (8 Bit) Port Timer B (16 Bit) Port Basic Timer P2.0/INT0 - P2.7/INT0 P3.3/TACLK/CLO P3.2/TBCLK/USB_CLK P3.1/TBCAP/TAOUT P3.1/TACAP/TBOUT P4.0/INT1 P4.1/INT1 Port Figure 1-1. Block Diagram 1-3 PRODUCT OVERVIEW KS86C6308/P6308 (Preliminary Spec) PIN ASSIGNMENTS LEDON4 P1.4 P1.5 P1.6 P1.7 P4.0/INT1 P4.1/INT1 P2.0/INT0 P2.1/INT0 P2.2/INT0 P2.3/INT0 P2.4/INT0 P2.5/INT0 SDAT /P2.6/INT0 SCLK /P2.7/INT0 VDD/VDD VSS/VSS XO /XO XI/XI TEST /TEST LPF VSS/VSSA RESET/RESET TMODE DP0/GPIO DM0/GPIO DP1 DM1 DP2 DM2 DP3 DM3 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 LEDON3 LEDPN2 LEDON1 LEDON0 OCDET4 PWREN4 P1.3 P1.2 P1.1 P1.0 P0.7/INT2 P0.6/INT2 P0.5/INT2 P0.4/INT2 P0.3/INT2 P0.2/INT2 P0.1/INT2 P0.0/INT2 OCDET3 PWREN 3 Figure 1-2. Pin Assignment Diagram (64-Pin SDIP Package) KS86C6308/P6308 P3.3/TACLK/CLO P3.2/TBCLK/USB_CLK P3.1/TBCAP/TAOUT P3.0/TACAP/TBOUT VSS1/VSS OCDET2 PWREN2 ECDET1 PWREN1 3.3VOUT DM4 DP4 1-4 KS86C6308/P6308 (Preliminary Spec) PRODUCT OVERVIEW P41/INT1 P40/INT1 P17 P16 P15 P14 LEDON4 LEDON3 LEDON2 LEDON1 LEDON0 64 63 62 61 60 59 58 57 56 55 54 53 52 P2.0/INT0 P2.1/INT0 P2.2/INT0 P2.3/INT0 P2.4/INT0 P2.5/INT0 SDAT /P2.6/INT0 SCLK /P2.7/INT0 VDD/VDD VSS/VSS XO /XO XI/XI TEST /TEST LPF VSS/VSSA RESET/RESET OCDET4 PWREN4 TMODE DP0/GPIO DM0/GPIO 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 KS86C6308 (KS86P6308) 51 50 43 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 P1.3 P1.2 P1.1 P1.0 P0.7/INT2 P0.6/INT2 P0.5/INT2 P0.4/INT2 P0.3/INT2 P0.2/INT2 P0.1/INT2 P0.0/INT2 OCDET3 PWREN3 P3.3/TACLK/CLO P3.2/TBCLK/USB_CLK P3.1/TBCAP/TAOUT P3.0/TACAP/TBOUT GANGED DP1 DM1 DP2 DM2 DP3 DM3 DP4 DM4 3.3VOUT Figure 1-3. Pin Assignment Diagram (64-Pin QFP Package) PWREN1 OCDET1 PWREN2 OCDET2 20 21 22 23 24 25 26 27 28 29 30 31 32 1-5 PRODUCT OVERVIEW KS86C6308/P6308 (Preliminary Spec) PIN DESCRIPTIONS Table 1-1. KS86C6308/P6308 Pin Descriptions Pin Names P0.0-P0.7 I/O I/O Pin Description Bit-programmable I/O port for Schmitt trigger input or open-drain output. Port 0 can be individually configured as external interrupt inputs. Pull-up resistors are assignable by software. Bit-programmable I/O port for Schmitt trigger input or open-drain output. Pull-up resistors are assignable by software. Bit-programmable I/O port for Schmitt trigger input or open-drain output. Port 2 can also be individually configured as external interrupt inputs. Pull-up resistors are assignable by software. Bit-programmable I/O port for Schmitt trigger input, opendrain output or push-pull output. Port 3 are designed for to drive LED directly. P3.3 can be used to system clock output(CLO) pin. P3.2 PLL clock out for PLL Block. Bit-programmable I/O port for Schmitt trigger input or open-drain output or push-pull output. Port4 can also be individually configured as external interrupt inputs. In output mode, pull-up resistors are assignable by software. But in input mode, pull-up resistors are fixed. 3.3 V output from internal voltage regulator System clock input and output pin (crystal/ceramic oscillator, or external clock source) External interrupt for bit-programmable port0, port2 and port4 pins when set to input mode. RESET signal input pin with LVD Low Pass Filter Pin for PLL Test signal input pin (for factory use only; must be connected to VSS) Test signal input pin (for factory use only, must be connected to VSS) Power input pin VSS1 is a ground power for CPU core. VSS2 is a ground power for I/O and OSC block. Pin Type B Share Pins INT2 P1.0-P1.7 I/O B - P2.0-P2.7 I/O B INT0 P3.0-P3.3 I/O C P3.3/TACLK/CLO P3.2/TBCLK/ USB_CLK P3.1/TBCAP/TAOUT P3.0/TACAP/TBOUT INT1 P4.0-P4.1 I/O D 3.3 VOUT XIN XOUT INT0 INT1 INT2 RESET LPF TEST TMODE VDD VSS VSS1 - - I - - - - - P2.0-P2.7 P4.0/P4.1 P0.0/P0.7 - - - - - - I I I I - - A - - - - - 1-6 KS86C6308/P6308 (Preliminary Spec) PRODUCT OVERVIEW Table 1-1. KS86C6308/P6308 Pin Descriptions (Continued) Pin Names DP1, DM1 DP2, DM2 DP3, DM3 DP4, DM4 DP0/GPIO DM0/GPIO LEDON0 I/O I/O Pin Description These pins are an USB Downstream pins. Pin Type K Share Pins - I/O O LEDON1-4 O OCDET1-4 I PWREN1-4 O GANGED I These pins are an USB Upstream pin, programmable port for USB interface or General purpose I/O interface. Root port LED enable. N-channel open-drain output. = 0 Turn LED ON. HUB not Suspend = 1 Turn LED OFF. Reset, Suspend, Transfer in progress Four downstream port LED enable. N-channel opendrain output. = 0 Turn LED ON. Port Enable and HUB not Suspend = 1 Turn LED OFF. Reset, Suspend, Transfer in progress Four downstream power sense = 0 Over Current Detected = 1 Power Okay Power on/off control signals. PWREN1 - PWREN4 are active low, N-CH open-drain outputs. In GANGED mode, all output are swithed together. Gang or Individual Power Control of downstream ports = 0 Individual = 1 Gang - G - - G - F - G - F - 1-7 PRODUCT OVERVIEW KS86C6308/P6308 (Preliminary Spec) PIN CIRCUIT DIAGRAMS VDD VDD Pull-up Resistor Noise Filter Output Data Open Drain Output DIsable VSS Input Data D0 MUX D1 Figure 1-4. Pin Circuit Type A (RESET) Figure 1-6. Pin Circuit Type C (Port 3) VDD VDD Pull-up Resistor Pull-up Enable Output Data Output Disable Open Data Open Drain Output DIsable VSS Pull-up Enable VDD Pull-up Resistor Input Data D0 MUX D1 VSS Input Data D0 MUX D1 Figure 1-5. Pin Circuit Type B (Port 0, 1, 2) Figure 1-7. Pin Circuit Type D (Port 4) 1-8 KS86C6308/P6308 (Preliminary Spec) PRODUCT OVERVIEW VDD Pull-up Resistor Figure 1-8. Pin Circuit Type F 3.0 V < V <3.6 V Only on Upstream Ports 15 K 5 % or Equivalent RXD RXDP RXDM TXDP OEN Speed (Only on Downstream Ports) TXDM 15 K 5 % DPX DMX Only on Downstream Ports Figure 1-9. Pin Circuit Type K 1-9 PRODUCT OVERVIEW KS86C6308/P6308 (Preliminary Spec) Output Data Figure 1-10. Pin Circuit Type G 1-10 KS86C6308/P6308 (Preliminary Spec) PRODUCT OVERVIEW APPLICATION CITCUIT KS86C6308 (P6308) XI 12 MHz XO LPF Upstream Port VDD DD+ VSS VDD DM0 DP0 VSS DM1 DP1 DM2 DP2 DM3 DP3 DM4 DP4 Downstream Ports VDD DD+ VSS VDD DD+ VSS VDD DD+ VSS VDD DD+ VSS GANGED VDD Keyboard Matrix P2.0-P2.7 P0.0-P0.7 P1.0-P1.7 P3.2 P3.1 P3.0 PWREN1 PWREN2 LEDON0 LEDON1 OCDET1 LEDON2 LEDON3 LEDON4 OCDET2 OCDET3 OCDET4 OC OUT PWREN3 PWREN4 Power Switch EN IN NOTES: 1. We recommand Power Switch, MIC2525 (by MICREL Semiconductor). 2. R1: 1.5 K R2: 15 K 3. For proper operation of the PLL, an external RC filter consisting of series RC network resistor and capacitor must be connected from the LPF pin to V SS. 4. Port3 can use LED direct drive. 5. Upstream D+, D- can use GPIO interface (see GPIOCONINT) Figure 1-11. Bus-Powered, Gang Port (64-SDIP, 64-QFP) 1-11 PRODUCT OVERVIEW KS86C6308/P6308 (Preliminary Spec) KS86C6308 (P6308) XI 12 MHz XO LPF Upstream Port VDD DD+ VSS VDD DM0 DP0 VSS DM1 DP1 DM2 DP2 DM3 DP3 DM4 DP4 VSS Downstream Ports VDD DD+ VSS VDD DD+ VSS VDD DD+ VSS VDD DD+ VSS GANGED Keyboard Matrix P2.0-P2.7 P0.0-P0.7 P1.0-P1.7 P3.2 P3.1 PWREN1 P3.0 OCDET1 EN IN OC OUT EN LEDON0 LEDON1 LEDON2 LEDON3 LEDON4 PWREN2 OCDET2 IN OC OUT EN PWREN3 OCDET3 IN OC OUT EN PWREN4 OCDET4 IN OC OUT Power Switching NOTES: 1. We recommand Power Switch, MIC2525 (by MICREL Semiconductor). 2. For proper operation of the PLL, an external RC filter consisting of series RC network resistor and capacitor must be connected from the LPF pin to V SS. 3. Port3 can use LED direct drive. 4. Upstream D+, D- can use GPIO interface (see GPIOCONINT) Figure 1-12. Bus-Powered, Individual Port (64-SDIP, 64-QFP) 1-12 KS86C6308/P6408 (Preliminary Spec) ELECTRICAL DATA 12 OVERVIEW ELECTRICAL DATA In this section, the following KS86C6308/P6308 electrical characteristics are presented in tables and graphs: -- Absolute maximum ratings -- D.C. electrical characteristics -- Input/Output capacitance -- A.C. electrical characteristics -- Input timing for external interrupt (Ports 0, 2 and 4) DP0/GPIO, DM0/GPIO : GPIO Mode Only -- Input timing for RESET -- Oscillator characteristics -- Oscillation stabilization time -- Clock timing measurement points at XIN -- Data retention supply voltage in Stop mode -- Stop mode release timing when initiated by a reset -- Stop mode release timing when initiated by an external interrupt -- Characteristic curves 12-1 ELECTRICAL DATA KS86C6308/P6408 (Preliminary Spec) Table 12-1. Absolute Maximum Ratings (TA = 25C) Parameter Supply Voltage Input Voltage Output Voltage Output Current High Symbol VDD VIN VO IOH IOL All input ports All output ports One I/O pin active All I/O pins active Output Current Low One I/O pin active Total pin current for ports 0, 1, 2, 4 Total pin current for port 3 Operating Temperature Storage Temperature TA TSTG - - Conditions - Rating - 0.3 to + 6.5 - 0.3 to VDD + 0.3 - 0.3 to VDD + 0.3 - 18 - 60 + 30 + 100 + 100 - 40 to + 85 - 65 to + 150 C C mA Unit V V V mA 12-2 KS86C6308/P6408 (Preliminary Spec) ELECTRICAL DATA Table 12-2. D.C. Electrical Characteristics (TA = - 40 C to + 85 C, VDD = 4.0 V to 5.5 V) Parameter Operating Voltage Input High Voltage Symbol VDD VIH1 VIH2 Input Low Voltage VIL1 VIL2 Output High Voltage Output Low Voltage Input High Leakage Current VOH Conditions fOSC = 12 MHz All input except VIH2 XIN All input pins except VIL2 XIN IOH = - 200 A; All output ports except ports 0, 1, 2, DP's, DM's IOL = 1 mA All output ports except DP's, DM's VIN = VDD All inputs excepts ILIH2, DP's, DM's VIN = VDD XIN, XOUT, RESET VIN = 0 V All inputs excepts ILIL2, DP's, DM's VIN = 0 V XIN, XOUT, RESET VDD - 1.0 - Min 4.0 0.8 VDD VDD - 0.5 - - Typ - - Max 5.5 VDD VDD 0.2 VDD 0.4 - V V Unit V V VOL - - 0.4 V ILIH1 (4) - - 3 A ILIH2 (4) Input Low Leakage Current ILIL1 (4) - - - - 20 -3 A A ILIL2 (4) - - - 20 A 12-3 ELECTRICAL DATA KS86C6308/P6408 (Preliminary Spec) Table 12-2. D.C. Electrical Characteristics (continued) (TA = - 40 C to + 85 C, VDD = 4.0 V to 5.5 V) Parameter Output High Leakage Current Output Low Leakage Current Pull-up Resistors Supply Current Symbol ILOH (1) Conditions VOUT = VDD All I/O pins and output pins except DP's and DM's VOUT = 0 V All I/O pins and output pins except DP's and DM's VIN = 0 V Ports 0, 1, 2, 4, Reset Normal operation mode : 12 MHz Crystal Oscillator Idle mode; 12 MHz Crystal Oscillator Stop mode: Oscillator stop Min - Typ - Max 3 Unit A ILOL (1) - - -3 A RL IDD1 IDD2 IDD3 25 - 50 100 30 15 500 k mA A NOTES: 1. Except XIN and XOUT. 2. 3. 3. Supply current does not include through internal pull-up resistors or external output current loads. Figure 11-3 Transition Rise Timer (tR), Fall Timer (tF) parameter is guaranteed, but not tested. When USB Mode Only in 4.20 V to 5.25 V, DP's and DP's satisfy the USB Specification version 1.0. Table 12-3. Input/Output Capacitance (TA = - 40 C to + 85 C, VDD = 0 V) Parameter Input Capacitance Output Capacitance I/O Capacitance Symbol CIN COUT CIO Conditions f = 1 MHz; Unmeasured pins are connected to VSS Min - Typ - Max 10 Unit pF Table 12-4. A.C. Electrical Characteristics (TA = - 40 C to + 85 C, VDD = 4.0 V to 5.5 V) Parameter Interrupt Input High, Low Width RESET Input Low Symbol tINTH, tINTL tRSL Conditions P0, P2 and P4 RESET Min - - Typ 200 1000 Max - - Unit ns Width 12-4 KS86C6308/P6408 (Preliminary Spec) ELECTRICAL DATA tINTL tINTH 0.8 VDD 0.2 VDD Figure 12-1. Input Timing Measurement Points (Ports 0, 2, and 4) tRSL RESET 0.5 VDD Figure 12-2. Input Timing for RESET tR tF 0.5VDD DP 90% 90% DM 10% 10% Figure 12-3. USB Data Signal Timing 12-5 ELECTRICAL DATA KS86C6308/P6408 (Preliminary Spec) Table 12-5. DPx, DMx Driver Characteristics, Full Speed Operation Symbol tR tF tRFM Parameter Rise Time Fall Time tR/tF Matching Condition CL = 50pF CL = 50pF - Min 4 4 90 Max 20 20 11 Unit ns ns % Table 12-6. DPx, DMx Driver Characteristics, Low Speed Operation Symbol tR tF tRFM Parameter Rise Time Fall Time tR/tF Matching Condition CL = 200-600pF CL = 200-600pF - Min 75 75 80 Max 300 300 125 Unit ns ns % 12-6 KS86C6308/P6408 (Preliminary Spec) ELECTRICAL DATA TXD+ RS CL TXD- RS CL CL = 50 pF Figure 12-4. Full-Speed Load TXD+ RS CL 3.6 V TXD- RS CL CL = 200 pF to 600 pF Figure 12-5. Low-Speed Load 12-7 ELECTRICAL DATA KS86C6308/P6408 (Preliminary Spec) Table 12-7. Oscillator Characteristics (TA = - 40C + 85C) Oscillator Main crystal Main ceramic (fOSC) Circuit XIN C1 Condition VDD = 4.0V to 5.5V Min - Typ 12 Max - Unit MHz C2 XOUT External clock XIN XOUT VDD = 4.0V to 5.5V - 12 - Table 12-8. Oscillation Stabilization Time (TA = - 40C + 85C, VDD = 4.0 V to 5.5 V) Oscillator Crystal Ceramic External Symbol - - - XIN input high & low level width Condition VDD = 4.0V to 5.5V Min - - 25 Typ - - - Max 20 10 500 ns Unit ms NOTE: The oscillator stabilization wait time, tWAIT, is determined by the setting in the basic timer control register, BTCON. Table 12-9. Data Retention Supply Voltage in Stop Mode (TA = - 40C to + 85C) Parameter Data Retention Supply Voltage Data Retention Supply Current Symbol VDDDR IDDDR Conditions Stop mode Stop mode; VDDDR = 2.0 V Min 2.0 - Typ - - Max 6 500 Unit V uA 12-8 KS86C6308/P6408 (Preliminary Spec) MECHANICAL DATA 13 OVERVIEW #64 17.00 0.20 MECHANICAL DATA The KS86C6308/P6308 is available in a 64-pin SDIP package (Samsung: 64-SDIP-750) and a 64-pin QFP package (64-QFP-1420F). Package dimensions are shown in Figures 13-1 and 13-2. #33 0-15 #1 #32 57.80 0.20 0.51 MIN 0.45 (1.34) 1.00 0.10 0.10 1.778 NOTE : Dimensions are in millimeters. Figure 13-1. 64-Pin SDIP Package Mechanical Data (64-SDIP-750 ) 3.30 0.30 5.08 MAX 4.10 0.20 58.20 MAX 0.2 5 13-1 +0 - 0 .10 .05 64-SDIP-750 19.05 MECHANICAL DATA KS86C6308/P6408 (Preliminary Spec) 23.90 0.30 20.00 0.20 0-8 + 0.10 0.15 - 0.05 17.90 0.30 14.00 0.20 64-QFP-1420F 0.80 0.20 #1 1.00 + 0.10 0.10 MAX #64 0.40 - 0.05 0.15 MAX 0.05 MIN (1.00) 2.65 0.10 3.00 MAX 0.80 0.20 NOTE : Dimensions are in millimeters. Figure 13-2. 64-Pin QFP Package Mechanical Data (64-QFP-1420F ) 13-2 KS86C6308/P6308 (Preliminary Spec) KS86P6308 OTP 14 OVERVIEW KS86P6308 OTP The KS86P6308 single-chip CMOS microcontroller is the OTP (One Time Programmable) version of the KS86C6308 microcontroller. It has an on-chip OTP ROM instead of masked ROM. The EPROM is accessed by serial data format. The KS86P6308 is fully compatible with the KS86C6308, both in function and in pin configuration. Because of its simple programming requirements, the KS86P6308 is ideal for use as an evaluation chip for the KS86C6308. 14-1 KS86P6308 OTP KS86C6308/P6308 (Preliminary Spec) LEDON4 P1.4 P1.5 P1.6 P1.7 P4.0/INT1 P4.1/INT1 P2.0/INT0 P2.1/INT0 P2.2/INT0 P2.3/INT0 P2.4/INT0 P2.5/INT0 SDAT /P2.6/INT0 SCLK /P2.7/INT0 VDD/VDD VSS/VSS XO /XO XI/XI TEST /TEST LPF VSS/VSSA RESET/RESET TMODE DP0/GPIO DM0/GPIO DP1 DM1 DP2 DM2 DP3 DM3 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 LEDON3 LEDPN2 LEDON1 LEDON0 OCDET4 PWREN4 P1.3 P1.2 P1.1 P1.0 P0.7/INT2 P0.6/INT2 P0.5/INT2 P0.4/INT2 P0.3/INT2 P0.2/INT2 P0.1/INT2 P0.0/INT2 OCDET3 3 PWREN Figure 14-1. Pin Assignment Diagram (64-Pin SDIP Package) KS86P6308 P3.3/TACLK/CLO P3.2/TBCLK/USB_CLK P3.1/TBCAP/TAOUT P3.0/TACAP/TBOUT GANGED OCDET2 PWREN2 ECDET1 PWREN1 3.3VOUT DM4 DP4 14-2 KS86C6308/P6308 (Preliminary Spec) KS86P6308 OTP P41/INT1 P40/INT1 P17 P16 P15 P14 LEDON4 LEDON3 LEDON2 LEDON1 LEDON0 64 63 62 61 60 59 58 57 56 55 54 53 52 P2.0/INT0 P2.1/INT0 P2.2/INT0 P2.3/INT0 P2.4/INT0 P2.5/INT0 SDAT /P2.6/INT0 SCLK /P2.7/INT0 VDD/VDD VSS/VSS XO /XO XI/XI TEST /TEST LPF VSS/VSSA RESET/RESET OCDET4 PWREN4 TMODE DP0/GPIO DM0/GPIO 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 KS86P6308 51 50 43 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 P1.3 P1.2 P1.1 P1.0 P0.7/INT2 P0.6/INT2 P0.5/INT2 P0.4/INT2 P0.3/INT2 P0.2/INT2 P0.1/INT2 P0.0/INT2 OCDET3 PWREN3 P3.3/TACLK/CLO P3.2/TBCLK/USB_CLK P3.1/TBCAP/TAOUT P3.0/TACAP/TBOUT GANGED DP1 DM1 DP2 DM2 DP3 DM3 DP4 DM4 3.3VOUT Figure 14-2. Pin Assignment Diagram (64-Pin QFP Package) PWREN1 OCDET1 PWREN2 OCDET2 20 21 22 23 24 25 26 27 28 29 30 31 32 14-3 KS86P6308 OTP KS86C6308/P6308 (Preliminary Spec) Table 14-1. Descriptions of Pins Used to Read/Write the EPROM Main Chip Pin Name P2.6 Pin Name SDAT Pin No. 9 (3) During Programming I/O I/O Function Serial Data Pin (Output when reading, Input when writing) Input and Push-pull Output Port can be assigned Serial Clock Pin (Input Only Pin) Chip Initialization and EPROM Cell Writing Power Supply Pin (Indicates OTP Mode Entering) When writing 12.5 V is applied and when reading. 0 V: OTP write and test mode 5 V: Operating mode Logic Power Supply Pin. P2.7 TEST SCLK TEST 10 (4) 15 (9) I/O I RESET VDD / VSS RESET VDD / VSS 18 (12) 11(5)/12(6) I - NOTE: ( ) means 64 QFP package. Table 14-2. Comparison of KS86P6308 and KS86C308 Features Characteristic Program Memory Operating Voltage (VDD) OTP Programming Mode Pin Configuration EPROM Programmability KS86P6308 8-Kbyte EPROM 4.0 V to 5.25 V VDD = 5 V, VPP (RESET) = 12.5 V 64 SDIP/64 QFP User Program 1 time 64 SDIP/64 QFP Programmed at the factory KS86C6308 8-Kbyte mask ROM 4.0 V to 5.25 V OPERATING MODE CHARACTERISTICS When 12.5 V is supplied to the VPP (RESET) pin of the KS86P6308, the EPROM programming mode is entered. The operating mode (read, write, or read protection) is selected according to the input signals to the pins listed in Table 14-3 below. Table 14-3. Operating Mode Selection Criteria VDD 5V VPP (RESET) 5V 12.5 V 12.5 V 12.5 V REG/ MEM 0 0 0 1 ADDRESS R/W 1 0 1 0 EPROM read MODE (A15-A0) 0000H 0000H 0000H 0E3FH EPROM program EPROM verify EPROM read protection NOTE: "0" means Low level; "1" means High level. 14-4 KS86C6308/P6308 (Preliminary Spec) KS86P6308 OTP START Address= First Location VDD =5V, V PP=12.5V x=0 Program One 1ms Pulse Increment X YES x = 10 NO FAIL Verify Byte Verify 1 Byte FAIL Last Address NO Increment Address VDD = V PP= 5 V FAIL Compare All Byte PASS Device Failed Device Passed Figure 14-3. OTP Programming Algorithm 14-5 KS86P6308 OTP KS86C6308/P6308 (Preliminary Spec) Table 14-4. D.C. Electrical Characteristics (TA = - 40_C to + 85_C, VDD = 5.25 V) Parameter Supply Current (note) Symbol IDD1 IDD2 IDD3 Conditions Normal mode; 12 MHz crystal oscillator Idle mode; 12 MHz CPU clock Stop mode Min - Typ - - - Max 30 15 500 Unit mA A NOTE: Supply current does not include current drawn through internal pull-up resistors or external output current loads. 14-6 |
Price & Availability of KS86P6308
 |
|
|
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
| [Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
|
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |