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BD3861FS
Audio ICs
Audio sound controller
BD3861FS
The BD3861FS is an audio sound controller IC for micro-component stereo systems. Tone and volume can be controlled easily by two-line serial control from micro-controller.
Applications Micro-component stereo systems, radio cassette players and mini-component stereo systems
Features 1) Built-in volume, tone (bass, middle and treble), input gain amplifier and input selector. 2) The volume control of resistance ladder type allows the low distortion and low noise in Bi-CMOS process. 3) Two-line serial interface. 4) The built-in input gain amplifier reduces the needs of external input, and this IC is suitable for space-saving design. 5) Residual noise can be reduced by separating the front stage volume control from the rear stage volume control.
Absolute maximum ratings (Ta=25C)
Parameter Power supply voltage Power dissipation Operating temperature Storage temperature Symbol VCC Pd Topr Tstg Limits 10 800 -25 to +75 -55 to +150 Unit V mW C C
Reduced by 6.4mW for each increase in Ta of 1C over 25C.
Recommended operating conditions (Ta=25C)
Parameter Power supply voltage Symbol VCC Min. 6.5 Typ. - Max. 9.5 Unit V
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BD3861FS
Audio ICs
Block diagram
BASS12
BASS11
BASS22
BASS21
GOUT1
GOUT2
MID22
MID21
MID12
MID11
OUT1
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
0dB~ -70dB
Treble1 fC=10kHz
Treble2 fC=10kHz
Middle2 f0=1kHz
Middle1 f0=1kHz
Bass1 f0=90Hz
Bass2 f0=90Hz
VCC/2
VCC/2 0dB~ -59dB 0dB~ -59dB
VCC/2
- + - +
VCC/2
VCC/2
VCC/2
VCC/2
VCC/2 24k
- +
25k
25k
25k
25k
25k
25k
25k
25k
25k
25k
12k
VCC/2
Logic VCC
25k
25k
25k
25k
25k
25k
25k
25k
25k
25k 100k
1
A1
2
A2
3
B1
4
B2
5
C1
6
C2
7
D1
8
D2
9
E1
10
E2
11
MIC
12
FIL
13
GND
14
DATA
15
CLK
16
VCC
OUT2
+ -
VOL2
VOL1
TRE1
TRE2
+ -
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BD3861FS
Audio ICs
Pin equivalent circuit and description
Pin No. Pin name Pin voltage Equivalent circuit Pin description
VCC
1 2 3 4 5 6 7 8
A1 A2 B1 B2 C1 C2 D1 D2
VCC/2
25k 25k
A pin for inputting a sound signal. It is suitable for input of CD, MD, tuner and tape. Connect this pin to a front stage circuit through a coupling capacitor.
GND
VCC
9
E1
VCC/2
10 E2
GND
25k 25k
A pin for inputting a sound signal. It is suitable for input from outside of the pin.
VCC
24k 12k
11
MIC
VCC/2
100k
A pin for microphone input.
GND
VCC
40k
12
FIL
VCC/2
40k
VCC/2 Voltage for power supply of signal system.
GND
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BD3861FS
Audio ICs
Pin No. Pin name Pin voltage Equivalent circuit Pin description
VCC
17
OUT2
VCC/2
20 OUT1
A pin for outputting a sound signal. Connect this pin to a rear stage circuit through a coupling capacitor.
GND
VCC
18
BASS21
VCC/2
21 BASS11
GND
A pin for setting central frequency (fo) of bass and for setting gain.
VCC
19
BASS22
VCC/2
22 BASS12
GND
A pin for setting central frequency (fo) of bass and for setting gain.
VCC
23
MID11
VCC/2
25 MID21
GND
A pin for setting central frequency (fo) of middle and for setting gain.
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BD3861FS
Audio ICs
Pin No. Pin name Pin voltage Equivalent circuit Pin description
VCC
24
MID12
VCC/2
26 MID22
GND
A pin for setting central frequency (fo) of middle and for setting gain.
VCC
27
TRE2
VCC/2
28 TRE1
GND
A pin for setting cut-off frequency (fc) of treble and for setting gain.
VCC
29
VOL1
VCC/2
30 VOL2
GND
A pin for inputting sound signal into input volume control. The input impedance is 36k (upon Typ.).
VCC
31
GOUT2
40k
VCC/2
32 GOUT1
GND
A pin for outputting input gain.
5/13
BD3861FS
Audio ICs
Pin No. Pin name Pin voltage Equivalent circuit Pin description
VCC
14
DATA
2k
-
15 CLK
GND
A pin for inputting a serial control data.
16
VCC
VCC
-
Power supply pin.
13
GND
0V
-
A ground pin.
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BD3861FS
Audio ICs
Electrical characteristics (Unless specified particularly, VCC=9V, f=1kHz, VIN=1Vrms, Rg=600, RL=10k, Ta=25C, INPUT Gain=0dB, VOL=0dB, Bass, Middle, Treble=0dB) Measurement circuit is Fig.1.
Parameter Circuit current Output voltage gain Total harmonic distortion Maximum output voltage Maximum noise voltage Cross-talk between channels 6dBSW gain Input voltage gain1 Input voltage gain2 Input gain switch step INPUT total harmonic distortion INPUT maximum output voltage Cross-talk between selectors Input resistance "E" input SW attenuation Input Volume Gain1 Input Volume Gain2 Volume switch step1 Volume switch step2 MUTE level Output Volume Gain OUTPUT switch step MUTE level GOV GOVst GminO -1 - - 9 1 - +1 - -90.0 dB dB dB From 0 to -59dB From 0 to -59dB IHF-A GminO=20log(O1/VIN) GminO=20log(O2/VIN) GOV=20log(O1/VIN) GOV=20log(O2/VIN) 1 1 1 1 1 1 - - - 2 2 2 2 2 2 2 2 2 1 1 1 10 02 DC - 02 01 01 01 05 0D 03 0B 05 0D 03 0B 05 0D 03 0B O1 O2 O1 O2 O1 O2 GIV1 GIV2 GIVst1 GIVst2 GminI -2 -3 - - - 5 6 2 4 - +2 +3 - - -90.0 dB dB dB dB dB From 0 to -50dB From -54 to -70dB From 0 to -50dB From -54 to -70dB IHF-A GminI=20log(O1/VIN) GminI=20log(O2/VIN) GIV1=20log(O1/VIN) GIV1=20log(O2/VIN) GIV2=20log(O1/VIN) GIV2=20log(O2/VIN) 1 1 1 1 1 1 1 1 1 1 - - - - - 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 00 00 00 00 7 01 1A 8 01 7A - - 01 01 05 0D 03 0B 05 0D 03 0B 05 0D 03 0B 05 0D 03 0B 05 0D 03 0B O1 O2 O1 O2 O1 O2 O1 O2 O1 O2 GV6 Gvmaxl1 5 -1 6 1 2 2 0.02 2.5 7 +1 +1.5 - 0.08 - dB dB dB dB % dB dB k dB VIN=200mVrms VIN=200mVrms From 0 to 10dB GV6=20log(G1/VIN) GV6=20log(G2/VIN) Gvmaxl1=20log(G1/VIN) Gvmaxl1=20log(G2/VIN) 1 1 1 1 1 1 CS=20log(G1/VIN) CS=20log(G2/VIN) 1 1 5 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 00 00 00 00 00 00 00 00 00 02 02 02 02 02 02 02 02 02 11 01 01 01 01 01 81 01 29 05 0D 03 0B 3 A5 0D 03 0B 4 0D 03 0B F5 - 0D 03 0B G1 G2 G1 G2 G1 G2 G1 G2 G1 G2 G1 G2 G1 G2 VR1 VR2 G1 G2 IQ GV THD VOM VNO CT - -1.5 - 2.0 - - 13.0 0.0 0.02 2.5 8.0 -80 26.0 1.5 0.08 - 15.0 -70 mA dB % Vrms Without signal GV=20log(O1/VIN) GV=20log(O2/VIN) VIN=2Vrms 400~30kHz BPF THD=1% 1 1 1 1 1 CT=20log(O2/O1) CT=20log(O1/O2) 1 1 2 2 2 1 - 2 2 2 - 2 2 2 2 2 2 1 2 2 2 2 2 1 1 1 1 1 1 2 2 2 2 2 2 00 00 00 00 00 00 02 02 02 02 02 02 01 01 01 01 01 01 05 0D 03 0B 05 0D 03 0B 05 0D 03 0B 05 0D 03 0B 05 0D 03 0B 05 0D 03 0B I O1 O2 O1 O2 O1 O2 O1 O2 O2 O1 Symbol Min. Typ. Max. Unit Conditions 1/4 2/5 SW No. 3/8 7 8 9/10 11/12 1 Select address/Serial data (HEX notation) 2 3 4-1 4-2 5-1 5-2 Measurement point
Vrms Rg=0k, IHF-A dB Rg=0k, IHF-A
2/1 2/- 1/2 -/2
Gvmaxl2 -1.5 Gvmaxlst THDI VOMI CS RI GRE - - 2.0 - 35.0 -
Gvmaxl1=20log(G1/VIN) VIN=200mVrms From 12 to 20dB Gvmaxl1=20log(G2/VIN) From 0 to 20dB VIN=2Vrms 400~30kHz BPF THD=1% Rg=0k, IHF-A
05 0D 03 0B 05 0D 03 0B 05 0D 03 0B 05 0D 03 0B 05 0D 03 0B
-80.0 -70.0 50.0 65.0
RI=51kxVR1/ (VIN-VR1) RI=51kxVR2/ (VIN-VR2) GRE=20log(G1/VIN) GRE=20log(G2/VIN)
-20.0 -15.0
00 FA 01
FC 02
It shows a specified value at the deviation from the setting value. 1 0.2.4.6.8.10dB 2 12.14.16.18.20dB 3 Setting 10dB 4 Setting 20dB 5 From 0 to -50dB -2dB/STEP 6 From -54 to -70dB -4dB/STEP 7 Setting -50dB 8 Setting -70dB 9 From 0 to -59dB -1dB/STEP 10 Setting -59dB
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BD3861FS
Audio ICs
Parameter Maximum Bass boost gain Maximum Bass cut gain Bass switch step Maximum Middle boost gain Maximum Middle cut gain Middle switch step Maximum Treble boost gain Maximum Treble cut gain Treble switch step Microphone voltage gain GMIC 4.5 6.0 7.5 dB VIN=200mVrms GMIC=20log(O1/VIN) GMIC=20log(O2/VIN) 1 1 - 1 2 1 2 00 02 01 05 0D 03 0B O1 O2 GTB GTC GTST 10 -14 - 12 -12 2 14 -10 - dB dB dB VIN=200mVrms, f=10kHz VIN=200mVrms, f=10kHz GTB=20log(O1/VIN) GTB=20log(O2/VIN) GTC=20log(O1/VIN) GTC=20log(O2/VIN) 1 1 1 2 2 2 2 2 2 2 2 2 2 2 2 1 1 1 2 2 2 00 00 00 02 02 02 01 01 01 05 0D 03 EB 05 0D 03 FB 05 0D 03 - O1 O2 O1 O2 O1 O2 GMB GMC GMST 10 -14 - 12 -12 2 14 -10 - dB dB dB VIN=200mVrms VIN=200mVrms VIN=200mVrms GMB=20log(O1/VIN) GMB=20log(O2/VIN) GMC=20log(O1/VIN) GMC=20log(O2/VIN) 1 1 1 2 2 2 2 2 2 2 2 2 2 2 2 1 1 1 2 2 2 00 00 00 02 02 02 01 01 01 05 0D E3 0B 05 0D F3 0B 05 0D - 0B O1 O2 O1 O2 O1 O2 GBB GBC GBST 12 -16 - 14 -14 2 16 -12 - dB dB dB VIN=200mVrms, f=90Hz VIN=200mVrms, f=90Hz GBB=20log(O1/VIN) GBB=20log(O2/VIN) GBC=20log(O1/VIN) GBC=20log(O2/VIN) 1 1 1 2 2 2 2 2 2 2 2 2 2 2 2 1 1 1 2 2 2 00 00 00 02 02 02 01 01 01 05 ED 03 0B 05 FD 03 0B 05 - 03 0B O1 O2 O1 O2 O1 O2 Symbol Min. Typ. Max. Unit Conditions 1/4 2/5 SW No. 3/8 7 8 9/10 11/12 1 Select address/Serial data (HEX notation) 2 3 4-1 4-2 5-1 5-2 Measurement point
VIN=200mVrms, f=90Hz
VIN=200mVrms, f=10kHz
It shows a specified value at the deviation from the setting value.
8/13
BD3861FS
10 G1 10 10k G1 1 2 4700p 4700p 0.015 0.015 0.015 0.015 SW11 10 SW10 SW9 10 1 2 1 2 1 2 3.3k 3.3k 3.3k 0.15 0.15 O1 10k SW12 10k
V ~ V ~
GOUT1 32 GOUT2 31 VOL2 30 VOL1 29 TRE1 28 TRE2 27 MID22 26 MID21 25 MID12 24 MID11 23
V ~
10
3.3k 0.15 0.15
10k
O2
V ~
10
BASS22 19
BASS12 22
BASS11 21
OUT1 20
BASS21 18
BD3861FS
OUT2 17
13 GND
14 DATA
15 CLK
11 MIC
10 10 10 10 10 10 10 10 10 10 SW7 4.7k 4.7k 1234 5 SW1 VR1 VR2 SW2 SW5 1234 5 SW4
10 47 1 2
SW8 1 I
A -
DATA LATCH CLOCK
16 VCC
12 FIL
C1
C2
D1
D2
E1
10 E2
A1
A2
B1
1
2
3
4
B2
5
6
7
8
9
2
47
VCC=9
Measurement circuit
V ~
1
2 SW3 2 1 51k
V ~
1
2 SW6 2 1 51k
Audio ICs
Fig.1
9/13
BD3861FS
Audio ICs
Attached components External Parts of measurement circuit. (1) Element marked with * Carbon-film resistor: 1% * Film capacitor: 1% * Ceramic capacitor: 1% (2) Unless specified particularly, use the following external parts: * Carbon-film resistor: 5% * Film capacitor: 20% * Electrolytic capacitor: 20% Notes on wiring (1) GND shall be wired solidly. (2) Wiring pattern of CLK and DATA shall be away from that of analog unit and cross talk shall not be acceptable. (3) Wiring pattern of CLK and DATA of shall not be parallel if possible. They shall be shielded, if they are adjacent to each other.
Circuit operations Specifications for control signal (1) Timing of control signal * Data is read at a leading edge of clock. * Latch is read at a trailing edge of clock. * Be sure to set DATA to LOW after latching.
90% tsc twc 10% thd ts th tsd 90% twc 10% thd tsl 10% thl 90% 90%
CLK ( CLOCK Signal ) 15pin
DATA DATA Signal LATCH Signal 14pin
90%
90% twd DATA 10%
90% twh 10% DATA 10%
90% twl LATCH
90%
Fig.2
Constant of timing chart (Ta=25C, VCC=9V)
Parameter "High" input voltage "Low" input voltage Clock width Data width Latch width "Low" hold width Setup time (DATACLK) Hold time (CLKDATA) Setup time (CLKLATCH) Hold time (DATALATCH) "Low" setup time "Low" hold time Symbol VIH VIL twc twd twl twh tsd thd tsl thl ts th Min. 2.6 0 2.0 2.0 2.0 2.0 1.0 1.0 1.0 1.0 1.0 1.0 Typ. - - - - - - - - - - - - Max. 5.5 1.1 - - - - - - - - - - Unit V V s s s s s s s s s s
10/13
BD3861FS
OUT1 3.3k 4700p 4700p 0.015 0.015 0.015 0.015 10 10 3.3k 3.3k 0.15 0.15 10
OUT2
3.3k
0.15 0.15
10
32
25
29
28
27
31
30
26
24
22
21
20
23
19
18
0dB~ -70dB
Treble1 fC=10kHz
Treble2 fC=10kHz
Middle2 f0=1kHz
Middle1 f0=1kHz
Bass1 f0=90Hz
Bass2 f0=90Hz
VCC/2
VCC/2 0dB~ -59dB
0dB~ -59dB
VCC/2
- + - +
VCC/2
VCC/2
VCC/2
17
VCC/2
VCC/2 24k
- +
25k
25k
25k
25k
25k
25k
25k
25k
25k
25k
12k
VCC/2
Logic
VCC
25k
25k
25k
25k
25k
25k
25k
25k
25k
25k 100k
Application example
10
11
12
13
14
15
Audio ICs
10
10
10
10
10
10
10
10
10 4.7k
10 4.7k
10
47
16
1
2
3
4
5
6
7
8
9
47
VCC MIC A1 A2 B1 B2 C1 C2 D1 D2 E1 E2
DATA LATCH
CLOCK
Fig.3
11/13
+ -
+ -
BD3861FS
Audio ICs
Operation notes 1. About operation voltage supply range Within operation voltage supply range, basic circuit function operation is guaranteed within operation ambient temperature. But please confirm set up of constant and element, voltage set up and temperature set up on use. 2. About operation temperature range If it within recommended operation voltage range, circuit function operation is guaranteed within operation temperature. It corralled to conditions of power dissipation to temperature. Please watch out except condition stipulated by electrical characteristics within the range, It cannot guarantee standard value of electrical characteristics. But it retains original function. 3. About Application circuit Example of application circuit drawing is convinced as recommendable, but please confirm characteristic including above-mentioned notes. At use with modification of external constant, please decide with enough margin considering distribution of this IC, external parts including quiescence characteristics and excessive characteristics. Please note that we have not yet confirmed any concerned patent rights completely. 4. Power-on reset Any circuit to perform initialization in the IC upon power on is not contained. Therefore, be sure to send initial data to all the addresses upon power on. Moreover, be sure to mute the set side until the initial data has been sent. For data setting at the second time or later, necessary address only can be modified. 5. Schmidt circuit This IC has the Schmidt circuit as preventive measures against logic signal input into the DATA (14pin) and CLK (15pin) terminals. Therefore, this IC is not affected so much by noise to a logic signal line. For the "High" voltage for logic control, voltage in a range from 2.6 to 5.5V is available. 6. Setting of input gain Because of the S/N characteristics, it is recommendable to turn ON 6dBSW in input gain in a range between 6 and 20dB (in 2dB increment). 7. Input pin E1 (9pin) and E2 (10pin) Input pin E1 (9pin) and E2 (10pin) has a built-in mute circuit. It is the optimal for the auxiliary input. 8. Microphone terminal If the microphone terminal (11pin) is not used, use this IC in "open" because of the S/N characteristics. 9. Serial control Wire the CLK terminal and DATA terminal taking care not to interfere with an analog signal line.
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BD3861FS
Audio ICs
Electrical characteristic curves
Gain(dB) Gain(dB)
Gain(dB)
3dB
Boost fo 90Hz Cut fo
Boost
Boost
f(Hz)
1kHz Cut
f(Hz)
fc 10kHz Cut
f(Hz)
3dB
Fig.4 Tone control (Bass)
Fig.5 Tone control (Middle)
Fig.6 Tone control (Treble)
External dimensions (Unit : mm)
13.60.2 32 17
7.80.3
5.40.2
1
16
1.80.1
0.11
0.8
0.360.1
0.3Min. 0.15
SSOP-A32
0.150.1
13/13
Appendix
Notes
No technical content pages of this document may be reproduced in any form or transmitted by any means without prior permission of ROHM CO.,LTD. The contents described herein are subject to change without notice. The specifications for the product described in this document are for reference only. Upon actual use, therefore, please request that specifications to be separately delivered. Application circuit diagrams and circuit constants contained herein are shown as examples of standard use and operation. Please pay careful attention to the peripheral conditions when designing circuits and deciding upon circuit constants in the set. Any data, including, but not limited to application circuit diagrams information, described herein are intended only as illustrations of such devices and not as the specifications for such devices. ROHM CO.,LTD. disclaims any warranty that any use of such devices shall be free from infringement of any third party's intellectual property rights or other proprietary rights, and further, assumes no liability of whatsoever nature in the event of any such infringement, or arising from or connected with or related to the use of such devices. Upon the sale of any such devices, other than for buyer's right to use such devices itself, resell or otherwise dispose of the same, no express or implied right or license to practice or commercially exploit any intellectual property rights or other proprietary rights owned or controlled by ROHM CO., LTD. is granted to any such buyer. Products listed in this document use silicon as a basic material. Products listed in this document are no antiradiation design.
The products listed in this document are designed to be used with ordinary electronic equipment or devices (such as audio visual equipment, office-automation equipment, communications devices, electrical appliances and electronic toys). Should you intend to use these products with equipment or devices which require an extremely high level of reliability and the malfunction of with would directly endanger human life (such as medical instruments, transportation equipment, aerospace machinery, nuclear-reactor controllers, fuel controllers and other safety devices), please be sure to consult with our sales representative in advance. About Export Control Order in Japan Products described herein are the objects of controlled goods in Annex 1 (Item 16) of Export Trade Control Order in Japan. In case of export from Japan, please confirm if it applies to "objective" criteria or an "informed" (by MITI clause) on the basis of "catch all controls for Non-Proliferation of Weapons of Mass Destruction.
Appendix1-Rev1.0

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