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ICS601-25
LOW PHASE NOISE 1 TO 5 CLOCK MULTIPLIER
Description
The ICS601-25 is a low-cost, low phase noise, high performance clock synthesizer for applications which require low phase noise, low jitter, and low skew fanout. It is ICS' lowest phase noise multiplier, and also the lowest CMOS part in the industry. Using ICS' patented analong and digital Phase Locked Loop (PLL) techniques, the chip accepts a 10-27 MHz crystal or clock input, and produces output clocks up to 156 MHz.
Features
* * * * * * * * * * * *
Packaged in 20-pin SSOP Uses fundamental 10 - 27 MHz crystal or clock Output clocks up to 156 MHz Low phase noise: -132 dBc/Hz at 10 kHz Five low skew (<250 ps) outputs Low jitter - 18 ps one sigma at 125 MHz Full swing CMOS outputs with 25 mA drive capability at TTL levels Powerdown mode lowers power consumption Advanced, low power, sub-micron CMOS process Industrial temperature version available Available in Pb (lead) free package Operating voltage of 3.3 V
Block Diagram
VDD 5
Reference Divider
Phase Comparator
Charge Pump
Loop Filter
VCO
CLK1 CLK2
X1/ICLK Crystal or clock input Crystal Oscillator X2 VCO Divide
CLK3 CLK4 CLK5 ROM Based Multipliers
4 S3:0
3 GND PD
MDS 601-25 C I n t e gra te d C i r c u i t S y s t e m s
1
525 Race Stre et, San Jo se, CA 9 5126
Revision 071505 te l (40 8) 2 97-12 01
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ICS601-25 LOW PHASE NOISE 1 TO 5 CLOCK MULTIPLIER
Pin Assignment
X1/ICLK VDD S0 VDD VDD S1 GND S3 PD S2 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 X2 GND VDD CLK2 CLK3 GND CLK4 CLK5 VDD CLK1
Output Select Table
S3 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 S2 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 S1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 S0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 Multiplier x1 x2 x3 x4 x5 x6 x8 x16 x7 x9 x10 x11 x12 output tristates x14 x15
20 Pin (150 mil) SSOP
Pin Descriptions
Pin Number
1 2 3 4, 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
Pin Name
X1/ICLK VDD S0 VDD S1 GND S3 PD S2 CLK1 VDD CLK5 CLK4 GND CLK3 CLK2 VDD GND X2
Pin Type
XI Power Input Power Input Power Input Input Input Output Power Output Output Power Output Output Power Power XO
Pin Description
Crystal or clock input. Connect to a 10-27 MHz fundamental parallel mode crystal or clock input. Connect to +3.3 V. Select pin 0. Internal pull-up. Connect to +3.3 V. Select pin 1. Internal pull-up. Connect to ground. Select pin 3. Internal pull-down. Powerdown when held low. Internal pull-up. Select pin 2. Internal pull-up. Clock output. Connect to +3.3 V. Clock output. Clock output. Connect to ground. Clock output. Clock output. Connect to +3.3 V. Connect to ground. Crystal connection. Connect to a 10-27 MHz fundamental parallel mode crystal or leave unconnected for clock input.
MDS 601-25 C In te grated Circuit Systems
2
525 Ra ce Street, San Jose, CA 9512 6
Revision 071505 tel (4 08) 297-1 201
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ICS601-25 LOW PHASE NOISE 1 TO 5 CLOCK MULTIPLIER
External Components
The ICS601-25 requires a minimum number of external components for proper operation. Decoupling capacitors of 0.01 F and 0.1 F should be connected between VDD and GND, as close to the part as possible. A 33 series terminating resistor should be used on each clock output. The crystal must be connected as close to the chip as possible. The crystal should be fundamental mode, parallel resonant. Do not use third overtone. For exact tuning when using a crystal, capacitors should be connected from pins X1 to ground and X2 to ground. In general, the value of these capacitors is given by the following equation, where CL is the crystal load capacitance: Crystal caps (pF) = (CL-5) x 2. So for a crystal with 16 pF load capacitance, two 22 pF caps can be used. For any given board layout, ICS can measure the board capacitance and recommend the exact capacitance value to use.
Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the ICS601-25. These ratings, which are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical parameters are guaranteed only over the recommended operating temperature range.
Item
Supply Voltage, VDD All Inputs and Outputs Ambient Operating Temperature, Commercial version Ambient Operating Temperature, Industrial version Storage Temperature Junction Temperature Soldering Temperature 7V
Rating
-0.5 V to VDD+0.5 V 0 to +70 C -40 to +85 C -65 to +150 C 125 C 260 C
Recommended Operation Conditions
Parameter
Ambient Operating Temperature (commercial) Ambient Operating Temperature (industrial) Power Supply Voltage (measured in respect to GND)
Min.
0 -40 +2.97
Typ.
Max.
+70 +85 +3.63
Units
C C V
DC Electrical Characteristics
VDD=3.3 V 10%, Ambient temperature -40 to +85C
Parameter
Operating Voltage Input High Voltage Input Low Voltage
Symbol
VDD VIH VIL
Conditions
X1/ICLK pin only X1/ICLK pin only
Min.
2.97 VDD/2+1
Typ.
Max.
3.63 VDD/2-1
Units
V V V
MDS 601-25 C In te grated Circuit Systems
3
525 Ra ce Street, San Jose, CA 9512 6
Revision 071505 tel (4 08) 297-1 201
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ICS601-25 LOW PHASE NOISE 1 TO 5 CLOCK MULTIPLIER
DC Electrical Characteristics (continued)
Parameter
Input High Voltage Input Low Voltage Output High Voltage, CMOS level Output High Voltage Output Low Voltage Operating Supply Current Short Circuit Current Input Capacitance Output Impedance On Chip Pull-up Resistor On Chip Pull-down Resistor ZOUT RPU RPD S2, S1, S0, PD pins S3 pin
Symbol
VIH VIL VOH VOH VOL IDD IOS
Conditions
Min.
2
Typ.
Max.
VDD 0.8
Units
V V V V
IOH = -4 mA IOL = -12 mA IOL = 12 mA No load, 125 MHz Each output Select pins
VDD-0.4 2.4 0.4 45 40 60 5 20 510 240 60
V mA mA pF k k
AC Electrical Characteristics
VDD = 3.3V 10%, Ambient Temperature -40 to +85 C
Parameter
Input Frequency Output Frequency Output Rise Time Output Fall Time Output Clock Duty Cycle Maximum Absolute jitter, short term, 125 MHz Maximum jitter, one sigma, 125 MHz (x5) Phase Noise, relative to carrier, 125 MHz (x5) Phase Noise, relative to carrier, 125 MHz (x5) Phase Noise, relative to carrier, 125 MHz (x5) Phase Noise, relative to carrier, 125 MHz (x5) Output to Output Skew Note 1: Measured with 15 pF load tOR tOF At 3.3V 0.8 to 2.0 V, Note 1 0.8 to 2.0 V, Note 1 At VDD/2, Note 1 Note 1 Note 1 100 Hz offset 1 kHz 10 kHz offset 100 kHz offset 25M in, 125M out, Note 1 -90 -115 -118 -115 45 50 50 18 -95 -120 -123 -120 250
Symbol
Conditions
Min.
10
Typ.
Max. Units
27 156 1.5 1.5 55 75 25 MHz MHz ns ns % ps ps dBc/Hz dBc/Hz dBc/Hz dBc/Hz ps
MDS 601-25 C In te grated Circuit Systems
4
525 Ra ce Street, San Jose, CA 9512 6
Revision 071505 tel (4 08) 297-1 201
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ICS601-25 LOW PHASE NOISE 1 TO 5 CLOCK MULTIPLIER
Package Outline and Package Dimensions (20-pin SSOP, 150 Mil. Narrow Body)
Package dimensions are kept current with JEDEC Publication No. 95
Millimeters
20
Inches* Min Max
Symbol
Min
Max
E1 INDEX AREA
E
12 D
A A1 A2 b C D E E1 e L aaa
1.35 1.75 0.10 0.25 -1.50 0.20 0.30 0.18 0.25 8.55 8.75 5.80 6.20 3.80 4.00 0.635 Basic 0.40 1.27 0 8 -0.10
.0532 .0688 .0040 0.0098 -.059 0.008 0.012 .007 .010 .337 .344 .228 .244 .1497 .1574 0.025 Basic .016 .050 0 8 -0.004
A2 A1
A
*For reference only. Controlling dimensions in mm.
c
-Ce
b SEATING PLANE L
aaa C
Ordering Information
Part / Order Number
ICS601R-25 ICS601R-25T ICS601R-25I ICS601R-25IT ICS601R-25LF ICS601R-25LFT ICS601R-25ILF ICS601R-25ILFT
Marking
ICS601R-25 ICS601R-25 ICS601R-25I ICS601R-25I 601R-25LF 601R-25LF 601R-25ILF 601R-25ILF
Shipping Packaging
Tubes Tape and Reel Tubes Tape and Reel Tubes Tape and Reel Tubes Tape and Reel
Package
20-pin SSOP 20-pin SSOP 20-pin SSOP 20-pin SSOP 20-pin SSOP 20-pin SSOP 20-pin SSOP 20-pin SSOP
Temperature
0 to +70 C 0 to +70 C -40 to 85 C -40 to 85 C 0 to +70 C 0 to +70 C -40 to 85 C -40 to 85 C
Parts that are ordered with a "LF" suffix to the part number are the Pb-Free configuration and are RoHS compliant. While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems (ICS) assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical medical instruments.
MDS 601-25 C In te grated Circuit Systems
5
525 Ra ce Street, San Jose, CA 9512 6
Revision 071505 tel (4 08) 297-1 201
w w w. i c s t . c o m

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