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SMPS MOSFET
PD - 95472A
IRFB18N50KPBF
Applications l Switch Mode Power Supply (SMPS) l Uninterruptible Power Supply l High Speed Power Switching l Hard Switched and High Frequency Circuits l Lead-Free
HEXFET(R) Power MOSFET
VDSS
500V
RDS(on) typ.
0.26
ID
17A
Benefits l Low Gate Charge Qg results in Simple Drive Requirement l Improved Gate, Avalanche and Dynamic dv/dt Ruggedness l Fully Characterized Capacitance and Avalanche Voltage and Current l Low RDS(on) Absolute Maximum Ratings
Parameter
ID @ TC = 25C ID @ TC = 100C IDM PD @TC = 25C VGS dv/dt TJ TSTG Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Pulsed Drain Current Power Dissipation Linear Derating Factor Gate-to-Source Voltage Peak Diode Recovery dv/dt Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds (1.6mm from case ) Mounting Torque, 6-32 or M3 screw
TO-220AB
Max.
17 11 68 220 1.8 30 7.8 -55 to + 150 300 10
Units
A W W/C V V/ns
C N
Avalanche Characteristics
Symbol
EAS IAR EAR
Parameter
Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy
Typ.
--- --- ---
Max.
370 17 22
Units
mJ A mJ
Thermal Resistance
Symbol
RJC RCS RJA
Parameter
Junction-to-Case Case-to-Sink, Flat, Greased Surface Junction-to-Ambient
Typ.
--- 0.50 ---
Max.
0.56 --- 58
Units
C/W
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02/03/06
IRFB18N50KPBF
Static @ TJ = 25C (unless otherwise specified)
Symbol V(BR)DSS
V(BR)DSS/TJ
RDS(on) VGS(th) IDSS IGSS
Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage
Min. Typ. Max. Units Conditions 500 --- --- V VGS = 0V, ID = 250A --- 0.59 --- V/C Reference to 25C, I D = 1mA --- 0.26 0.29 VGS = 10V, ID = 10A 3.0 --- 5.0 V VDS = V GS, ID = 250A --- --- 50 A VDS = 500V, VGS = 0V --- --- 250 A VDS = 400V, VGS = 0V, TJ = 125C --- --- 100 VGS = 30V nA --- --- -100 VGS = -30V
Dynamic @ TJ = 25C (unless otherwise specified)
Symbol gfs Qg Qgs Qgd td(on) tr td(off) tf Ciss Coss Crss Coss Coss Coss eff. Parameter Forward Transconductance Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Output Capacitance Output Capacitance Effective Output Capacitance Min. 6.4 --- --- --- --- --- --- --- --- --- --- --- --- --- Typ. --- --- --- --- 22 60 45 30 2830 330 38 3310 93 155 Max. Units Conditions --- S VDS = 50V, ID = 10A 120 ID = 17A 34 nC VDS = 400V 54 VGS = 10V, See Fig. 6 and 13 --- VDD = 250V --- ID = 17A ns --- RG = 7.5 --- VGS = 10V,See Fig. 10 --- VGS = 0V --- VDS = 25V --- pF = 1.0MHz, See Fig. 5 --- VGS = 0V, VDS = 1.0V, = 1.0MHz --- VGS = 0V, VDS = 400V, = 1.0MHz --- VGS = 0V, VDS = 0V to 400V
Diode Characteristics
Symbol IS
ISM
VSD trr Qrr ton Notes:
Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse RecoveryCharge Forward Turn-On Time
Min. Typ. Max. Units
Conditions D MOSFET symbol 17 --- --- showing the A G integral reverse 68 --- --- S p-n junction diode. --- --- 1.5 V TJ = 25C, IS = 17A, VGS = 0V --- 520 780 ns TJ = 25C, IF = 17A --- 5.3 8.0 C di/dt = 100A/s Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Repetitive rating; pulse width limited by
max. junction temperature.
Pulse width 300s; duty cycle 2%. Coss eff. is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS.
Starting TJ = 25C, L = 2.5mH, RG = 25,
IAS = 17A,
R is measured at TJ approximately 90C
ISD 17A, di/dt 376A/s, VDD V(BR)DSS,
TJ 150C
2
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IRFB18N50KPBF
100
VGS 15V 12V 10V 8.0V 7.0V 6.0V 5.5V BOTTOM 5.0V TOP
100
ID, Drain-to-Source Current (A)
10
ID, Drain-to-Source Current (A)
10
1
VGS 15V 12V 10V 8.0V 7.0V 6.0V 5.5V BOTTOM 5.0V TOP
5.0V
1
0.1
5.0V
0.1
0.01
20s PULSE WIDTH Tj = 25C
0.001 0.1 1 10 100
20s PULSE WIDTH Tj = 150C
0.01 0.1 1 10 100
VDS, Drain-to-Source Voltage (V)
VDS, Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
RDS(on) , Drain-to-Source On Resistance (Normalized)
100.00
3.0
ID = 17A
TJ = 150C
() ID, Drain-to-Source Current
2.5
10.00
2.0
1.00
1.5
TJ = 25C
1.0
0.10
0.01 5.0 6.0 7.0
VDS = 100V 20s PULSE WIDTH
8.0 9.0 10.0
0.5
0.0 -60 -40 -20
VGS = 10V
0 20 40 60 80 100 120 140 160
VGS, Gate-to-Source Voltage (V)
TJ , Junction Temperature ( C)
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance Vs. Temperature
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IRFB18N50KPBF
100000
20
VGS , Gate-to-Source Voltage (V)
VGS = 0V, f = 1 MHZ Ciss = Cgs + Cgd, Cds SHORTED Crss = Cgd Coss = Cds + Cgd
ID = 17A
16
V DS= 400V V DS= 250V V DS= 100V
C, Capacitance(pF)
10000
Ciss
1000
12
Coss
100
8
4
Crss
10 1 10 100 1000
0
0
30
60
90
120
150
VDS, Drain-to-Source Voltage (V)
QG , Total Gate Charge (nC)
Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage
100
1000
ISD , Reverse Drain Current (A)
OPERATION IN THIS AREA LIMITED BY RDS(on)
TJ = 150 C
10
ID , Drain Current (A)
100 10us 100us 1ms 1 10ms
TJ = 25 C
1
10
0.1 0.2
V GS = 0 V
0.5 0.8 1.1 1.4
0.1
TC = 25 C TJ = 150 C Single Pulse
10 100 1000 10000
VSD ,Source-to-Drain Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 7. Typical Source-Drain Diode Forward Voltage
Fig 8. Maximum Safe Operating Area
4
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IRFB18N50KPBF
20
V DS VGS
RD
ID , Drain Current (A)
15
RG 10V
D.U.T.
+
- VDD
10
Pulse Width 1 s Duty Factor 0.1 %
Fig 10a. Switching Time Test Circuit
5
VDS 90%
0
25
50
75
100
125
150
TC , Case Temperature ( C)
10% VGS
Fig 9. Maximum Drain Current Vs. Case Temperature
td(on)
tr
t d(off)
tf
Fig 10b. Switching Time Waveforms
1
Thermal Response(Z thJC )
D = 0.50 0.20 0.1 0.10 0.05 0.02 0.01 SINGLE PULSE (THERMAL RESPONSE) PDM t1 t2 Notes: 1. Duty factor D =t 1 / t 2 2. Peak TJ = P DM x Z thJC + TC 0.0001 0.001 0.01 0.1 1
0.01
0.001 0.00001
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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IRFB18N50KPBF
EAS , Single Pulse Avalanche Energy (mJ)
750
600
ID 7.6A 11A BOTTOM 17A TOP
15V
450
VDS
L
DRIVER
300
RG
20V
D.U.T
IAS
+ - VDD
A
150
tp
0.01
Fig 12c. Unclamped Inductive Test Circuit
0 25 50 75 100 125 150
Starting T J, Junction Temperature ( C)
Fig 12a. Maximum Avalanche Energy Vs. Drain Current
tp
V(BR)DSS
I AS
Fig 12d. Unclamped Inductive Waveforms
Current Regulator Same Type as D.U.T.
50K 12V .2F .3F
QG
VGS
D.U.T. + V - DS
QGS VG
QGD
VGS
3mA
IG
ID
Current Sampling Resistors
Charge
Fig 13a. Gate Charge Test Circuit
Fig 13b. Basic Gate Charge Waveform
6
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IRFB18N50KPBF
Peak Diode Recovery dv/dt Test Circuit
D.U.T
+
+
Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer
-
+
RG * * * * dv/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test
+ VDD
Driver Gate Drive P.W. Period D=
P.W. Period VGS=10V
*
D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
VDD
Re-Applied Voltage Inductor Curent
Body Diode
Forward Drop
Ripple 5%
ISD
* VGS = 5V for Logic Level Devices Fig 14. For N-Channel HEXFET(R) Power MOSFETs
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IRFB18N50KPBF
TO-220AB Package Outline
(Dimensions are shown in millimeters (inches)
TO-220AB Part Marking Information
@Y6HQG@) UCDTADTA6IADSA A GPUA8P9@A &'( 6TT@H7G@9APIAXXA (A! DIAUC@A6TT@H7GAGDI@AA8A Ir)AAQAAvAhriyAyvrAvv vqvphrAAGrhqAAArrA DIU@SI6UDPI6G S@8UDAD@S GPBP 6TT@H7G GPUA8P9@ Q6SUAIVH7@S
96U@A8P9@ @6SAA2A! X@@FA ( GDI@A8
TO-220AB packages are not recommended for Surface Mount Application. Data and specifications subject to change without notice. This product has been designed and qualified for the industrial market. Qualification Standards can be found on IR's Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information. 02/06
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