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Final Electrical Specifications
LTC1326-2.5 Micropower Precision Triple Supply Monitor
June 1998
FEATURES
s s s s s s s s s s
DESCRIPTION
The LTC(R)1326-2.5 is a triple supply monitor intended for systems with multiple supply voltages. It provides micropower operation, small size and high accuracy supply monitoring. Tight 0.75% threshold accuracy and glitch immunity ensure reliable reset operation without false triggering. The 20A typical supply current makes the LTC1326-2.5 ideal for power-conscious systems. The RST output is guaranteed to be in the correct state for VCC25 or VCC3 down to 1V. The LTC1326-2.5 may also be configured as a dual or single supply monitor. Allowed configurations are 3.3V and 2.5V, 3.3V and Adj, or 3.3V only. A manual pushbutton reset input provides the ability to generate a very narrow "soft" reset pulse (100s typ) or a 200ms reset pulse equivalent to a power-on reset. Both SRST and RST outputs are open-drain and can be OR-tied with other reset sources.
, LTC and LT are registered trademarks of Linear Technology Corporation.
Simultaneously Monitors 2.5V, 3.3V and Adjustable Inputs Guaranteed Threshold Accuracy: 0.75% Low Supply Current: 20A Internal Reset Time Delay: 200ms Manual Pushbutton Reset Input Active Low and Active High Reset Outputs Active Low "Soft" Reset Output Power Supply Glitch Immunity Guaranteed RESET for VCC3 1V or VCC25 1V 8-Pin SO and MSOP Packages
APPLICATIONS
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Desktop Computers Notebook Computers Intelligent Instruments Portable Battery-Powered Equipment
TYPICAL APPLICATION
RST Output Voltage vs Supply Voltage
DC/DC CONVERTER 2.5V 3.3V VCORE
3.5
SYSTEM LOGIC
3.0 RST OUTPUT VOLTAGE (V) 2.5 2.0 1.5 1.0 0.5
VCC25 = VCCA = VCC3 4.7k PULL-UP FROM RST TO VCC3 TA = 25C
0.1F
VCC25 VCC3 VCCA LTC1326-2.5 RST PBR PUSHBUTTON RESET GND SRST
0 0 0.5 1.0 1.5 2.0 VCC3 (V) 2.5 3.0 3.5
1326-2.5 TA01
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
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1326-2.5 TA02
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LTC1326-2.5 ABSOLUTE
(Notes 1, 2)
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RATI GS
Operating Temperature Range LTC1326C-2.5 ........................................ 0C to 70C LTC1326I-2.5 ..................................... - 40C to 85C Storage Temperature Range ................ - 65C to 150C Lead Temperature (Soldering, 10 sec)................. 300C
Terminal Voltage VCC3, VCC25, VCCA .................................. - 0.5V to 7V RST, SRST ............................................ - 0.5V to 7V RST ...................................... - 0.5V to (VCC3 + 0.3V) PBR .......................................................... - 7V to 7V
PACKAGE/ORDER I FOR ATIO
TOP VIEW VCC3 VCC25 VCCA GND 1 2 3 4 8 7 6 5 PBR SRST RST RST
ORDER PART NUMBER LTC1326CMS8-2.5 MS8 PART MARKING LTEK
MS8 PACKAGE 8-LEAD PLASTIC MSOP TJMAX = 125C, JA = 160C/W
Consult factory for Military grade parts.
ELECTRICAL CHARACTERISTICS
VCC3 = 3.3V, VCC25 = 2.5V, VCCA = VCC3, TA = 25C unless otherwise noted.
SYMBOL VRT3 VRT25 VRTA VCC IVCC3 IVCC25 IVCCA PARAMETER Reset Threshold VCC3 Reset Threshold VCC25 Reset Threshold VCCA VCC3 Operating Voltage VCC3 Supply Current VCC25 Input Current VCCA Input Current CONDITIONS 0C TA 70C -40C TA 85C 0C TA 70C -40C TA 85C 0C TA 70C -40C TA 85C RST in Correct Logic State PBR = VCC3 VCC25 = 2.5V VCCA = 1V 0C TA 70C -40C TA 85C RST Low with 10k Pull-Up to VCC3 0C TA 70C -40C TA 85C SRST Low with 10k Pull-Up to VCC3 VCC25, VCC3 or VCCA Less Than Reset Threshold VRT by More Than 1% PBR = 0V 0C TA 70C -40C TA 85C
q q q q q q q q q q q q q q q q
tRST
Reset Pulse Width
tSRST tUV IPBR
Soft Reset Pulse Width VCC Undervoltage Detect to RST PBR Pull-Up Current
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TOP VIEW VCC3 1 VCC25 2 VCCA 3 GND 4 8 PBR 7 SRST 6 RST 5 RST
ORDER PART NUMBER LTC1326CS8-2.5 LTC1326IS8-2.5 S8 PART MARKING 132625 326I25
S8 PACKAGE 8-LEAD PLASTIC SO TJMAX = 125C, JA = 150C/W
MIN 3.094 3.052 2.344 2.312 0.992 0.980 1
TYP 3.118 3.118 2.363 2.363 1.000 1.000 20 2.8
MAX 3.143 3.143 2.381 2.381 1.007 1.007 7 40 7 5 15 280 300 200
UNITS V V V V V V V A A nA nA ms ms s s
-5 -15 140 140 50
0 0 200 200 100 13
3 3
7 7
10 15
A A
LTC1326-2.5
ELECTRICAL CHARACTERISTICS
VCC3 = 3.3V, VCC25 = 2.5V, VCCA = VCC3, TA = 25C unless otherwise noted.
SYMBOL VIL VIH tPW tDB tPB PARAMETER PBR, RST Input Low Voltage PBR, RST Input High Voltage PBR Min Pulse Width PBR Debounce PBR Assertion Time for Transition from Soft to Hard Reset Mode RST Output Voltage Low Deassertion of PBR Input to SRST Output (PBR Pulse Width = 1s) PBR Held Less Than VIL 0C TA 70C -40C TA 85C ISINK = 5mA ISINK = 100A, 0C TA 70C ISINK = 100A, -40C TA 85C SRST Output Voltage Low RST Output Voltage Low VOH RST Output Voltage High (Note 3) SRST Output Voltage High (Note 3) RST Output Voltage High tPHL tPLH Prop Delay RST to RST High Input to Low Output Prop Delay RST to RST Low Input to High Output ISINK = 2.5mA ISINK = 2.5mA ISOURCE = 1A ISOURCE = 1A ISOURCE = 600A CRST = 20pF CRST = 20pF VCC3 = 1V, VCC25 = 0V VCC3 = 0V, VCC25 = 1V VCC3 = 1V, VCC25 = 1V VCC3 = 1.1V, VCC25 = 0V VCC3 = 0V, VCC25 = 1.1V VCC3 = 1.1V, VCC25 = 1.1V CONDITIONS
q q q q
MIN 2 40
TYP
MAX 0.8
UNITS V V ns
20
35
ms
q q q q q q q q q q q q q q
1.4 1.4
2.0 2.0 0.15 0.05 0.05 0.05 0.05 0.05 0.05 0.15 0.15
2.8 3.0 0.4 0.4 0.4 0.4 0.4 0.4 0.4 0.4 0.4
s s V V V V V V V V V V V V
VOL
VCC3 - 1 VCC3 - 1 VCC3 - 1 25 45
ns ns
The q denotes specifications which apply over the full operating temperature range. Note 1: Absolute Maximum Ratings are those values beyond which the life of the device may be impaired.
Note 2: All voltage values are with respect to GND. Note 3: The output pins SRST and RST have weak internal pull-ups to VCC3 of 6A typ. However, external pull-up resistors may be used when faster rise times are required.
TYPICAL PERFORMANCE CHARACTERISTICS
IVCC3 vs Temperature
25 24 23 22 IVCC25 (A)
2.85 2.80 2.75 2.70 2.65 2.60 2.55
80 100
INPUT CURRENT (nA)
IVCC3 (A)
21 20 19 18 17 16 15 - 60 - 40 - 20 0 20 40 60 TEMPERATURE (C)
UW
1326 G01
IVCC25 vs Temperature
3.00 2.95 2.90
2 1 0 -1 -2 3
VCCA Input Current vs Input Voltage
TA = 25C
2.50 - 60 - 40 - 20 0 20 40 60 TEMPERATURE (C)
80
100
-3 0.8 0.85 0.9 0.95 1.0 1.05 1.1 1.15 1.2 INPUT VOLTAGE (V)
1236 G06
1326-2.5 G02
3
LTC1326-2.5 TYPICAL PERFORMANCE CHARACTERISTICS
VCC25 Transient Immunity
45 40 RESET OCCURS ABOVE CURVE TA = 25C 40 35 RESET OCCURS ABOVE CURVE TA = 25C
TRANSIENT DURATION (s)
TRANSIENT DURATION (s)
35 30 25 20 15 10 5
30 25 20 15 10 5 0 0.01 0.1 1 0.001 VCCA RESET COMPARATOR OVERDRIVE (V)
1326 G05
TRANSIENT DURATION (s)
0 0.01 0.1 1 0.001 VCC25 RESET COMPARATOR OVERDRIVE (V)
1326-2.5 G04
VCC25 Threshold Voltage vs Temperature
2.375 VCC25 THRESHOLD VOLTAGE, VRT25 (V)
3.130 3.125 3.120 3.115 3.110 3.105 3.100 - 60 - 40 - 20
VCCA THRESHOLD VOLTAGE, VRTA (V)
VCC3 THRESHOLD VOLTAGE, VRT3 (V)
2.370
2.365
2.360
2.355
2.350 - 60 - 40 - 20 0 20 40 60 TEMPERATURE (C)
Reset Pulse Width vs Temperature
225 SOFT RESET PULSE WIDTH, tSRST (s) RESET PULSE WIDTH, tRST (ms) 220 215 210 205 200 195 190 - 60 - 40 - 20 0 20 40 60 TEMPERATURE (C) 112.5 110.0 107.5 105.0 102.5 100.0 97.5
PBR ASSERTION TIME TO RESET, tPB (SEC)
4
UW
80
VCCA Transient Immunity
40 35 30 25 20 15 10 5
VCC3 Transient Immunity
RESET OCCURS ABOVE CURVE TA = 25C
0 0.01 0.1 1 0.001 VCC3 RESET COMPARATOR OVERDRIVE (V)
1326 G03
VCC3 Threshold Voltage vs Temperature
3.135
VCCA Threshold Voltage vs Temperature
1.005 1.004 1.003 1.002 1.001 1.000 1.999 1.998 1.997 1.996 1.995 - 60 - 40 - 20 0 20 40 60 TEMPERATURE (C) 80 100
100
0
20
40
60
80
100
TEMPERATURE (C)
1326-2.5 G07
1326 G08
1326 G09
"Soft" Reset Pulse Width vs Temperature
2.25 2.20 2.15 2.10 2.05 2.00 1.95
PBR Assertion Time to Reset vs Temperature
80
100
95.0 - 60 - 40 - 20 0 20 40 60 TEMPERATURE (C)
80
100
1.90 - 60 - 40 - 20 0 20 40 60 TEMPERATURE (C)
80
100
1236 G10
1236 G11
1236 G12
LTC1326-2.5
PIN FUNCTIONS
VCC3 (Pin 1): 3.3V Sense Input and Power Supply Pin for the IC. Bypass to ground with 0.1F ceramic capacitor. VCC25 (Pin 2): 2.5V Sense Input. Used as gate drive for RST output FET when the voltage on VCC3 is less than the voltage on VCC25. If unused it can be tied to VCC3. VCCA (Pin 3): 1V Sense, High Impedance Input. Can be used as a logic input with a 1V threshold. If unused it can be tied to either VCC3 or VCC25. GND (Pin 4): Ground. RST (Pin 5): Reset Logic Output. Active high CMOS logic output, drives high to VCC3, buffered compliment of RST. An external pull-down on the RST pin will drive this pin high. RST (Pin 6): Reset Logic Output. Active low, open-drain logic output with weak pull-up to VCC3. Can be pulled up greater than VCC3 when interfacing to 5V logic. Asserted when one or more of the supplies are below trip thresholds and held for 200ms after all supplies become valid. Also asserted after PBR is held low for more than 2 seconds and for an additional 200ms after PBR is released. SRST (Pin 7): Soft Reset. Active low, open-drain logic output with weak pull-up to VCC3. Can be pulled up greater than VCC3 when interfacing to 5V logic. Asserted for 100s after PBR is held low for less than 2 seconds and released. PBR (Pin 8): Pushbutton Reset. Active low logic input with weak pull-up to VCC3. Can be pulled up greater than VCC3 when interfacing to 5V logic. When asserted for less than 2 seconds, outputs a soft reset 100s pulse on the SRST pin. When PBR is asserted for greater than 2 seconds, the RST output is forced low and remains low until 200ms after PBR is released.
BLOCK DIAGRAM
VCC3 7A PBR 8
VCC25 2
VCC3 INTERNAL
VCC3 1 VCC25 VCC3 5 RST
VCCA 3
GND 4
REF
1326-2.5 BD
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-
+
+
-
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VCC3 6A 7 PBR TIMER SOFT RESET RESET SRST
TO POWER DETECT VCC3 6A 200ms RESET GENERATOR POWER DETECT/ GATE DRIVE
VCC3
6
RST
5
LTC1326-2.5
TI I G DIAGRA S
VCC Monitor Timing
VCCX VRTX tRST
RST PBR t < tPB tDB tSRST
1326 TD01
RST
SRST
APPLICATIONS INFORMATION
Operation The LTC1326-2.5 is a micropower, high accuracy triple supply monitoring circuit. The part has two basic functions: generation of a reset when power supplies are out of range, and generation of reset or a "soft" reset when the PBR is pulled low. Supply Monitoring All three VCC inputs must be above predetermined thresholds for 200ms before the reset output is released. The LTC1326-2.5 will assert reset during power-up, power-down and brownout conditions on any one or more of the VCC inputs. On power-up, either the VCC25 or VCC3 pin can power the drive circuits for the RST pin. This ensures that RST will be low when either VCC25 or VCC3 reaches 1V. As long as any one of the VCC inputs is below its predetermined threshold, RST will stay a logic low. Once all of the VCC inputs rise above their thresholds, an internal timer is started and RST is released after 200ms. The RST pin outputs the inverted state of what is seen on RST pin. RST is reasserted whenever any one of the VCC inputs drops below its predetermined threshold and remains asserted until 200ms after all of the VCC inputs are above their thresholds. On power-down, once any of the VCC inputs drop below its threshold, RST is held at a logic low. A logic low of 0.4V is guaranteed until VCC3 and VCC25 drop below 1V. The three precision voltage comparators internal to the LTC1326-2.5 have response times that are typically 13s. This slow response time helps prevent mistriggering due to transients on each of the VCC inputs. The part's ability to suppress transients can be improved by bypassing each of the VCC inputs with a 0.1F capacitor to ground. Pushbutton Reset The LTC1326-2.5 provides a pushbutton reset input pin. The PBR input has an internal pull-up current source to VCC3. If the PBR pin is not used it can be left floating. When the PBR is pulled low for less than tPB ( 2 sec), a narrow (100s typ) soft reset pulse is generated on the SRST output pin after the button is released. The pushbutton circuitry contains an internal debounce counter which delays the output of the soft reset pulse by typically 20ms. This pin can be OR-tied to the RST pin and issue what is called a "soft" reset. The SRST thereby resets the microprocessor without interrupting the DRAM refresh cycle. In this manner DRAM information remains undisturbed. Alternatively, SRST may be monitored by the processor to initiate a software-controlled reset. When the PBR pin is held low for longer than tPB ( 2 sec), a standard reset is generated. Once the 2 second period has elapsed, a reset signal is produced by the pushbutton logic, thereby clearing the reset counter. Once the button is released, the reset counter begins counting the reset period (200ms nominal). Consequently, the reset outputs remain asserted for approximately 200ms after the button is released.
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Pushbutton Reset Function Timing
tPB
tRST
1326 TD02
LTC1326-2.5
APPLICATIONS INFORMATION
During a supply induced reset condition, the ability of the PBR pin to force a soft reset condition on the SRST pin is disabled. In other words SRST will remain high. If the PBR pin is held low, both during and after a supply induced reset (low RST), the RST pin will remain low until 200ms after the PBR goes high. 3V or 2.5V Power Detect/Gate Drive The LTC1326-2.5 for the most part is powered internally from the VCC3 pin. The exception is at the gate drive of the output FET on the RST pin. On the input to this FET is power detection circuitry used to detect and drive the gate from either the 3.3V input pin (VCC3) or the 2.5V input pin (VCC25). The gate drive is derived from the pin with the highest potential. This ensures the part pulls the RST pin low as soon as either input pin is 1V. Dual and Single Supply Monitor Operation The VCC3, VCC25 and VCCA inputs may be individually disabled by the following techniques which allows the LTC1326-2.5 to be used as a dual or single supply monitor. The VCCA pin, if unused, can be tied to either VCC3 or VCC25. This is an obvious solution since the trip points for VCC3 and VCC25 will always be greater than the trip point for VCCA. Likewise, the VCC25, if unused, can be tied to VCC3. VCC3 must always be used. Tying VCC3 to VCC25 and operating off of a 2.5V supply will result in the continuous assertion of RST. Extending ESD Tolerance on the PBR Input Pin The PBR pin is susceptible to ESD since it can be brought out to a front panel in normal applications. The ESD tolerance of this pin can be increased by adding a resistor in series with the PBR pin. A 10k resistor can increase the ESD tolerance of the PBR pin to approximately 10kV. The PBR's internal pull-up current of 7A typical means there is only 70mV (150mV max) dropped across the resistor.
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LTC1326-2.5
TYPICAL APPLICATIONS N
ADJUSTABLE SUPPLY OR DC/DC FEEDBACK DIVIDER
*OPTIONAL RESISTOR EXTENDS ESD TOLERANCE OF PBR INPUT TO APPROXIMATELY 10kV
1326-2.5 TA03
ADJUSTABLE SUPPLY
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Triple Supply Monitor (3.3V, 2.5V and Adjustable)
PUSHBUTTON RESET
LTC1326-2.5 3.3V R1 2.5V 1 2 3 R2 4 VCC3 VCC25 VCCA GND PBR SRST RST RST 8 7 6 5 10k*
SYSTEM RESET
Dual Supply Monitor (3.3V and 2.5V, Defeat VCCA Input)
LTC1326-2.5 3.3V 2.5V 1 2 3 4 VCC3 VCC25 VCCA GND PBR SRST RST RST 8 7 6 5
1326-2.5 TA04
SYSTEM RESET
Dual Supply Monitor (3.3V plus Adj)
LTC1326-2.5 3.3V R1 R2 1 2 3 4 VCC3 VCC25 VCCA GND PBR SRST RST RST 8 7 6 5 4.7k
SYSTEM RESET
1326-2.5 F01
LTC1326-2.5
TYPICAL APPLICATIONS N
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SRST Tied to RST and OR-Tying Other Sources to RST to Generate Reset and Reset
PUSHBUTTON 8 3.3V 4.7k SRST 7 RESET
LTC1326-2.5
PBR
6A
6A RST 6 VCC3 RST 5 RESET OTHER OPEN DRAIN RESET SOURCES OR-TIED TO RESET
1326-2.5 TA05
Using VCCA Tied to DC/DC Feedback Divider
2.9V LTC1435 VOSENSE 6 35.7k 1% 3.3V 2.8k 2.5V 1% 22.1k 1% LTC1326-2.5 1 2 3 4 VCC3 VCC25 VCCA GND PBR SRST RST RST 8 7 6 5 SYSTEM RESET
ADJUSTABLE RESET TRIP THRESHOLD 2.74V
1326-2.5 TA06
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LTC1326-2.5
TYPICAL APPLICATIONS N
Using the Short Pulse Width, Pushbutton Soft Reset Feature to Initiate Hard Reset
LTC1326-2.5 3.3V 2.5V 1 2 3 4 VCC3 VCC25 VCCA GND PBR SRST RST RST 8 7 6 5 RESET 40ns tP 10s
ADJUSTABLE SUPPLY
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PBR 20ms RST 200ms
1326-2.5 TA07
Monitoring a Negative Supply
3.3V
LTC1326-2.5 1 2.5V 2 3 4 VCC3 VCC25 VCCA GND PBR SRST RST RST 8 7 6 5 SYSTEM RESET
R1
R2 VTRIP
R2 1 - VTRIP , VTRIP < 0V = R1 3.3 - 1
1326-2.5 TA09
Reset Valid for VCC3 Down to 0V
LTC1326-2.5 3.3V R1 2.5V 1 2 3 R2 4 VCC3 VCC25 VCCA GND PBR SRST RST RST 8 7 6 5 SYSTEM RESET 100k
1326-2.5 TA10
LTC1326-2.5
PACKAGE DESCRIPTION U
Dimensions in inches (millimeters) unless otherwise noted. MS8 Package 8-Lead Plastic MSOP
(LTC DWG # 05-08-1660)
0.118 0.004* (3.00 0.102) 8 76 5
0.192 0.004 (4.88 0.10)
0.118 0.004** (3.00 0.102)
1 0.040 0.006 (1.02 0.15) 0.007 (0.18) 0.021 0.006 (0.53 0.015) 0 - 6 TYP SEATING PLANE 0.012 (0.30) 0.0256 REF (0.65) TYP
23
4 0.034 0.004 (0.86 0.102)
0.006 0.004 (0.15 0.102)
MSOP (MS8) 1197
* DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE ** DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
S8 Package 8-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
0.189 - 0.197* (4.801 - 5.004) 8 7 6 5
0.228 - 0.244 (5.791 - 6.197)
0.150 - 0.157** (3.810 - 3.988)
1 0.010 - 0.020 x 45 (0.254 - 0.508) 0.008 - 0.010 (0.203 - 0.254) 0- 8 TYP 0.053 - 0.069 (1.346 - 1.752)
2
3
4
0.004 - 0.010 (0.101 - 0.254)
0.016 - 0.050 0.406 - 1.270
0.014 - 0.019 (0.355 - 0.483)
0.050 (1.270) TYP
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE **DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
SO8 0996
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LTC1326-2.5
TYPICAL APPLICATION
Triple Supply Monitor with Both 3.3V and 2.5V System Reset Outputs
3.3V 2.5V LTC1326-2.5 1 2 ADJUSTABLE SUPPLY OR DC/DC FEEDBACK DIVIDER R1 R2 3 4 VCC3 VCC25 VCCA GND PBR SRST RST RST 8 7 6 5 10k 10k TO 3.3V SYSTEM RESET TO 2.5V SYSTEM RESET 2N7002
1326-2.5 TA08
RELATED PARTS
PART NUMBER LTC690 LTC694-3.3 LTC699 LTC1232 LTC1326 LTC1536 DESCRIPTION 5V Supply Monitor, Watchdog Timer and Battery Backup 3.3V Supply Monitor, Watchdog Timer and Battery Backup 5V Supply Monitor and Watchdog Timer 5V Supply Monitor, Watchdog Timer and Pushbutton Reset Micropower Precision Triple Supply Monitor Precision Triple Supply Monitor for PCI Applications COMMENTS 4.65V Threshold 2.9V Threshold 4.65V Threshold 4.37V/4.62V Threshold 4.725V, 3.118V, 1V Thresholds (0.75%) Meets PCI tFAIL Timing Specifications
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Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408)432-1900 q FAX: (408) 434-0507 q www.linear-tech.com
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132625I LT/TP 0698 4K * PRINTED IN THE USA
(c) LINEAR TECHNOLOGY CORPORATION 1998

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