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2N7002 150A6A PR2004G 05CM100 DS3100GN 2SC2834 N5231 895060
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 PD - 94060
Ignition IGBT
Die in Wafer Form IGBT with on-chip Gate-Emitter and Gate-Collector clamps
Features *Most Rugged in Industry *Logic-Level Gate Drive *> 6KV ESD Gate Protection *Low Saturation Voltage *High Self-clamped Inductive Switching Energy *Qualified for the Automotive Qualified [Q101] . Description
The advanced IGBT process family includes a MOS gated, N-channel logic level device which is intended for coil-on-plug automotive ignition applications and small-engine ignition circuits. Unique features include on-chip active voltage clamps between the Gate-Emitter and Gate-Collector which provide over voltage protection capability in ignition circuits.
IRGC14C40LB IRGC14C40LC IRGC14C40LD
NOTES: 1) Part number IRGC14C40LB are die in wafer form probed and uncut; IRGC14C40LC are die on film probed and cut; and IRGC14C40LD are probed die in wafle pack. 2) Reference packaged parts are IRGS14C40L, IRGSL14C40L, and IRGB14C40L.
TERMINAL DIAGRAM
C o ll ec to r
Packaged Characteristics:
G a te
R1 R2
*BVCES = 370V min, 430V max *IC @ TC = 110C = 14A *VCE(on) typ= 1.2V @7A @25C *IL(min)=11.5A @25C,L=4.7mH
E m it te r
Electrical Characteristics (Wafer Form)
Parameter VCE (on) BVCES VGE(th) ICES IGES TJ TSTG Description Collector-to-Emitter Saturation Voltage Colletor-to-Emitter Breakdown Voltage Gate Threshold Voltage Zero Gate Voltage Collector Current Gate-to-Emitter Leakage Current Operating Junction and Storage Temperature Range Guaranteed (min, max) 2.65V max 370V min, 430V max 1.2V min, 2.4V max 10A max 0.32mA min, 1mA max Test Conditions @ TJ = 25C IC = 10A, VGE = 4.5V RG = 1K ohm, ICES = 25mA, VGE = 0V VGE = VCE , IC = 1mA RG = 1K ohm, VCE = 300V VGE = +/-10V
-40C to 175C
Mechanical Data
Nominal Backmetal Composition, (Thickness) Nominal Front Metal Composition, (Thickness) Dimensions Wafer Diameter Wafer Thickness, Tolerance Relevant Die Mechanical Dwg. Number Minimum Street Width Reject Ink Dot Size Ink Dot Location Recommended Storage Environment Recommended Die Attach Conditions Cr - Ni/V - Ag, (0.1m - 0.2m - 0.25m) 99% Al/1% Si, (4m) 0.141" x 0.164" 150mm, with std. < 100 > flat .015" +/- .003" 01-5467 100m 0.25mm diameter minimum Consistent throughout same wafer lot Store in original container, in dessicated nitrogen, with no contamination For optimum electrical results, die attach temperature should not exceed 300C
NOT ES :
Die Outline
3.581 [.141] 0.943 [.037]
E
1. ALL DIMENS IONS ARE S HOWN IN MILLIMET ERS [INCHES ]. 2. CONTROLLING DIMENS ION: [INCH]. 3. LET TER DES IGNAT ION:
0.932 [.037]
S = S OURCE G = GAT E
S K = S OURCE KELVIN IS = CURRENT S ENS E
E = EMIT T ER
4. DIMENS IONAL T OLERANCES : BONDING PADS : WIDT H & LENGT H < 0.635 T OLERANCE = + /- 0.013 < [.0250] T OLERANCE = + /- [.0005] > 0.635 T OLERANCE = + /- 0.025 > [.0250] T OLERANCE = + /- [.0010] < 1.270 T OLERANCE = + /- 0.102 < [.050] T OLERANCE = + /- [.004] > 1.270 T OLERANCE = + /- 0.203 > [.050] T OLERANCE = + /- [.008]
4.166 [.164]
G
OVERALL DIE: WIDT H & LENGT H
0.562 [.022] 0.762 [.030]
www.irf.com
12/19/00


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