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| PMC-Sierra,Inc. Released * Supports 128 internal multicast groups, expandable to 256 K with external SRAM. * Provides 64 internal cell buffers for multicast cells. PM73488 QSE * Provides a demultiplexed address/data CPU interface. * Provides an IEEE 1149.1 (JTAG) boundary scan test bus. 5 Gbit/s ATM Switch Fabric Element FEATURES SWITCHING ALGORITHM * Supports blocking resolution in the switch fabric. * Guarantees a lower bound on switch performance using a patented randomization algorithm called Evil Twin SwitchingTM. * Determines routes using specified bits in the header (self-routing switch fabric) for unicast traffic. * Determines output groupings using a lookup table for multicast traffic. * Allows output ports to be combined in groups of 1, 2, 4, 8, 16, or 32 for unicast traffic. * Allows output ports to be combined in groups of 1, 2, or 4 for multicast traffic. PHYSICAL CHARACTERISTICS * 3.3 V supply voltage. * 5 V tolerant inputs. * 596-pin Enhanced Plastic Ball Grid Array (EPBGA) package. * Operates from a single 66 MHz clock. DIAGNOSTIC/ROBUSTNESS FEATURES * Checks the header parity. * Counts tagged cells. * Checks for connectivity and stuck-at faults on all switch fabric interconnects. I/O FEATURES * Provides 32 switch fabric interfaces with integrated phase aligner clock recovery circuitry. * Provides a Start-Of-Cell (SOC) output per four switch element interfaces. * Provides an external 16-bit Synchronous SRAM (SSRAM) interface for multicast group expansion. APPLICATIONS * A 5 Gbit/s Switch * A 10 Gbit/s Switch * A 5 Gbit/s-to-20 Gbit/s Scalable Switch Architecture * A 2.4 Gbit/s-to-80 Gbit/s Scalable Switch Architecture * A 5 Gbit/s-to-320 Gbit/s Scalable Switch Architecture MULTICAST SUPPORT * Supports optimal tree-based multicast replication in the switch fabric. BLOCK DIAGRAM Backpressure/Ack Flow External SSRAM To QRT/QSE Phase Aligners and Receive SE_D_IN and SE_SOC_IN Multicast Path Data Drivers To QRT/QSE BP/ACK to QRT/QSE BP_ACK Drivers Arbiter Phase Aligners and Receive BP_ACK_IN BP/ACK from QRT/QSE Microprocessor Interface Unicast Routing and Distribution Path JTAG PMC-1980617 (R3) (c) 2001PMC-Sierra, Inc. PM73488 QSE 5 Gbit/s ATM Switch Fabric Element TYPICAL APPLICATIONS 5 Gbit/s ATM SWITCH USING 8 QRTs AND 1 QSE 622 Mbit/s Aggregate PM73487 #1 QRTTM Receive Input Receive UTOPIA Level 2 622 Mbit/s Aggregate PM73487 #8 QRTTM Receive Input x4 PM73487 #1 QRTTM x4 x4 622 Mbit/s Aggregate Transmit Output Transmit UTOPIA Level 2 PM73487 #8 QRTTM Transmit Output 622 Mbit/s Aggregate PM73488 QSETM x4 10 Gbit/s ATM SWITCH USING 16 QRTs AND 2 QSEs 622 Mbit/s Aggregate PM73487 #1 QRTTM Receive Input Receive UTOPIA Level 2 622 Mbit/s Aggregate PM73487 #16 QRTTM Receive Input x2 x2 x2 x2 x2 x2 PM73487 #1 QRTTM Transmit Output 622 Mbit/s Aggregate PM73488 QSETM x2 x2 Transmit UTOPIA Level 2 PM73487 #16 QRTTM Transmit Output 622 Mbit/s Aggregate 64 x 64 SWITCH APPLICATION (10 Gbit/s) 622 Mbit/s Aggregate Receive UTOPIA Level 2 622 Mbit/s Aggregate PM73487 #1 QRTTM Receive Input x 4 x 4 PM73487 #1 QRTTM Transmit Output 622 Mbit/s Aggregate Transmit UTOPIA Level 2 PM73487 #8 QRTTM Receive Input PM73488 QSETM x 16 PM73488 QSETM x 16 PM73488 PM73487 #8 QRTTM Transmit Output QSETM 622 Mbit/s Aggregate 622 Mbit/s Aggregate PM73487 #9 QRTTM Receive Input PM73488 QSETM Receive UTOPIA Level 2 622 Mbit/s Aggregate PM73487 #16 QRTTM Receive Input x 16 PM73488 QSETM x 16 PM73488 PM73487 #9 QRTTM Transmit Output 622 Mbit/s Aggregate QSETM Transmit UTOPIA Level 2 622 Mbit/s Aggregate x4 x 4 PM73487 #16 QRTTM Transmit Output PMC-Sierra, Inc. 8555 Baxter Place Burnaby, B.C. V5A 4V7 Canada Tel: 604.415.6000 Fax: 604.415.6200 To order documentation, send email to: document@pmc-sierra.com or contact the head office, Attn: Document Coordinator All product documentation is available on our web site at: http://www.pmc-sierra.com For corporate information, send email to: info@pmc-sierra.com PMC-1980617 (R3) (c) 2001 PMC-Sierra, Inc. Evil Twin Switching, QRT, and QSE are trademarks of PMC-Sierra, Inc. U.S. Patents pending |
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