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HT27LC020 OTP CMOS 256Kx8-Bit EPROM Features * * * * * * * Operating voltage: +3.3V Programming voltage - VPP=12.5V0.2V - VCC=6.0V0.2V High-reliability CMOS technology Latch-up immunity to 100mA from -1.0V to VCC+1.0V CMOS and TTL compatible I/O Low power consumption - Active: 15mA max. - Standby: 1A typ. 256Kx8-bit organization * * * * * * * * Fast read access time: -120ns Fast programming algorithm Programming time 75s typ. Commercial and industrial temperature range Two line controls (OE and CE) Standard product identification code Package type - 32-pin DIP/SOP - 32-pin PLCC Commercial temperature ranges (0C to +70C) General Description The HT27LC020 chip family is a low-power, 2048K (2,097,152) bit, +3.3V electrically onetime programmable (OTP) read-only memories (EPROM). Organized into 256K words with 8 bits per word, it features a fast single address location programming, typically at 75s per byte. Any byte can be accessed in less than 120ns with respect to Spec. This eliminates the need for WAIT states in high-performance microprocessor systems. The HT27LC020 has separate Output Enable (OE) and Chip Enable (CE) controls which eliminate bus contention issues. Block Diagram 1 7th May '99 HT27LC020 Pin Assignment Pin Description Pin Name A0~A17 DQ0~DQ7 CE OE PGM NC VPP I/O/C/P I I/O C C C -- P Address inputs Data inputs/outputs Chip enable Output enable Program strobe No connection Program voltage supply Description 2 7th May '99 HT27LC020 Absolute Maximum Rating Operation Temperature Commercial ................................................................................... 0C to +70C Storage Temperature......................................................................................................... -65C to 125C Applied VCC Voltage with Respect to GND....................................................................... -0.6V to 7.0V Applied Voltage on Input Pin with Respect to GND ......................................................... -0.6V to 7.0V Applied Voltage on Output Pin with Respect to GND ............................................. -0.6V to VCC+0.5V Applied Voltage on A9 Pin with Respect to GND ............................................................ -0.6V to 13.5V Applied VPP Voltage with Respect to GND ...................................................................... -0.6V to 13.5V Applied READ Voltage (Functionality is guaranteed between these limits) .................+3.0V to +3.6V Note: These are stress ratings only. Stresses exceeding the range specified under "Absolute Maximum Ratings" may cause substantial damage to the device. Functional operation of this device at other conditions beyond those listed in the specification is not implied and prolonged exposure to extreme conditions may affect device reliability. D.C. Characteristics Read operation Symbol VOH VOL VIH VIL ILI ILO ICC ISB1 ISB2 IPP Parameter Output High Level Output Low Level Input High Level Input Low Level Input Leakage Current Output Leakage Current VCC Active Current Standby Current (CMOS) Standby Current (TTL) Test Conditions VCC Conditions 3.3V IOH=-0.4mA 3.3V IOL=2.0mA 3.3V 3.3V -- -- Min. Typ. 2.4 -- 2.0 -0.3 -5 -10 -- -- -- -- -- -- -- -- -- -- -- -- -- -- Max. -- 0.45 VCC+0.5 0.8 5 10 15 10 0.6 100 Unit V V V V A A 3.3V VIN=0 to 3.6V 3.3V VOUT=0 to 3.6V 3.3V CE=VIL, f=5MHz, IOUT=0mA mA A 3.3V CE=VCC0.3V 3.3V CE=VIH mA A VPP Read/Standby Current 3.3V CE=OE=VIL, VPP=VCC 3 7th May '99 HT27LC020 Programming operation Symbol VOH VOL VIH VIL ILI VH ICC IPP Parameter Output High Level Output Low Level Input High Level Input Low Level Input Load Current A9 Product ID Voltage VCC Supply Current VPP Supply Current 6V 6V 6V 6V 6V 6V 6V 6V Test Conditions VCC Conditions IOH=-0.4mA IOL=2.0mA -- -- VIN=VIL, VIH -- -- CE=VIL Min. 2.4 -- 0.7VCC -0.5 -- 11.5 -- -- Typ. -- -- -- -- -- -- -- -- Max. -- 0.45 VCC+0.5 0.8 5.0 12.5 40 10 Unit V V V V A V mA mA Capacitance Symbol CIN COUT CVPP Parameter VCC Input Capacitance Output Capacitance VPP Capacitance 3.3V 3.3V 3.3V Test Conditions Conditions VIN=0V VOUT=0V VPP=0V Min. Typ. Max. Unit -- -- -- 8 8 18 12 12 25 pF pF pF A.C. Characteristics Read operation Symbol tACC tCE tOE tDF tOH Parameter Address to Output Delay Chip Enable to Output Delay Output Enable to Output Delay CE or OE High to Output Float, Whichever Occurred First Test Conditions VCC 3.3V 3.3V 3.3V 3.3V -120 Min. -- -- -- -- 0 Unit 120 120 45 40 -- ns ns ns ns ns Conditions CE=OE=VIL OE=VIL CE=VIL -- -- Max. Output Hold from Address, CE or 3.3V OE, Whichever Occurred First 4 7th May '99 HT27LC020 Programming operation Ta=+25C5C Symbol tAS tOES tDS tAH tDH tDFP tVPS tPW tVCS tCES tOE tPRT Parameter Address Setup Time OE Setup Time Data Setup Time Address Hold Time Data Hold Time Output Enable to Output Float Delay VPP Setup Time PGM Program Pulse Width VCC Setup Time CE Setup Time Data Valid from OE VPP Pulse Rise Time During Programming Test Conditions VCC 6V 6V 6V 6V 6V 6V 6V 6V 6V 6V 6V 6V Min. Typ. Max. Unit 2 2 2 0 2 0 2 30 2 2 -- 2 -- -- -- -- -- -- -- 75 -- -- -- -- -- -- -- -- -- 130 -- 105 -- -- 150 -- s s s s s Conditions -- -- -- -- -- -- -- -- -- -- -- -- ns s s s ns s s Test waveforms and measurements tR, tF< 20ns (10% to 90%) Output test load Note: CL=100pF including jig capacitance. 5 7th May '99 HT27LC020 Product Identification Code Code A0 Manufacturer Device Type Continuation 0 1 0 1 Pins A1 1 1 0 0 DQ7 0 0 0 0 DQ6 0 0 1 1 DQ5 0 0 1 1 DQ4 1 0 1 1 DQ3 1 0 1 1 DQ2 1 0 1 1 DQ1 0 1 1 1 DQ0 0 0 1 1 Hex Data 1C 02 7F 7F Functional Description Operation mode All the operation modes are shown in the table following. Mode Read Output Disable Standby (TTL) Standby (CMOS) Program Program Verify Product Inhibit Manufacturer Code (3) Device Code (3) Notes: (1) VH = 12.0V 0.5V CE VIL VIL VIH VCC 0.3V VIL VIL VIH VIL VIL OE VIL VIH X X VIH VIL X VIL VIL PGM X (2) X X X VIL VIH X X X A0 X X X X X X X VIL VIH A1 X X X X X X X VIH VIH A9 X X X X X X X VH (1) VH (1) VPP VCC VCC VCC VCC VPP VPP VPP VCC VCC Output Dout High Z High Z High Z DIN DOUT High Z 1C 02 (2) X=Either VIH or VIL (3) For Manufacturer Code and Device Code, A1=VIH, When A1=VIL, both codes will read 7F 6 7th May '99 HT27LC020 Programming of the HT27LC020 Program verify mode When the HT27LC020 is delivered, the chip has all 2048K bits in the "ONE", or HIGH state. "ZEROs" are loaded into the HT27LC020 through programming. The programming mode is entered when 12.50.2V is applied to the VPP pin, OE is at VIH, and CE and PGM are VIL. For programming, the data to be programmed is applied with 8 bits in parallel to the data pins. The programming flowchart in Figure 3 shows the fast interactive programming algorithm. The interactive algorithm reduces programming time by using 30s to 105s programming pulses and giving each address only as many pulses as is necessary in order to reliably program the data. After each pulse is applied to a given address, the data in that address is verified. If the data is not verified, additional pulses are given until it is verified or until the maximum number of pulses is reached while sequencing through each address of the HT27LC020. This process is repeated while sequencing through each address of the HT27LC020. This part of the programming algorithm is done at VCC=6.0V to assure that each EPROM bit is programmed to a sufficiently high threshold voltage. This ensures that all bits have sufficient margin. After the final address is completed, the entire EPROM memory is read at VCC=VPP=5.250.25V to verify the entire memory. Program inhibit mode Verification should be performed on the programmed bits to determine whether they were correctly programmed. The verification should be performed with OE and CE at VIL, PGM at VIH, and VPP at its programming voltage. Auto product identification The Auto Product Identification mode allows the reading out of a binary code from an EPROM that will identify its manufacturer and the type. This mode is intended for programming to automatically match the device to be programmed with its corresponding programming algorithm. This mode is functional in the 25C5C ambient temperature range that is required when programming the HT27LC020. To activate this mode, the programming equipment must force 12.00.5V on the address line A9 of the HT27LC020. Two identifier bytes may then be sequenced from the device outputs by toggling address line A0 from VIL to VIH, when A1=VIH. All other address lines must be held at VIH during Auto Product Identification mode. Byte 0 (A0=VIL) represents the manufacturer code, and byte 1 (A0=VIH), the device code. For HT27LC020, these two identifier bytes are given in the Mode Select Table. All identifiers for the manufacturer and device codes will possess odd parity, with the MSB (DQ7) defined as the parity bit. When A1=VIL, the HT27LC020 will read out the binary code of 7F, continuation code, to signify the unavailability of manufacturer ID codes. Read mode Programming of multiple HT27LC020 in parallel with different data is also easily accomplished by using the Program Inhibit Mode. Except for CE, all like inputs of the parallel HT27LC020 may be common. A TTL low-level program pulse applied to an HT27LC020 CE input with Vpp=12.50.2V, PGM LOW, and OE HIGH will program that HT27LC020. A high-level CE input inhibits the HT27LC020 from being programmed. The HT27LC020 has two control functions, both of which must be logically satisfied in order to obtain data at outputs. Chip Enable (CE) is the power control and should be used for device selection. Output Enable (OE) is the output control and should be used to gate data to the output pins, independent of device selection. Assuming that addresses are stable, address access time (tACC) is equal to the delay from CE to output (tCE). Data is available at the outputs (tOE) after the falling edge of OE, assuming the CE has been LOW and addresses have been stable for at least tACC-tOE. 7 7th May '99 HT27LC020 Standby mode System considerations The HT27LC020 has CMOS standby mode which reduces the maximum VCC current to 10A. It is placed in CMOS standby when CE is at VCC0.3V. The HT27LC020 also has a TTLstandby mode which reduces the maximum VCC current to 0.6mA. It is placed in TTLstandby when CE is at VIH. When in standby mode, the outputs are in a high-impedance state, independent of the OE input. Two-line output control function To accommodate multiple memory connections, a two-line control function is provided to allow for: * Low memory power dissipation * Assurance that output bus contention will not During the switch between active and standby conditions, transient current peaks are produced on the rising and falling edges of Chip Enable. The magnitude of these transient current peaks is dependent on the output capacitance loading of the device. At a minimum, a 0.1F ceramic capacitor (high frequency, low inherent inductance) should be used on each device between VCC and VPP to minimize transient effects. In addition, to overcome the voltage drop caused by the inductive effects of the printed circuit board traces on EPROM arrays, a 4.7F bulk electrolytic capacitor should be used between VCC and VPP for each eight devices. The location of the capacitor should be close to where the power supply is connected to the array. occur It is recommended that CE be decoded and used as the primary device-selection function, while OE be made a common connection to the READ line from the system control bus. This assures that all deselected memory devices are in their low-power standby mode and that the output pins are only active when data is desired from a particular memory device. 8 7th May '99 HT27LC020 Figure 1. A.C. waveforms for read operation Figure 2. Programming waveforms 9 7th May '99 HT27LC020 Figure 3. Fast programming flowchart 10 7th May '99 HT27LC020 Holtek Semiconductor Inc. (Headquarters) No.3 Creation Rd. II, Science-based Industrial Park, Hsinchu, Taiwan, R.O.C. Tel: 886-3-563-1999 Fax: 886-3-563-1189 Holtek Semiconductor Inc. (Taipei Office) 5F, No.576, Sec.7 Chung Hsiao E. Rd., Taipei, Taiwan, R.O.C. Tel: 886-2-2782-9635 Fax: 886-2-2782-9636 Fax: 886-2-2782-7128 (International sales hotline) Holtek Microelectronics Enterprises Ltd. RM.711, Tower 2, Cheung Sha Wan Plaza, 833 Cheung Sha Wan Rd., Kowloon, Hong Kong Tel: 852-2-745-8288 Fax: 852-2-742-8657 Copyright (c) 1999 by HOLTEK SEMICONDUCTOR INC. The information appearing in this Data Sheet is believed to be accurate at the time of publication. However, Holtek assumes no responsibility arising from the use of the specifications described. The applications mentioned herein are used solely for the purpose of illustration and Holtek makes no warranty or representation that such applications will be suitable without further modification, nor recommends the use of its products for application that may present a risk to human life due to malfunction or otherwise. Holtek reserves the right to alter its products without prior notification. For the most up-to-date information, please visit our web site at http://www.holtek.com.tw. 11 7th May '99 |
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