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| 2N6756 Data Sheet December 2001 14A, 100V, 0.180 Ohm, N-Channel Power MOSFET The 2N6756 is an N-Channel enhancement mode silicon gate power field effect transistor designed for applications such as switching regulators, switching convertors, motor drivers, relay drivers, and drivers for high power bipolar switching transistors requiring high speed and low gate drive power. These types can be operated directly from integrated circuits. Features * 14A, 100V * rDS(ON) = 0.180 * SOA is Power Dissipation Limited * Nanosecond Switching Speeds * Linear Transfer Characteristics * High Input Impedance * Majority Carrier Device Ordering Information PART NUMBER 2N6756 PACKAGE TO-204AA BRAND 2N6756 * Related Literature - TB334 "Guidelines for Soldering Surface Mount Components to PC Boards" NOTE: When ordering, use the entire part number. Symbol D G S Packaging JEDEC TO-204AA DRAIN (FLANGE) SOURCE (PIN 2) GATE (PIN 1) (c)2001 Fairchild Semiconductor Corporation 2N6756 Rev. B 2N6756 Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified 2N6756 Drain to Source Breakdown Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDS Drain to Gate Voltage (RGS = 20k) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID TC = 100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS Maximum Power Dissipation (Figure 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD TC = 100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD Linear Derating Factor (Figure 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG Maximum Temperature for Soldering Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg 100 100 14 9.0 30 20 75 30 0.6 -55 to 150 300 260 UNITS V V A A A V W W W/oC oC oC oC CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. TJ = 25oC to 125oC. Electrical Specifications PARAMETER TC = 25oC, Unless Otherwise Specified SYMBOL BVDSS VGS(TH) IDSS TEST CONDITIONS ID = 1.0mA, VGS = 0V VGS = VDS, ID = 1mA VDS = Max Rating, VGS = 0V VDS = Max Rating, VGS = 0V, TC = 125oC MIN 100 2 VGS = 20V ID = 9A, VGS = 10V ID = 9A, VGS = 10V, TC = 125oC 4.0 VDS = 25V, VGS = 0V, f = 1MHz (Figure 7) 350 150 50 Free Air Operation TYP 0.1 0.2 0.14 5.5 600 300 100 MAX 4 1.0 4.0 2.52 100 0.18 0.33 12.0 30 75 40 45 800 500 150 1.67 30 UNITS V V mA mA V nA S ns ns ns ns pF pF pF oC/W oC/W Drain to Source Breakdown Voltage Gate Threshold Voltage (Note 2) Zero Gate Voltage Drain Current (Note 2) On-State Drain Voltage (Note 2) Gate to Source Leakage Current (Note 2) Drain to Source On Resistance (Note 2) VDS(ON) IGSS rDS(ON) Forward Transconductance (Note 2) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Thermal Resistance Junction-to-Case Thermal Resistance Junction-to-Ambient gfs td(ON) tr td(OFF) tf CISS COSS CRSS RJC RJA VDS = 15V, ID = 9A VDD 36V, ID = 9A, ZO = 15 (Figures 12, 13) MOSFET Switching Times are Essentially Independent of Operating Temperature (c)2001 Fairchild Semiconductor Corporation 2N6756 Rev. B 2N6756 Source to Drain Diode Specifications PARAMETER Continuous Source Current (Body Diode) Pulse Source Current (Body Diode) SYMBOL ISD ISM TEST CONDITIONS Modified MOSFET Symbol Showing the Integral Reverse P-N Junction Rectifier MIN D TYP - MAX 14 30 UNITS A A - G S Source to Drain Diode Voltage (Note 2) Reverse Recovery Time Reverse Recovery Charge NOTES: VSD trr QRR TC = 25oC, ISD = 14A, VGS = 0V TJ = 150oC, ISD = ISM, dISD/dt = 100A/s TJ = 150oC, ISD = ISM, dISD/dt = 100A/s 0.90 - 300 4.0 1.8 - V ns C 2. Pulse test: pulse width 300s, duty cycle 2%. 3. Repetitive rating: pulse width limited by maximum junction temperature. Typical Performance Curves 1.2 POWER DISSIPATION MULTIPLIER 1.0 0.8 Unless Otherwise Specified 50 10s ID, DRAIN CURRENT (A) 20 10 5.0 1ms 2.0 1.0 DC 0.5 5.0 10 20 50 100 200 VDS, DRAIN TO SOURCE VOLTAGE (A) TJ = MAX RATED SINGLE PULSE 10ms 100s 0.6 0.4 0.2 0 0 25 125 50 75 100 TA , AMBIENT TEMPERATURE (oC) 150 FIGURE 1. NORMALIZED POWER DISSIPATION vs AMBIENT TEMPERATURE FIGURE 2. FORWARD BIAS SAFE OPERATING AREA 20 VGS = 8V VGS = 10V VGS = 7V 80s PULSE TEST 10 80s PULSE TEST ID, DRAIN CURRENT (A) ID, DRAIN CURRENT (A) 16 8 10V 9V 8V 7V 6V 12 VGS = 6V 6 8 VGS = 5V 4 VGS = 4V 0 0 30 40 10 20 VDS, DRAIN TO SOURCE VOLTAGE (V) 50 4 5V 2 VGS = 4V 0 0 1.2 1.6 0.4 0.8 VDS, DRAIN TO SOURCE VOLTAGE (V) 2.0 FIGURE 3. OUTPUT CHARACTERISTICS FIGURE 4. SATURATION CHARACTERISTICS (c)2001 Fairchild Semiconductor Corporation 2N6756 Rev. B 2N6756 Typical Performance Curves 20 Unless Otherwise Specified (Continued) ID, DRAIN CURRENT (A) 16 NORMALIZED ON RESISTANCE 80s PULSE TEST VDS = 15V VGS = 10V 2.2 ID = 9A 1.8 12 1.4 8 TJ = 125oC TJ = 25oC TJ = -55oC 1.0 4 0.6 0 0.2 0 6 8 2 4 VGS, GATE TO SOURCE VOLTAGE (V) 10 -40 0 40 80 120 TJ, JUNCTION TEMPERATURE (oC) 160 FIGURE 5. TRANSFER CHARACTERISTICS FIGURE 6. NORMALIZED DRAIN TO SOURCE ON RESISTANCE vs JUNCTION TEMPERATURE 2000 10 gfs, TRANSCONDUCTANCE (S) VGS = 0 f = 1MHz VDS = 15V 80s PULSE TEST TJ = -55oC 1600 C, CAPACITANCE (pF) 8 6 TJ = 25oC 4 TJ = 125oC 1200 CISS 800 COSS CRSS 0 400 2 0 0 10 20 30 40 50 VDS, DRAIN TO SOURCE VOLTAGE (V) 0 5 10 15 ID, DRAIN CURRENT (A) 20 25 FIGURE 7. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE FIGURE 8. TRANSCONDUCTANCE vs DRAIN CURRENT 2 IS, SOURCE CURRENT (A) IS, 2N6756 10 ISM, 2N6756 5 TJ = 150oC 2 TJ = 25oC 1.0 0 1 TC, CASE TEMPERATURE (oC) 2 FIGURE 9. SOURCE TO DRAIN DIODE VOLTAGE (c)2001 Fairchild Semiconductor Corporation 2N6756 Rev. B 2N6756 Test Circuits and Waveforms VDS BVDSS L VARY tP TO OBTAIN REQUIRED PEAK IAS VGS DUT tP RG IAS VDD tP VDS VDD + 0V IAS 0.01 0 tAV FIGURE 10. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 11. UNCLAMPED ENERGY WAVEFORMS tON td(ON) tr RL VDS 90% tOFF td(OFF) tf 90% + RG DUT - VDD 0 10% 90% 10% VGS VGS 0 10% 50% PULSE WIDTH 50% FIGURE 12. SWITCHING TIME TEST CIRCUIT FIGURE 13. RESISTIVE SWITCHING WAVEFORMS (c)2001 Fairchild Semiconductor Corporation 2N6756 Rev. B TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACExTM BottomlessTM CoolFETTM CROSSVOLTTM DenseTrenchTM DOMETM EcoSPARKTM E2CMOSTM EnSignaTM FACTTM FACT Quiet SeriesTM DISCLAIMER FAST (R) FASTrTM FRFETTM GlobalOptoisolatorTM GTOTM HiSeCTM ISOPLANARTM LittleFETTM MicroFETTM MicroPakTM MICROWIRETM OPTOLOGICTM OPTOPLANARTM PACMANTM POPTM Power247TM PowerTrench (R) QFETTM QSTM QT OptoelectronicsTM Quiet SeriesTM SILENT SWITCHER (R) SMART STARTTM STAR*POWERTM StealthTM SuperSOTTM-3 SuperSOTTM-6 SuperSOTTM-8 SyncFETTM TinyLogicTM TruTranslationTM UHCTM UltraFET (R) VCXTM STAR*POWER is used under license FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or 2. A critical component is any component of a life systems which, (a) are intended for surgical implant into support device or system whose failure to perform can the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life failure to perform when properly used in accordance support device or system, or to affect its safety or with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Preliminary First Production No Identification Needed Full Production Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. H4 |
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