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2SK2978
Silicon N Channel MOS FET High Speed Power Switching
ADE-208-659B (Z) 3rd. Edition June 1, 1998 Features
* Low on-resistance R DS(on) = 0.09 typ. (VGS = 4 V, I D = 1.5 A) * Low drive current * High speed switching * 2.5V gate drive devices.
Outline
UPAK
3
D
2
1
4
G
1. Gate 2. Drain 3. Source 4. Drain
S
2SK2978
Absolute Maximum Ratings (Ta = 25C)
Item Drain to source voltage Gate to source voltage Drain current Drain peak current Body-drain diode reverse drain current Channel dissipation Channel temperature Storage temperature Note: Symbol VDSS VGSS ID I D(pulse) I DR Pch Tch Tstg
Note2 Note1
Ratings 20 10 2.5 5 2.5 1 150 -55 to +150
Unit V V A A A W C C
1. PW 10s, duty cycle 1 % 2. When using the alumina ceramic board (12.5 x 20 x 0.7 mm)
Electrical Characteristics (Ta = 25C)
Item Symbol Min 20 10 -- -- 0.5 -- -- 3.0 -- -- -- -- -- -- -- -- -- Typ -- -- -- -- -- 0.09 0.12 5.0 260 150 75 15 70 55 70 0.9 75 Max -- -- 10 10 1.5 0.12 0.20 -- -- -- -- -- -- -- -- -- -- Unit V V A A V S pF pF pF ns ns ns ns V ns I F = 2.5A, VGS = 0 I F = 2.5A, VGS = 0 diF/ dt =50A/s Test Conditions I D = 10mA, VGS = 0 I G = 100A, VDS = 0 VDS = 20 V, VGS = 0 VGS = 8V, VDS = 0 I D = 1mA, VDS = 10V I D = 1.5A, VGS = 4V Note3 I D = 1.5A, VGS = 2.5V Note3 I D = 1.5A, VDS = 10V Note3 VDS = 10V VGS = 0 f = 1MHz VGS = 4V, ID = 1.5A RL = 6.67 Drain to source breakdown voltage V(BR)DSS Gate to source breakdown voltage V(BR)GSS Zero gate voltage drain current Gate to source leak current Gate to source cutoff voltage Static drain to source on state resistance Static drain to source on state resistance Forward transfer admittance Input capacitance Output capacitance Reverse transfer capacitance Turn-on delay time Rise time Turn-off delay time Fall time Body-drain diode forward voltage Body-drain diode reverse recovery time Note: 3. Pulse test 4. Marking is "ZY" I DSS I GSS VGS(off) RDS(on) RDS(on) |yfs| Ciss Coss Crss t d(on) tr t d(off) tf VDF t rr
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2SK2978
Main Characteristics
Power vs. Temperature Derating 2.0
Pch (W) I D (A)
10 Test condition : When using the alumina ceramic board (12.5 x 20 x 0.7 mm) 3
Maximum Safe Operation Area
10
PW =
1
s
) ot s sh 0 s (1 10 m s
1.5
1
D C
10
m
Channel Dissipation
1.0
Drain Current
0.3
0.5
Operation in 0.1 this area is limited by R DS(on) 0.03 0.01 0.1 Ta = 25 C
O pe
n tio ra
0
50
100
150
200
Ambient Temperature
Ta (C)
0.3 1 3 10 30 100 Drain to Source Voltage V DS (V)
Typical Output Characteristics 10 V 5 V 5 3V Pulse Test
I D (A) (A)
Typical Transfer Characteristics 5 V DS = 10 V Pulse Test 4
4
2.5 V 2V
3
ID Drain Current
3
Drain Current
2
2
75C 25C Tc = -25C 1 2 3 Gate to Source Voltage 4 5 V GS (V)
1 VGS = 1.5 V 0 2 4 6 Drain to Source Voltage 8 V DS (V) 10
1
0
3
2SK2978
Drain to Source Saturation Voltage vs. Gate to Source Voltage Static Drain to Source on State Resistance vs. Drain Current
Drain to Source Saturation Voltage V DS(on) (V)
Pulse Test
Drain to Source On State Resistance R DS(on) ( )
1
1
Pulse Test
0.5
0.8
0.6 ID=5A
0.2 0.1
VGS = 2.5 V 4V
0.4
0.05
0.2
2.5 A 1A 6 2 4 Gate to Source Voltage 1.5 A 8 V GS (V) 10
0.02 0.01
0
0.1
0.2
0.5 1 Drain Current
2 5 I D (A)
10
Static Drain to Source on State Resistance R DS(on) ( )
Forward Transfer Admittance |y fs | (S)
Static Drain to Source on State Resistance vs. Temperature 0.25 Pulse Test 0.2 2.5 A ID=5A 0.15 2.5 V 0.1 VGS = 4 V 0.05 0 -40 1, 2.5 A 5A 1A
Forward Transfer Admittance vs. Drain Current 10 5 Tc = -25 C 25 C 2 1 0.5 0.2 0.1 0.1 75 C
V DS = 10 V Pulse Test 2 0.2 0.5 1 Drain Current I D (A) 5 10
0 40 80 120 160 Case Temperature Tc (C)
4
2SK2978
Body-Drain Diode Reverse Recovery Time 100 1000 Typical Capacitance vs. Drain to Source Voltage
Reverse Recovery Time trr (ns)
Capacitance C (pF)
300 100 Crss 30 10 3 1
Ciss Coss
50
20 di / dt = 50 A / s V GS = 0, Ta = 25 C 2 1 5 0.2 0.5 Reverse Drain Current I DR (A) 10
VGS = 0 f = 1 MHz 0 5 10 15 20 25
10 0.1
Drain to Source Voltage V DS (V)
Dynamic Input Characteristics
V DS (V)
V GS (V)
50
I D = 2.5 A
20
1000 500
Switching Characteristics V GS = 4 V, V DD = 10 V PW = 5 s, duty < 1 %
Drain to Source Voltage
30
VDD = 10 V 5V
12
Gate to Source Voltage
V GS
Switching Time t (ns)
40
16
200 tr 100 50 tf t d(off) t d(on) 0.2 1 0.5 Drain Current 2 5 I D (A) 10
20
8
10
VDD = 10 V 5V
4 V DS 0 20
20 10 0.1
0
4 8 12 16 Gate Charge Qg (nc)
5
2SK2978
Reverse Drain Current vs. Source to Drain Voltage 5 Reverse Drain Current I DR (A) 4V
4 2.5 V 3 V GS = 0
2
1 Pulse Test 0 0.4 0.8 1.2 1.6 2.0 Source to Drain Voltage V SD (V)
Switching Time Test Circuit Vin Monitor D.U.T. RL Vin Vin 4V 50 V DD = 10 V Vout 10% 10% Vout Monitor
Waveform
90%
10% 90% td(off) tf
90% td(on) tr
6
2SK2978
Package Dimensions (Unit: mm)
4.5 0.1
1.0
1.5 1.5 3.0
0.8 min
0.53 max 0.48 max
1
2
3
2.5 0.1 4.25 max
4
0.4
1.8 max
1.5 0.1 0.44 max
0.44 max
Hitachi Code EIAJ JEDEC
UPAK SC-62 -
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2SK2978
Cautions
1. Hitachi neither warrants nor grants licenses of any rights of Hitachi's or any third party's patent, copyright, trademark, or other intellectual property rights for information contained in this document. Hitachi bears no responsibility for problems that may arise with third party's rights, including intellectual property rights, in connection with use of the information contained in this document. 2. Products and product specifications may be subject to change without notice. Confirm that you have received the latest product standards or specifications before final design, purchase or use. 3. Hitachi makes every attempt to ensure that its products are of high quality and reliability. However, contact Hitachi's sales office before using the product in an application that demands especially high quality and reliability or where its failure or malfunction may directly threaten human life or cause risk of bodily injury, such as aerospace, aeronautics, nuclear power, combustion control, transportation, traffic, safety equipment or medical equipment for life support. 4. Design your application so that the product is used within the ranges guaranteed by Hitachi particularly for maximum rating, operating supply voltage range, heat radiation characteristics, installation conditions and other characteristics. Hitachi bears no responsibility for failure or damage when used beyond the guaranteed ranges. Even within the guaranteed ranges, consider normally foreseeable failure rates or failure modes in semiconductor devices and employ systemic measures such as failsafes, so that the equipment incorporating Hitachi product does not cause bodily injury, fire or other consequential damage due to operation of the Hitachi product. 5. This product is not designed to be radiation resistant. 6. No one is permitted to reproduce or duplicate, in any form, the whole or part of this document without written approval from Hitachi. 7. Contact Hitachi's sales office for any questions regarding this document or Hitachi semiconductor products.
Hitachi, Ltd.
Semiconductor & IC Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Tel: Tokyo (03) 3270-2111 Fax: (03) 3270-5109 For further information write to: Hitachi Semiconductor (America) Inc. 2000 Sierra Point Parkway Brisbane, CA. 94005-1897 USA Tel: 800-285-1601 Fax:303-297-0447 Hitachi Europe GmbH Continental Europe Dornacher Strae 3 D-85622 Feldkirchen Munchen Tel: 089-9 91 80-0 Fax: 089-9 29 30-00 Hitachi Asia (Hong Kong) Ltd. Hitachi Asia Pte. Ltd. Hitachi Europe Ltd. 16 Collyer Quay #20-00 Unit 706, North Tower, Electronic Components Div. World Finance Centre, Northern Europe Headquarters Hitachi Tower Harbour City, Canton Road Singapore 049318 Whitebrook Park Tsim Sha Tsui, Kowloon Tel: 535-2100 Lower Cookham Road Hong Kong Fax: 535-1533 Maidenhead Tel: 27359218 Berkshire SL6 8YA Fax: 27306071 United Kingdom Tel: 01628-585000 Fax: 01628-585160 Copyright (c) Hitachi, Ltd., 1998. All rights reserved. Printed in Japan.
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