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(R) 74V1T126 SINGLE BUS BUFFER (3-STATE) PRELIMINARY DATA s s s s s s s s HIGH SPEED: tPD = 3.8 ns (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 1 A (MAX.) at TA = 25 oC COMPATIBLE WITH TTL OUTPUTS: VIH = 2V (MIN), VIL = 0.8V (MAX) POWER DOWN PROTECTION ON INPUT SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 8 mA (MIN) BALANCED PROPAGATION DELAYS: tPLH tPHL OPERATING VOLTAGE RANGE: VCC (OPR) = 4.5V to 5.5V IMPROVED LATCH-UP IMMUNITY S (SOT23-5L) C (SC-70) ORDER CODE: 74V1T126S 74V1T126C 3-STATE control input G has to be set LOW to place the output into the high impedance state. Power down protection is provided on all inputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage. This device can be used to interface 5V to 3V. DESCRIPTION The 74V1T126 is an advanced high-speed CMOS SINGLE BUS BUFFER fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It has similar high speed performance of equivalent Bipolar Schottky TTL combined with true CMOS low power dissipation. PIN CONNECTION AND IEC LOGIC SYMBOLS September 1999 1/8 74V1T126 INPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No 1 2 4 3 5 SYMBOL 1G 1A 1Y GND VCC NAME AND FUNCT ION Output Enable Input Data Input Data Output Ground (0V) Positive Supply Voltage TRUTH TABLE A X L H X:"H" or "L" Z:High Impedance G L H H Y Z L H ABSOLUTE MAXIMUM RATINGS Symbol VCC VI VO IIK IOK IO Tstg TL Supply Voltage DC Input Voltage DC Output Voltage DC Input Diode Current DC Output Diode Current DC Output Current Storage Temperature Lead Temperature (10 sec) Parameter Value -0.5 to +7.0 -0.5 to +7.0 -0.5 to VCC + 0.5 - 20 20 25 50 -65 to +150 260 Unit V V V mA mA mA mA o o ICC or IGND DC VCC or Ground Current C C Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition is not implied. RECOMMENDED OPERATING CONDITIONS Symbol VCC VI VO Top dt/dv Supply Voltage Input Voltage Output Voltage Operating Temperature Input Rise and Fall Time (see note 1) (V CC = 5.0 0.5V) Parameter Valu e 4.5 to 5.5 0 to 5.5 0 to VCC -40 to +85 0 to 20 Unit V V V o C ns/V 1) VIN from 0.8V to 2 V 2/8 74V1T126 DC SPECIFICATIONS Symb ol Parameter T est Cond ition s V CC (V) VIH VIL VOH High Level Input Voltage Low Level Input Voltage High Level Output Voltage Low Level Output Voltage 3 State Output Leakage Current Input Leakage Current Quiescent Supply Current Additional Worst Case Supply Current 4.5 to 5.5 4.5 to 5.5 4.5 4.5 4.5 4.5 5.5 0 to 5.5 5.5 5.5 VI = V IH or VI L VI = V IH or VI L IO=-50 A IO=-8 mA IO=50 A IO=8 mA 4.4 3.94 0.0 0.1 0.36 0.25 0.1 1 1.35 4.5 Min. 2 0.8 4.4 3.8 0.1 0.44 2.5 1.0 10 1.5 V A A A mA V Typ . Value T A = 25 o C Max. -40 to 85 o C Min . 2 0.8 Max. V V Un it VOL IOZ II ICC ICC VI = VIH or VIL VO = VCC or GND VI = 5.5V or GND VI = VCC or GND One Input at 3.4V, other input at VCC or GND AC ELECTRICAL CHARACTERISTICS (Input t r = tf =3 ns) Symb ol Parameter Test Co ndition V CC (*) CL (pF ) (V) 5.0 5.0 5.0 5.0 5.0 5.0 15 50 15 50 15 50 Value T A = 25 o C Min. Typ . Max. 3.8 5.5 5.3 4.6 6.1 3.6 5.1 7.5 6.8 8.8 5.1 7.1 Un it -40 to 85 o C Min . Max. 1.0 6.5 1.0 1.0 1.0 1.0 1.0 8.5 8.0 10.0 6.0 8.0 tPLH tPHL tPLZ tPHZ tPZH tPZL Propagation Delay Time Output Disable Time Output Enable Time ns ns ns (*) Voltage range is 5V 0.5V CAPACITIVE CHARACTERISTICS Symb ol Parameter T est Cond ition s Min. C IN COUT CPD Input Capacitance Output Capacitance Power Dissipation Capacitance (note 1) Typ . 4 10 14 Value T A = 25 o C Max. 10 -40 to 85 o C Min . Max. 10 pF pF pF Un it 1) CPD isdefined as the value of the IC'sinternal equivalent capacitance which is calculated fromthe operating current consumption without load. (Referto Test Circuit).Average operating current can be obtained by the following equation. ICC(opr) = CPD * VCC * fIN + ICC 3/8 74V1T126 TEST CIRCUIT T EST tPLH , tPHL tPZL , tPLZ tPZH , tPHZ CL = 15/50 pF or equivalent (includes jig and probe capacitance) RL = R1 = 1K orequivalent RT = ZOUT of pulse generator (typically 50) SW IT CH Open VCC GND WAVEFORM 1: PROPAGATION DELAYS (f=1MHz; 50% duty cycle) 4/8 74V1T126 WAVEFORM 2: OUTPUT ENABLE AND DISABLE TIME (f=1MHz; 50% duty cycle) 5/8 74V1T126 SOT23-5L MECHANICAL DATA mm MIN. A A1 A2 b C D E E1 L e e1 0.90 0.00 0.90 0.35 0.09 2.80 2.60 1.50 0.35 0.95 1.9 TYP. MAX. 1.45 0.15 1.30 0.50 0.20 3.00 3.00 1.75 0.55 MIN. 35.4 0.0 35.4 13.7 3.5 110.2 102.3 59.0 13.7 37.4 74.8 mils TYP. MAX. 57.1 5.9 51.2 19.7 7.8 118.1 118.1 68.8 21.6 DIM. 6/8 74V1T126 SC-70 MECHANICAL DATA mm MIN. A A1 A2 b C D E E1 L e e1 0.80 0.00 0.80 0.15 0.10 1.80 1.80 1.15 0.10 0.65 1.3 TYP. MAX. 1.10 0.10 1.00 0.30 0.18 2.20 2.40 1.35 0.30 MIN. 31.5 0.0 31.5 5.9 3.9 70.9 70.9 45.3 3.9 25.6 51.2 mils TYP. MAX. 43.3 3.9 39.4 11.8 7.1 86.6 94.5 53.1 11.8 DIM. 7/8 74V1T126 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a trademark of STMicroelectronics (c) 1999 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - France - Germany - Italy - Japan - Korea - Malaysia - Malta - Mexico - Morocco - The Netherlands Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A. http://www.st.com . 8/8 |
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