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(R)
74LVX257
LOW VOLTAGE QUAD 2 CHANNEL MULTIPLEXER (3-STATE)
s s
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HIGH SPEED: tPD = 5.8 ns (TYP.) at VCC = 3.3V INPUT VOLTAGE LEVEL: VIL = 0.8V, VIH = 2V at VCC = 3V LOWPOWER DISSIPATION: ICC = 4 A (MAX.) at TA = 25 oC LOWNOISE: VOLP = 0.3 V (TYP.) at VCC = 3.3V SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4 mA (MIN) BALANCED PROPAGATION DELAYS: tPLH tPHL OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 3.6V (1.2V Data Retention) PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 257 IMPROVED LATCH-UP IMMUNITY POWER DOWN PROTECTION ON INPUTS
M (Micro Package)
T (TSSOP Package)
ORDER CODES : 74LVX257M 74LVX257T multiplexers with common SELECT and ENABLE INPUT. The 74LVX257 is a non inverting multiplexer. When the ENABLE INPUT is held "High", all outputs become high impedance state. If SELECT INPUT is held "Low", "A" data is selected, when SELECT INPUT is "High", "B" data is chosen. Power down protection is provided on all inputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage. This device can be used to interface 5V to 3V. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage.
DESCRIPTION The 74LVX257 is an advanced high-speed CMOS QUAD 2 CHANNEL MULTIPLEXER (3-STATE) fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It has similar high speed performance of equivalent Bipolar Schottky TTL combined with true CMOS low power dissipation. It is composed of four independent 2 channel PIN CONNECTION AND IEC LOGIC SYMBOLS
June 1999
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74LVX257
INPUT EQUIVALENT CIRCUIT PIN DESCRIPTION
PIN No 1 2, 5, 14, 11 3, 6, 13, 10 4, 7, 12, 9 15 8 16 SYMBOL SELECT 1A to 4A 1B to 4B 1Y to 4Y OE GND VCC NAME AND FUNCT ION Common Data Select Input Data Inputs From Source A Data Inputs from Source B 3 State Multiplexer Outputs 3 State Output Enable Input (Active LOW) Ground (0V) Positive Supply Voltage
TRUTH TABLE
INPUT S OE H L L L L
X = DON'T CARE Z = HIGH IMPEDANCE
OUTPUTS A X L H X X B X X X L H Y Z L H L H
SELE CT X L L H H
LOGIC DIAGRAM
Thislogic diagram has notbe used to estimate propagation delays
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74LVX257
ABSOLUTE MAXIMUM RATINGS
Symbol VCC VI VO IIK IOK IO Tstg TL Supply Voltage DC Input Voltage DC Output Voltage DC Input Diode Current DC Output Diode Current DC Output Current Storage Temperature Lead Temperature (10 sec) Parameter Value -0.5 to +7.0 -0.5 to +7.0 -0.5 to VCC + 0.5 - 20 20 25 50 -65 to +150 300 Unit V V V mA mA mA mA
o o
ICC or IGND DC VCC or Ground Current
C C
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition is not implied.
RECOMMENDED OPERATING CONDITIONS
Symbol VCC VI VO Top dt/dv Input Voltage Output Voltage Operating Temperature: Input Rise and Fall Time (VCC = 3V) (note 2) Parameter Supply Voltage (note 1) Valu e 2 to 3.6 0 to 5.5 0 to VCC -40 to +85 0 to 100 Unit V V V
o
C
ns/V
1) Truth Table guaranteed: 1.2V to 3.6V 2) VIN from 0.8V to 2V
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74LVX257
DC SPECIFICATIONS
Symb ol Parameter V CC (V) VIH High Level Input Voltage 2.0 3.0 3.6 VIL Low Level Input Voltage 2.0 3.0 3.6 VOH High Level Output Voltage Low Level Output Voltage Input Leakage Current 3 State Output Leakage Current Quiescent Supply Current 2.0 3.0 3.0 VOL 2.0 3.0 3.0 II IOZ ICC 3.6 3.6 3.6 VI = V IH or V IL VI(*) = VIH or VIL
(* )
Test Co nditions Min. 1.5 2.0 2.4 T yp.
Valu e T A = 25 oC Max. -40 to 85 o C Min. 1.5 2.0 2.4 0.5 0.8 0.8 0.5 0.8 0.8 1.9 2.9 2.48 0.0 0.0 0.1 0.1 0.36 0.1 0.25 4 0.1 0.1 0.44 1 2.5 40 Max.
Un it
V
V
I O =-50 A IO=-50 A IO=-4 mA IO=50 A IO=50 A IO=4 mA
1.9 2.9 2.58
2.0 3.0
V
V A A A
VI = 5.5V or GND VI = VIH or VIL VO = VCC or GND VI = VCC or GND
(*) All outputs loaded.
DYNAMIC SWITCHING CHARACTERISTICS
Symb ol Parameter V CC (V) VOLP VOLV VIHD VILD Dynamic Low Voltage Quiet Output (note 1, 2) Dynamic High Voltage Input (note 1, 3) Dynamic Low Voltage Input (note 1, 3) 3.3 -0.5 3.3 3.3 C L = 50 pF 0.8 Test Co nditions Min. T yp. 0.3 -0.3 2 V Valu e T A = 25 oC Max. 0.5 -40 to 85 o C Min. Max. Un it
1) Worst case package 2) Max number of outputs defined as (n). Data inputs are driven 0V to 3.3V, (n -1) outputs switching and one output at GND 3) max number of data inputs (n) switching. (n-1) switching 0V to3.3V. Inputs under test switching: 3.3V to threshold (VILD), 0V to threshold (VIHD). f=1MHz
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74LVX257
AC ELECTRICAL CHARACTERISTICS (Input t r = tf =3 ns)
Symb ol Parameter V CC (V) tPLH tPHL Propagation Delay Time A, B to Y 2.7 2.7 3.3(*) 3.3(*) 2.7 2.7 3.3 3.3(*) tPZL tPZH Output Enable Time 2.7 2.7 3.3(*) 3.3(*) 2.7 3.3 2.7 3.3
(*) (*)
T est Con ditio n CL (p F) 15 50 15 50 15 50 15 50 15 50 15 50 50 50 50 50 R L = 1 K
Valu e T A = 25 oC -40 to 85 o C Min. T yp. Max. Min. Max. 13.0 1.0 15.4 5.8 8.3 18.0 9.3 12.8 15.4 20.3 11.0 14.5 14.7 19.6 10.5 14.0 16.8 12.0 1.5 1.5 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 20.3 11.0 14.5 18.2 23.1 13.0 16.5 17.5 22.4 12.5 16.0 18.9 13.5 1.5 1.5
Un it
ns
tPLH tPHL
Propagation Delay Time SELECT to Y
ns
7.0 9.5
ns
6.7 9.2 R L = 1 K 8.6
tPLZ tPHZ tOSLH tOSHL
Output Disable Time Output to Output Skew Time (note 1, 2)
ns ns
(*)
1) Skew is defined as the absolute value of the difference between the actual propagation delay for any twooutputs of the same device switching in the same direction, either HIGH or LOW 2) Parameter guaranteed by design (*) Voltage range is 3.3V 0.3V
CAPACITIVE CHARACTERISTICS
Symb ol Parameter T est Cond ition s
o
Value T A = 25 C Min. Typ . 4 6 23 Max. 10 -40 to 85 C Min . Max. 10
o
Un it
C IN COUT CPD
Input Capacitance Output Capacitance Power Dissipation Capacitance (note 1)
pF pF pF
1) CPD isdefined as the value of the IC'sinternal equivalent capacitance which is calculated fromthe operating current consumption without load. (Referto Test Circuit).Average operating current can be obtained by the following equation. ICC(opr) = CPD * VCC * fIN + ICC/4 (per Channel)
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74LVX257
TEST CIRCUIT
T EST tPLH , tPHL tPZL , tPLZ tPZH , tPHZ
CL = 15/50 pF or equivalent (includes jig and probe capacitance) RL = R1 = 1K orequivalent RT = ZOUT of pulse generator (typically 50)
SW IT CH Open VCC GND
WAVEFORM 1: PROPAGATION DELAYS FOR INVERTING CONDITIONS (f=1MHz; 50% duty cycle)
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74LVX257
WAVEFORM 2: PROPAGATION DELAYS FOR NON-INVERTING CONDITIONS (f=1MHz; 50% duty cycle)
WAVEFORM 3: OUTPUT ENABLE AND DISABLE TIME (f=1MHz; 50% duty cycle)
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74LVX257
SO-16 MECHANICAL DATA
DIM. MIN. A a1 a2 b b1 C c1 D E e e3 F G L M S 3.8 4.6 0.5 9.8 5.8 1.27 8.89 4.0 5.3 1.27 0.62 8 (max.) 0.149 0.181 0.019 10 6.2 0.35 0.19 0.5 45 (typ.) 0.385 0.228 0.050 0.350 0.157 0.208 0.050 0.024 0.393 0.244 0.1 mm TYP. MAX. 1.75 0.2 1.65 0.46 0.25 0.013 0.007 0.019 0.004 MIN. inch TYP. MAX. 0.068 0.007 0.064 0.018 0.010
P013H
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74LVX257
TSSOP16 MECHANICAL DATA
mm MIN. A A1 A2 b c D E E1 e K L 0o 0.50 0.05 0.85 0.19 0.09 4.9 6.25 4.3 5 6.4 4.4 0.65 BSC 4o 0.60 8o 0.70 0o 0.020 0.10 0.9 TYP. MAX. 1.1 0.15 0.95 0.30 0.20 5.1 6.5 4.48 0.002 0.335 0.0075 0.0035 0.193 0.246 0.169 0.197 0.252 0.173 0.0256 BSC 4o 0.024 8o 0.028 0.004 0.354 MIN. inch TYP. MAX. 0.433 0.006 0.374 0.0118 0.0079 0.201 0.256 0.176
DIM.
A
A2 A1 b e K c L E
D
E1
PIN 1 IDENTIFICATION
1
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74LVX257
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a trademark of STMicroelectronics (c) 1999 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - France - Germany - Italy - Japan - Korea - Malaysia - Malta - Mexico - Morocco - The Netherlands Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A. http://www.st.com .
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