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IDT74FCT162H952AT/CT/ET FAST CMOS 16-BIT REGISTERED TRANSCEIVER
INDUSTRIAL TEMPERATURE RANGE
FAST CMOS 16-BIT REGISTERED TRANSCEIVER
FEATURES:
* * * * *
IDT74FCT162H952AT/CT/ET
0.5 MICRON CMOS Technology High-speed, low-power CMOS replacement for ABT functions Typical tSK(o) (Output Skew) < 250ps Low input and output leakage 1A (max.) ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0) * Bus Hold retains last active bus state during 3-state * Eliminates the need for external pull up resistors * Available in SSOP and TSSOP packages
The FCT162H952T 16-bit registered transceiver is built using advanced dual metal CMOS technology. These high-speed, low-power devices are organized as two independent 8-bit D-type registered transceivers with separate input and output control for independent control of data flow in either direction. For example, the A-to-B Enable (xCEAB) must be low to enter data from the A port. xCLKAB controls the clocking function. When xCLKAB toggles from low-to-high, the data present on the A port will be clocked into the register. xOEAB performs the output enable function on the B port. Data flow from the B port to A port is similar but requires using xCEBA, xCLKBA, and xOEBA inputs. Full 16-bit operation is achieved by tying the control pins of the independent transceivers together. The FCT162H952T has "Bus Hold" which retains the input's last state whenever the input goes to high impedance. This prevents "floating" inputs and eliminates the need for pull-up/down resistors.
DESCRIPTION:
FUNCTIONAL BLOCK DIAGRAM
54
31
1C E BA
55
2C E BA
30
1C LKBA
1
2C LKBA
28
1O E AB
3
2O E AB
26
1C E AB
2
2C E AB
27
1C LKAB
56
2C LKAB
29
1O E BA
5
2O E BA C CE D
15 52
1A 1
2A 1 1B 1
C CE D
42
2B 1
C CE D
C CE D
TO SEVEN OTHER CHANNELS
TO SEVEN OTHE R CHANNELS
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
INDUSTRIAL TEMPERATURE RANGE
1
(c) 2002 Integrated Device Technology, Inc.
NOVEMBER 2002
DSC-5441/2
IDT74FCT162H952AT/CT/ET FAST CMOS 16-BIT REGISTERED TRANSCEIVER
INDUSTRIAL TEMPERATURE RANGE
PIN CONFIGURATION
1OEAB 1CLKAB 1CEAB
ABSOLUTE MAXIMUM RATINGS(1)
Symbol Description Terminal Voltage with Respect to GND Storage Temperature DC Output Current Max -0.5 to 7 -0.5 to VCC+0.5 -65 to +150 -60 to +120 Unit V V C mA
56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29
1OEBA 1CLKBA 1CEBA
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28
VTERM(2) TSTG IOUT
VTERM(3) Terminal Voltage with Respect to GND
GND
1A1 1A2
GND
1B1 1B2
VCC
1A3 1A4 1A5
VCC
1B3 1B4 1B5
NOTES: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. 2. All device terminals except FCT162XXX Output and I/O terminals.VCC terminals. 3. Outputs and I/O terminals for FCT162XXX.
GND
1A6 1A7 1A8 2A1 2A2 2A3
GND
1B6 1B7 1B8 2B1 2B2 2B3
CAPACITANCE (TA = +25C, f = 1.0MHz)
Symbol CIN COUT Parameter(1) Input Capacitance Output Capacitance Conditions VIN = 0V VOUT = 0V Typ. 3.5 3.5 Max. 6 8 Unit pF pF
GND
2A4 2A5 2A6
GND
2B4 2B5 2B6
NOTE: 1. This parameter is measured at characterization but not tested.
VCC
2A7 2A8
VCC
2B7 2B8
GND
2CEAB 2CLKAB 2OEAB
GND
2CEBA 2CLKBA 2OEBA
FUNCTION TABLE(1, 3)
Inputs xCEAB H X L L X xCLKAB X L X xOEAB L L L L H xAx X X L H X Outputs xBx B(2) B(2) L H Z
SSOP/ TSSOP TOP VIEW
PIN DESCRIPTION
Pin Names xOEAB xOEBA xCEAB xCEBA xCLKAB xCLKBA xAx xBx Description A-to-B Output Enable Input (Active LOW) B-to-A Output Enable Input (Active LOW) A-to-B Clock Enable Input (Active LOW) B-to-A Clock Enable Input (Active LOW) A-to-B Clock Input B-to-A Clock Input A-to-B Data Inputs or B-to-A 3-State Outputs(1) B-to-A Data Inputs or A-to-B 3-State Outputs(1)
NOTES: 1. A-to-B data flow is shown: B-to-A data flow is similar but uses xCEBA, xCLKBA, and xOEBA. 2. Level of B before the indicated steady-state input conditions were established. 3. H = HIGH Voltage Level L = LOW Voltage Level X = Don't Care = LOW-to-HIGH Transition Z = High-impedance
NOTE: 1. These pins have "Bus Hold". All other pins are standard inputs, outputs or I/Os.
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IDT74FCT162H952AT/CT/ET FAST CMOS 16-BIT REGISTERED TRANSCEIVER
INDUSTRIAL TEMPERATURE RANGE
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified: Industrial: TA = -40C to +85C, VCC = 5.0V 10%
Symbol VIH VIL IIH Parameter Input HIGH Level Input LOW Level Input HIGH Current(4) IIL Input LOW Current(4) IBHH IBHL IOZH IOZL VIK IOS VH ICCL ICCH ICCZ Bus-hold Sustain Current(4) High Impedance Output Current (3-State Output pins)(5, 6) Clamp Diode Voltage Short Circuit Current Input Hysteresis Quiescent Power Supply Current VCC = Max VIN = GND or VCC VCC = Min., IIN = -18mA VCC = Max., VO = GND(3) -- VCC = Max. Test Conditions(1) Guaranteed Logic HIGH Level Guaranteed Logic LOW Level Standard Input(5) Standard I/O(5) Bus-hold Input Bus-hold I/O Standard Input(5) Standard I/O(5) Bus-hold Input Bus-hold I/O Bus-hold Input VCC = Min. VI = 2V VI = 0.8V VO = 2.7V VO = 0.5V VI = GND VCC = Max. VI = VCC Min. 2 -- -- -- -- -- -- -- -- -- -50 50 -- -- -- -80 -- -- Typ.(2) -- -- -- -- -- -- -- -- -- -- -- -- -- -- -0.7 -140 100 5 Max. -- 0.8 1 1 100 100 1 1 100 100 -- -- 1 1 -1.2 -250 -- 500 V mA mV A A A Unit V V A
OUTPUT DRIVE CHARACTERISTICS
Symbol IODL IODH VOH VOL Parameter Output LOW Current Output HIGH Current Output HIGH Voltage Output LOW Voltage Test Conditions(1) VCC = 5V, VIN = VIH or VIL, VO = 1.5V(3) VCC = 5V, VIN = VIH or VIL, VO = 1.5V(3) VCC = Min. IOH = -24mA VIN = VIH or VIL VCC = Min. IOL = 24mA VIN = VIH or VIL Min. 60 -60 2.4 -- Typ.(2) 115 -115 3.3 0.3 Max. 200 -200 -- 0.55 Unit mA mA V V
NOTES: 1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 5.0V, +25C ambient. 3. Not more than one output should be tested at one time. Duration of the test should not exceed one second. 4. Pins with Bus-hold are identified in the pin description. 5. The test limit for this parameter is 5A at TA = -55C. 6. Does not include Bus-hold I/O pins.
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IDT74FCT162H952AT/CT/ET FAST CMOS 16-BIT REGISTERED TRANSCEIVER
INDUSTRIAL TEMPERATURE RANGE
POWER SUPPLY CHARACTERISTICS
Symbol ICC ICCD Parameter Quiescent Power Supply Current TTL Inputs HIGH Dynamic Power Supply Current(4) Test Conditions(1) VCC = Max. VIN = 3.4V(3) VCC = Max. Outputs Open xOEAB or xOEBA = GND One Input Toggling 50% Duty Cycle VCC = Max. Outputs Open fCP = 10MHz (xCLKAB) 50% Duty Cycle xOEAB = xCEAB = GND xOEBA = VCC One Bit Toggling fi = 5MHz 50% Duty Cycle VCC = Max. Outputs Open fCP = 10MHz (xCLKAB) 50% Duty Cycle xOEAB = xCEAB = GND xOEBA = VCC Sixteen Bits Toggling fi = 2.5MHz 50% Duty Cycle Min. -- VIN = VCC VIN = GND -- Typ.(2) 0.5 75 Max. 1.5 120 Unit mA A/ MHz
IC
Total Power Supply Current(6)
VIN = VCC VIN = GND
--
0.8
1.7
mA
VIN = 3.4V VIN = GND
--
1.3
3.2
VIN = VCC VIN = GND
--
3.8
6.5(5)
VIN = 3.4V VIN = GND
--
8.3
20(5)
NOTES: 1. For conditions shown as Min. or Max., use appropriate value specified under Electrical Characteristics for the applicable device type. 2. Typical values are at VCC = 5.0V, +25C ambient. 3. Per TTL driven input (VIN = 3.4V). All other inputs at VCC or GND. 4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations. 5. Values for these conditions are examples of the ICC formula. These limits are guaranteed but not tested. 6. IC = IQUIESCENT + IINPUTS + IDYNAMIC IC = ICC + ICC DHNT + ICCD (fCPNCP/2 + fiNi) ICC = Quiescent Current (ICCL, ICCH and ICCZ) ICC = Power Supply Current for a TTL High Input (VIN = 3.4V) DH = Duty Cycle for TTL Inputs High NT = Number of TTL Inputs at DH ICCD = Dynamic Current Caused by an Input Transition Pair (HLH or LHL) fCP = Clock Frequency for Register Devices (Zero for Non-Register Devices) NCP = Number of Clock Inputs at fCP fi = Input Frequency Ni = Number of Inputs at fi
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IDT74FCT162H952AT/CT/ET FAST CMOS 16-BIT REGISTERED TRANSCEIVER
INDUSTRIAL TEMPERATURE RANGE
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
FCT162H952AT Symbol tPLH tPHL tPZH tPZL tPHZ tPLZ tSU tH tSU tH tW tSK(o) Parameter Propagation Delay xCLKAB, xCLKBA to xBx, xAx Output Enable Time xOEBA, xOEAB to xAx, xBx Output Disable Time xOEBA, xOEAB to xAx, xBx Set-up Time, HIGH or LOW xAx, xBx to xCLKAB, xCLKBA Hold Time HIGH or LOW xAx, xBx to xCLKAB, xCLKBA Set-up Time, HIGH or LOW xCEAB, xCEBA to xCLKAB, xCLKBA Hold Time HIGH or LOW xCEAB, xCEBA to xCLKAB, xCLKBA Pulse Width HIGH or LOW xCLKAB or xCLKBA(3) Output Skew(4) Condition(1) CL = 50pF RL = 500 Min.(2) 2 1.5 1.5 2.5 2 3 2 3 -- Max. 10 10.5 10 -- -- -- -- -- 0.5 FCT162H952CT Min.(2) 2 1.5 1.5 2.5 1.5 3 2 3 -- Max. 6.3 7 6.5 -- -- -- -- -- 0.5 FCT162H952ET Min.(2) 1.5 1.5 1.5 1.5 0 2 0 3 -- Max. 3.7 4.4 3.6 -- -- -- -- -- 0.5 Unit ns ns ns ns ns ns ns ns ns
NOTES: 1. See test circuit and waveforms. 2. Minimum limits are guaranteed but not tested on Propagation Delays. 3. Guaranteed but not tested. 4. Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design.
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IDT74FCT162H952AT/CT/ET FAST CMOS 16-BIT REGISTERED TRANSCEIVER
INDUSTRIAL TEMPERATURE RANGE
TEST CIRCUITS AND WAVEFORMS
V CC 7.0V 500 V IN Pulse Generator D.U.T. 50pF RT 500 CL V O UT
SWITCH POSITION
Test Open Drain Disable Low Enable Low All Other Tests Switch Closed Open
DEFINITIONS: CL = Load capacitance: includes jig and probe capacitance. RT = Termination resistance: should be equal to ZOUT of the Pulse Generator.
Test Circuits for All Outputs
DATA INPUT tSU TIMING INPUT ASYNCHRONOUS CONTROL PRESET CLEAR ETC. SYNCHRONOUS CONTROL PRESET CLEAR CLOCK ENABLE ETC. tREM
tH
3V 1.5V 0V 3V 1.5V 0V 3V 1.5V 0V 3V 1.5V 0V
LOW -HIGH-LOW PULSE tW HIGH-LOW -HIGH PULSE
1.5V
1.5V
tSU
tH
Pulse Width
Set-up, Hold, and Release Times
ENAB LE SAM E PHASE INPUT TRANSITION tPLH OUTPUT tPLH OPPOSITE PHASE INPUT TRANSITION tPHL tPHL 3V 1.5V 0V VOH 1.5V VOL 3V 1.5V 0V DISABLE 3V CONTROL INPUT tPZL OUTPUT NORM ALLY LOW SW ITCH CLOSED tPZH OUTPUT NORM ALLY HIGH SW ITCH OPEN 3.5V 1.5V 0.3V tPHZ 0.3V 1.5V 0V 0V VOH tPLZ 1.5V 0V 3.5V VOL
Propagation Delay
Enable and Disable Times
NOTES: 1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH. 2. Pulse Generator for All Pulses: Rate 1.0MHz; tF 2.5ns; tR 2.5ns.
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IDT74FCT162H952AT/CT/ET FAST CMOS 16-BIT REGISTERED TRANSCEIVER
INDUSTRIAL TEMPERATURE RANGE
ORDERING INFORMATION
IDT XX FCT XXX Temp. Range Family X Bus Hold XXXX Device Type X Package
PV PA
Shrink Small Outline Package Thin Shrink Small Outline Package
952AT 952CT 952ET H 162 74
16-Bit Registered Transceiver
Bus Hold Double-Density, 5 Volt, Balanced Drive - 40C to +85C
DATA SHEET DOCUMENT HISTORY 4/11/2002 Removed B speed option
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for Tech Support: logichelp@idt.com (408) 654-6459
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