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INTEGRATED CIRCUITS
DATA SHEET
For a complete data sheet, please also download:
* The IC06 74HC/HCT/HCU/HCMOS Logic Family Specifications * The IC06 74HC/HCT/HCU/HCMOS Logic Package Information * The IC06 74HC/HCT/HCU/HCMOS Logic Package Outlines
74HC/HCT221 Dual non-retriggerable monostable multivibrator with reset
Product specification Supersedes data of April 1988 File under Integrated Circuits, IC06 December 1990
Philips Semiconductors
Product specification
Dual non-retriggerable monostable multivibrator with reset
FEATURES * Pulse width variance is typically less than 5% * Pin-out identical to "123" * Overriding reset terminates output pulse * nB inputs have hysteresis for improved noise immunity * Output capability: standard (except for nREXT/CEXT) * ICC category: MSI GENERAL DESCRIPTION The 74HC/HCT221 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A. The 74HC/HCT221 are dual non-retriggerable monostable multivibrators. Each multivibrator features an active LOW-going edge input (nA) and an active HIGH-going edge input (nB), either of which can be used as an enable input. Pulse triggering occurs at a particular voltage level and is not directly related to the transition time of the input pulse. Schmitt-trigger input circuitry for the nB inputs allow
74HC/HCT221
jitter-free triggering from inputs with slow transition rates, providing the circuit with excellent noise immunity. Once triggered, the outputs (nQ, nQ) are independent of further transitions of nA and nB inputs and are a function of the timing components. The output pulses can be terminated by the overriding active LOW reset inputs (nRD). Input pulses may be of any duration relative to the output pulse. Pulse width stability is achieved through internal compensation and is virtually independent of VCC and temperature. In most applications pulse stability will only be limited by the accuracy of the external timing components. The output pulse width is defined by the following relationship: tW = CEXTREXTIn2 tW = 0.7CEXTREXT Pin assignments for the "221" are identical to those of the "123" so that the "221" can be substituted for those products in systems not using the retrigger by merely changing the value of REXT and/or CEXT.
QUICK REFERENCE DATA GND = 0 V; Tamb = 25 C; tr = tf = 6 ns TYPICAL SYMBOL PARAMETER propagation delay tPHL tPLH CI CPD Notes 1. CPD is used to determine the dynamic power dissipation (PD in W): PD = CPD x VCC2 x fi + (CL x VCC2 x fo) + 0.33 x CEXT x VCC2 x fo + D x 28 x VCC where: fi = input frequency in MHz; fo = output frequency in MHz (CL x VCC2 x fo) = sum of outputs CEXT = timing capacitance in pF; CL = output load capacitance in pF VCC = supply voltage in V; D = duty factor in % 2. For HC the condition is VI = GND to VCC For HCT the condition is VI = GND to VCC - 1.5 V nA, nB, nRD to nQ, nQ nA, nB, nRD to nQ, nQ input capacitance power dissipation capacitance per package notes 1 and 2 CONDITIONS HC CL = 15 pF; VCC = 5 V; REXT = 5 k; CEXT = 0 pF 29 35 3.5 90 HCT 32 36 3.5 96 ns ns pF pF UNIT
December 1990
2
Philips Semiconductors
Product specification
Dual non-retriggerable monostable multivibrator with reset
ORDERING INFORMATION See "74HC/HCT/HCU/HCMOS Logic Package Information". PIN DESCRIPTION PIN NO. 1, 9 2, 10 3, 11 4, 12 7 8 13, 5 14, 6 15 16 SYMBOL 1A, 2A 1B, 2B 1RD, 2RD 1Q, 2Q 2REXT/CEXT GND 1Q, 2Q 1CEXT, 2CEXT 1REXT/CEXT VCC NAME AND FUNCTION trigger inputs (negative-edge triggered) trigger inputs (positive-edge triggered) direct reset inputs (active LOW) outputs (active LOW) external resistor/capacitor connection ground (0 V) outputs (active HIGH) external capacitor connection external resistor/capacitor connection positive supply voltage
74HC/HCT221
Fig.1 Pin configuration.
Fig.2 Logic symbol.
Fig.3 IEC logic symbol.
December 1990
3
Philips Semiconductors
Product specification
Dual non-retriggerable monostable multivibrator with reset
FUNCTION TABLE INPUTS nRD L X X H H Notes nA X H X L L nB X X L H H
74HC/HCT221
OUTPUTS nQ L L
(2)
nQ H H (2) H (2)
L (2)
(3)
(3)
1. H = HIGH voltage level L = LOW voltage level X = don't care = LOW-to-HIGH level = HIGH-to-LOW level = one HIGH-level output pulse = one LOW-level output pulse 2. If the monostable was triggered before this condition was established the pulse will continue as programmed. 3. For this combination the reset input must be LOW and the following sequence must be used: pin 1 (or 9) must be set HIGH or pin 2 (or 10) set LOW; then pin 1 (or 9) must be LOW and pin 2 (or 10) set HIGH. Now the reset input goes from LOW-to-HIGH and the device will be triggered.
Fig.4 Functional diagram.
December 1990
4
Philips Semiconductors
Product specification
Dual non-retriggerable monostable multivibrator with reset
74HC/HCT221
Fig.5 Logic diagram.
Note It is recommended to ground pins 6 (2CEXT) and 14 (1CEXT) externally to pin 8 (GND).
Fig.6 Timing component connections.
December 1990
5
Philips Semiconductors
Product specification
Dual non-retriggerable monostable multivibrator with reset
DC CHARACTERISTICS FOR 74HC For the DC characteristics see "74HC/HCT/HCU/HCMOS Logic Family Specifications". Output capability: standard (except for nREXT/CEXT) ICC category: MSI AC CHARACTERISTICS FOR 74HC GND = 0 V; tr = tf = 6 ns; CL = 50 pF Tamb (C) 74HC
SYMBOL PARAMETER
74HC/HCT221
TEST CONDITIONS UNIT VCC WAVEFORMS (V) 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6,0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 5.0 CEXT = 0 pF; REXT = 5 k; Fig.10 CEXT = 0 pF; REXT = 5 k; Fig.10 CEXT = 0 pF; REXT = 5 k; Fig.10 CEXT = 0 pF; REXT = 5 k; Fig.10 CEXT = 0 pF; REXT = 5 k; Fig.11 CEXT = 0 pF; REXT = 5 k; Fig.11 Fig.10
+25
-40 to +85
-40 to +125 min.
max.
min typ max. min max. tPLH propagation delay (trigger) nA, nB to nQ propagation delay (trigger) nRD to nQ propagation delay (trigger) nA, nB to nQ propagation delay (trigger) nRD to nQ propagation delay (reset) nRD to nQ propagation delay (reset) nRD to nQ output transition time 72 26 21 80 29 23 58 21 17 63 23 18 66 24 19 58 21 17 19 7 6 75 15 13 90 18 15 75 15 13 630 25 9 7 30 11 9 25 9 7 700 770 220 44 37 245 49 42 180 36 31 195 39 33 200 40 34 180 36 31 75 15 13 95 19 16 115 23 20 95 19 16 602 798 275 55 47 305 61 52 225 45 38 245 49 42 250 50 43 225 45 38 95 19 16
330 66 56 370 74 63 270 54 46 295 59 50 300 60 51 270 54 46 110 22 19 110 22 19 135 27 23 110 22 19 595 805
ns
tPLH
ns
tPHL
ns
tPHL
ns
tPLH
ns
tPLH
ns
tTHL/ tTLH tW
ns
trigger pulse width nA = LOW trigger pulse width nB = HIGH trigger pulse width nRD = LOW output pulse width nQ = LOW nQ = HIGH
ns
Fig.7
tW
ns
Fig.7
tW
ns
Fig.8
tW
s
CEXT = 100 nF; REXT = 10 k; Fig.10
December 1990
6
Philips Semiconductors
Product specification
Dual non-retriggerable monostable multivibrator with reset
Tamb (C) 74HC
SYMBOL PARAMETER
74HC/HCT221
TEST CONDITIONS UNIT VCC WAVEFORMS (V) 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 4.5 to 5.5 2.0 4.5 6.0 2.0 5.0 2.0 5.0 CEXT = 28 nF; REXT = 2 k; Fig.10 CEXT = 1 nF; REXT = 2 k; Fig.10 CEXT = 1 nF; REXT = 10 k; Fig.10 CEXT = 1000 pF; REXT = 10 k Fig.9
+25
-40 to +85 -
-40 to +125 min. -
max.
min typ max. min max. tW output pulse width nQ or nQ output pulse width nQ or nQ output pulse width nQ or nQ pulse width match between circuits in the package removal time nRD to nA or nB external timing resistor external timing capacitor 100 20 17 10 2 no limits 140
ns
tW
1.5
-
-
s
tW
7
-
-
s
tW
2
-
-
%
trem
30 11 9
125 25 21 1000 - 1000 -
150 30 26 - -
ns
REXT CEXT
k pF
Fig.12 Fig.13 Fig.12 Fig.13
December 1990
7
Philips Semiconductors
Product specification
Dual non-retriggerable monostable multivibrator with reset
DC CHARACTERISTICS FOR 74HCT For the DC characteristics see "74HC/HCT/HCU/HCMOS Logic Family Specifications". Output capability: standard (except for nREXT/CEXT) ICC category: MSI Note to HCT types
74HC/HCT221
The value of additional quiescent supply current (ICC) for a unit load of 1 is given in the family specifications. To determine ICC per input, multiply this value by the unit load coefficient shown in the table below.
INPUT nB nA nRD
UNIT LOAD COEFFICIENT 0.30 0.50 0.50
December 1990
8
Philips Semiconductors
Product specification
Dual non-retriggerable monostable multivibrator with reset
AC CHARACTERISTICS FOR 74HCT GND = 0 V; tr = tf = 6 ns; CL = 50 pF Tamb (C) 74HCT
SYMBOL
74HC/HCT221
TEST CONDITIONS UNIT VCC (V) 4.5 WAVEFORMS
PARAMETER
+25
-40 to +85
-40 to +125 min.
max.
min typ max min max. tPLH propagation delay (trigger) nA, nRD to nQ propagation delay (trigger) nB to nQ propagation delay (trigger) nA to nQ propagation delay (trigger) nB to nQ propagation delay (trigger) nRD to nQ propagation delay (reset) nRD to nQ propagation delay (reset) nRD to nQ output transition time trigger pulse width nA = LOW trigger pulse width nB = HIGH pulse width nRD = LOW output pulse width nQ = LOW nQ = HIGH trigger pulse width nQ or nQ trigger pulse width nQ or nQ 20 20 22 630 30 50 63
75
ns
CEXT = 0 pF; REXT = 5 k; Fig.10 CEXT = 0 pF; REXT = 5 k; Fig.10 CEXT = 0 pF; REXT = 5 k; Fig.10 CEXT = 0 pF; REXT = 5 k; Fig.10 CEXT = 0 pF; REXT = 5 k; Fig.10 CEXT = 0 pF; REXT = 5 k; Fig.11 CEXT = 0 pF; REXT = 5 k; Fig.11 Fig.10 Fig.10 Fig.10 Fig.8 CEXT = 100 nF; REXT = 10 k; Fig.10 CEXT = 28 pF; REXT = 2 k; Fig.10 CEXT = 1 nF; REXT = 2 k; Fig.10
tPLH
24
42
53
63
ns
4.5
tPHL
26
44
55
66
ns
4.5
tPHL
21
35
44
53
ns
4.5
tPHL
26
43
54
65
ns
4.5
tPHL
26
43
54
65
ns
4.5
tPLH
31
51
64
77
ns
4.5
tTHL/ tTLH tW tW tW tW
7 13 13 13
15 25 25 28 602
19 30 30 33 798 595
22
ns ns ns ns
4.5 4.5 4.5 4.5 5.0
700 770
805
s
tW
140
-
-
ns
4.5
tW
1.5
-
-
s
4.5
December 1990
9
Philips Semiconductors
Product specification
Dual non-retriggerable monostable multivibrator with reset
Tamb (C) 74HCT
SYMBOL
74HC/HCT221
TEST CONDITIONS UNIT VCC (V) 4.5 WAVEFORMS
PARAMETER
+25
-40 to +85 -
-40 to +125 min. -
max.
min typ max min max. tW trigger pulse width nQ or nQ removal time nRD to nA or nB external timing resistor external timing capacitor 20 2 no limits 7
s
CEXT = 1 nF; REXT = 10 k; Fig.10 Fig.9 Fig.13 Fig.13
trem REXT CEXT
12
25
1000 -
30 -
ns k pF
4.5 5.0 5.0
December 1990
10
Philips Semiconductors
Product specification
Dual non-retriggerable monostable multivibrator with reset
AC WAVEFORMS
74HC/HCT221
Fig.7 Output pulse control; nRD = HIGH.
(1) HC : VM = VM = 50%; VI = GND to VCC. HCT : VM = VM = 1.3 V; VI = GND to 3 V.
Fig.8
Output pulse control using reset input nRD; nA = LOW.
Fig.10 Waveforms showing the triggering of One Shot by input nA or input nB for one period (tW) and minimum pulse widths of the trigger inputs nA and nB.
(1) HC : VM = VM = 50%; VI = GND to VCC. HCT : VM = VM = 1.3 V; VI = GND to 3 V.
(1) HC : VM = VM = 50%; VI = GND to VCC. HCT : VM = VM = 1.3 V; VI = GND to 3 V.
Fig.9
Waveforms showing the removal times; nRD to nA or nB. 11
Fig.11 Waveforms showing the reset to nQ and nQ output propagation delays.
December 1990
Philips Semiconductors
Product specification
Dual non-retriggerable monostable multivibrator with reset
74HC/HCT221
Fig.12 HC typical output pulse width as a function of timing capacitance (VCC = 2 V).
December 1990
12
Philips Semiconductors
Product specification
Dual non-retriggerable monostable multivibrator with reset
74HC/HCT221
Fig.13 HC/HCT typical output pulse width as a function of timing capacitance (VCC = 4.5 V).
December 1990
13
Philips Semiconductors
Product specification
Dual non-retriggerable monostable multivibrator with reset
74HC/HCT221
Fig.14 HC typical output pulse width as a function of timing capacitance (VCC = 6 V).
December 1990
14
Philips Semiconductors
Product specification
Dual non-retriggerable monostable multivibrator with reset
74HC/HCT221
Fig.15 Typical output pulse width as a function of temperature; CX = 0.1 F; RX = 10 K; VCC = 5 V.
Fig.16 k factor as a function of supply voltage; RX = 10 K; Tamb = 25 C.
Power-down consideration A large capacitor (CX) may cause problems when powering-down the monostable due to the energy stored in this capacitor. When a system containing this device is powered-down or a rapid decrease of VCC to zero occurs, the monostable may substain damage, due to the capacitor discharging through the input protection diodes. To avoid this possibility, use a damping diode (DX) preferably a germanium or Schottky type diode able to withstand large current surges and connect as shown in Fig.17.
PACKAGE OUTLINES See "74HC/HCT/HCU/HCMOS Logic Package Outlines".
Fig.17 Power-down protection circuit.
December 1990
15
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