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| DISCRETE SEMICONDUCTORS DATA SHEET age M3D106 BSN304 N-channel enhancement mode vertical D-MOS transistor Product specification Supersedes data of 1997 Jun 17 2001 Dec 11 Philips Semiconductors Product specification N-channel enhancement mode vertical D-MOS transistor FEATURES * Direct interface to C-MOS, TTL, etc. * High-speed switching * No secondary breakdown. APPLICATIONS * Line current interruptor in telephone sets * Relay, high-speed and line transformer drivers. DESCRIPTION N-channel enhancement mode vertical D-MOS transistor in a TO-92 variant package. handbook, halfpage BSN304 PINNING - TO-92 variant PIN 1 2 3 gate drain source DESCRIPTION d 1 2 3 g MAM146 s Fig.1 Simplified outline and symbol. QUICK REFERENCE DATA SYMBOL VDS ID Ptot VGSO RDSon VGSoff PARAMETER drain-source voltage (DC) drain current (DC) total power dissipation gate-source voltage drain-source on-state resistance gate-source cut-off voltage Tamb 25 C open drain ID = 250 mA; VGS = 10 V ID = 1 mA; VGS = VDS CONDITIONS - - - - - 0.8 MIN. MAX. 300 300 1 20 6 2 V mA W V V UNIT LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134). SYMBOL VDS VGSO ID IDM Ptot Tstg Tj Note 1. Device mounted on an epoxy printed-circuit board, maximum lead length 4 mm; mounting pad for the drain lead minimum 10 mm x 10 mm. PARAMETER drain-source voltage (DC) gate-source voltage (DC) drain current (DC) peak drain current total power dissipation storage temperature operating junction temperature Tamb 25 C; note 1 open drain CONDITIONS - - - - - -55 - MIN. MAX. 300 20 300 1.2 1 +150 150 V V mA A W C C UNIT 2001 Dec 11 2 Philips Semiconductors Product specification N-channel enhancement mode vertical D-MOS transistor THERMAL CHARACTERISTICS SYMBOL Rth j-a Note PARAMETER thermal resistance from junction to ambient; note 1 VALUE 125 BSN304 UNIT K/W 1. Device mounted on an epoxy printed-circuit board, maximum lead length 4 mm; mounting pad for the drain lead minimum 10 mm x 10 mm. STATIC CHARACTERISTICS Tj = 25 C unless otherwise specified. SYMBOL V(BR)DSS IGSS VGSth RDSon IDSS Yfs Ciss Coss Crss PARAMETER drain-source breakdown voltage gate-source leakage current gate-source threshold voltage drain-source on-state resistance drain-source leakage current transfer admittance input capacitance output capacitance feedback capacitance CONDITIONS ID = 10 A; VGS = 0 VGS = 20 V; VDS = 0 ID = 1 mA; VDS = VGS ID = 250 mA; VGS = 10 V ID = 20 mA; VGS = 2.4 V VDS = 240 V; VGS = 0 ID = 250 mA; VDS = 25 V VDS = 25 V; VGS = 0; f = 1 MHz VDS = 25 V; VGS = 0; f = 1 MHz VDS = 25 V; VGS = 0; f = 1 MHz MIN. 300 - 0.8 - - - 200 - - - TYP. MAX. UNIT - - - 3.7 4.8 - 690 100 21 10 - 100 2 6 10 100 - 120 30 15 V nA V nA mS pF pF pF Switching times (see Figs 2 and 3) ton toff turn-on time turn-off time ID = 250 mA; VDD = 50 V; VGS = 0 to 10 V ID = 250 mA; VDD = 50 V; VGS = 10 to 0 V - - 6 46 10 60 ns ns 2001 Dec 11 3 Philips Semiconductors Product specification N-channel enhancement mode vertical D-MOS transistor BSN304 handbook, halfpage handbook, halfpage 90 % VDD = 50 V INPUT 10 % 90 % 10 V 0V ID 50 MSA631 OUTPUT 10 % ton toff MBB692 Fig.2 Switching times test circuit. Fig.3 Input and output waveforms. handbook, halfpage 1.2 MRC238 handbook, halfpage 250 MLD765 Ptot (W) 0.8 C (pF) 200 150 100 0.4 50 Ciss 0 0 50 100 150 200 Tamb (C) 0 0 10 20 Coss Crss VDS (V) 30 VGS = 0; f = 1 MHz; Tj = 25 C. Fig.4 Power derating curve. Fig.5 Capacitance as a function of drain-source voltage; typical values. 2001 Dec 11 4 Philips Semiconductors Product specification N-channel enhancement mode vertical D-MOS transistor BSN304 handbook, halfpage 1.2 MLD766 VGS = 10 V 5V 4V 3.5 V 3V handbook, halfpage 1.2 MLD767 ID (A) 0.8 ID (A) 0.8 0.4 2.5 V 0.4 2V 0 0 4 8 VDS (V) 12 0 0 2 4 6 8 10 VGS (V) Tj = 25 C. VDS = 10 V; Tj = 25 C. Fig.6 Typical output characteristics. Fig.7 Typical transfer characteristics. handbook, halfpage 30 MLD768 VGS = 2 V 2.5 V 3V 3.5 V handbook, halfpage 20 MLD769 RDSon () 20 RDSon () 15 10 10 5 4V 5V 10 V 0 10-1 1 ID (A) 10 0 0 2 4 6 8 10 VGS (V) Tj = 25 C. VDS = 100 mV; Tj = 25 C. Fig.8 Drain-source on-state resistance as a function of drain current; typical values. Fig.9 Drain-source on-state resistance as a function of gate-source voltage; typical values. 2001 Dec 11 5 Philips Semiconductors Product specification N-channel enhancement mode vertical D-MOS transistor BSN304 103 handbook, full pagewidth Zth j-a (K/W) 102 = 0.5 0.2 10 0.1 0.05 0.02 0.01 1 0 P MRC241 = tp T tp T t 10-1 10-5 10-4 10-3 10-2 10-1 1 10 102 tp (s) 103 Fig.10 Transient thermal resistance from junction to ambient as a function of pulse time. MLD770 handbook, halfpage 10 ID (A) 1 (1) tp = 10 s 100 s 1 ms 10 ms 10-1 P 10-2 tp 10-3 1 T 10 102 t = T tp DC 100 ms 1s VDS (V) 103 = 0.01; Tamb = 25 C. (1) RDSon limitation. Fig.11 SOAR curve. 2001 Dec 11 6 Philips Semiconductors Product specification N-channel enhancement mode vertical D-MOS transistor BSN304 handbook, halfpage 2 MLD771 handbook, halfpage 1.25 k MLD772 k 1.5 (1) 1 (2) 0.75 1 0.5 0.5 0.25 0 -50 0 50 100 Tj (C) 150 0 -50 0 50 100 Tj (C) 150 R DS ( on ) at T j k = -------------------------------------------- . R DS ( on ) at 25 C Typical RDSon; (1) ID = 250 mA; VGS = 10 V. (2) ID = 20 mA; VGS = 2.4 V. V GS ( th ) at T j k = -------------------------------------------. V GS ( th ) at 25 C Fig.12 Temperature coefficient of drain-source on-state resistance; typical values. Fig.13 Temperature coefficient of gate-source threshold voltage; typical values. 2001 Dec 11 7 Philips Semiconductors Product specification N-channel enhancement mode vertical D-MOS transistor PACKAGE OUTLINES Plastic single-ended leaded (through hole) package; 3 leads (on-circle) BSN304 SOT54 variant c L2 E d A L b 1 2 D e1 e 3 b1 L1 0 2.5 scale 5 mm DIMENSIONS (mm are the original dimensions) UNIT mm A 5.2 5.0 b 0.48 0.40 b1 0.66 0.56 c 0.45 0.40 D 4.8 4.4 d 1.7 1.4 E 4.2 3.6 e 2.54 e1 1.27 L 14.5 12.7 L1(1) max 2.5 L2 max 2.5 Notes 1. Terminal dimensions within this zone are uncontrolled to allow for flow of plastic and terminal irregularities. OUTLINE VERSION SOT54 variant REFERENCES IEC JEDEC TO-92 variant EIAJ SC-43 EUROPEAN PROJECTION ISSUE DATE 98-03-26 2001 Dec 11 8 Philips Semiconductors Product specification N-channel enhancement mode vertical D-MOS transistor DATA SHEET STATUS DATA SHEET STATUS(1) Objective data PRODUCT STATUS(2) Development DEFINITIONS BSN304 This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Changes will be communicated according to the Customer Product/Process Change Notification (CPCN) procedure SNW-SQ-650A. Preliminary data Qualification Product data Production Notes 1. Please consult the most recently issued data sheet before initiating or completing a design. 2. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. DEFINITIONS Short-form specification The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. DISCLAIMERS Life support applications These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. 2001 Dec 11 9 Philips Semiconductors Product specification N-channel enhancement mode vertical D-MOS transistor NOTES BSN304 2001 Dec 11 10 Philips Semiconductors Product specification N-channel enhancement mode vertical D-MOS transistor NOTES BSN304 2001 Dec 11 11 Philips Semiconductors - a worldwide company Contact information For additional information please visit http://www.semiconductors.philips.com. Fax: +31 40 27 24825 For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com. (c) Koninklijke Philips Electronics N.V. 2001 SCA73 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands 613510/03/pp12 Date of release: 2001 Dec 11 Document order number: 9397 750 09063 |
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