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TC7MH175FK TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC7MH175FK Quad D-Type Flip-Flop with Clear The TC7MH175FK is an advanced high speed CMOS quad D-type flip-flop fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent bipolar schottky TTL while maintaining the CMOS low power dissipation. These four flip-flops are controlled by a clock input (CK) and a clear input ( CLR ). The information data applied to the D inputs (D1 thru D4) are transferred to the outputs (Q1 thru Q4 and Q1 thru Q4 ) on the positive-going edge of the clock pulse. Weight: 0.02 g (typ.) When the CLR input is held low , the Q outputs are at the low logic level and the Q outputs are at the high logic level, regardless of other input conditions. An input protection circuit ensures that 0 to 7 V can be applied to the input pins without regard to the supply voltage. This device can be used to interface 5 V to 3 V systems and two supply systems such as battery back up. This circuit prevents device destruction due to mismatched supply and input voltages. Features * * * * * * * * High speed: fmax = 210 MHz (typ.) (VCC = 5 V) Low power dissipation: ICC = 4 A (max) (Ta = 25C) High noise immunity: VNIH = VNIL = 28% VCC (min) Power down protection is provided on all inputs. Balanced propagation delays: tpLH tpHL - Wide operating voltage range: VCC (opr) = 2~5.5 V Low noise: VOLP = 0.8 V (max) Pin and function compatible with 74ALS175 000630EBA1 * TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer, when utilizing TOSHIBA products, to comply with the standards of safety in making a safe design for the entire system, and to avoid situations in which a malfunction or failure of such TOSHIBA products could cause loss of human life, bodily injury or damage to property. In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the most recent TOSHIBA products specifications. Also, please keep in mind the precautions and conditions set forth in the "Handling Guide for Semiconductor Devices," or "TOSHIBA Semiconductor Reliability Handbook" etc.. * The Toshiba products listed in this document are intended for usage in general electronics applications (computer, personal equipment, office equipment, measuring equipment, industrial robotics, domestic appliances, etc.). These Toshiba products are neither intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a malfunction or failure of which may cause loss of human life or bodily injury ("Unintended Usage"). Unintended Usage include atomic energy control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments, medical instruments, all types of safety devices, etc.. Unintended Usage of Toshiba products listed in this document shall be made at the customer's own risk. * The products described in this document are subject to the foreign exchange and foreign trade laws. * The information contained herein is presented only as a guide for the applications of our products. No responsibility is assumed by TOSHIBA CORPORATION for any infringements of intellectual property or other rights of the third parties which may result from its use. No license is granted by implication or otherwise under any intellectual property or other rights of TOSHIBA CORPORATION or others. * The information contained herein is subject to change without notice. 2000-07-04 1/6 TC7MH175FK Pin Assignment (top view) IEC Logic Symbol (1) CLR (9) CK (4) (5) (12) (13) R C1 (2) (3) (7) (6) (10) (11) (15) (14) Q1 Q1 CLR 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 VCC Q4 Q4 Q1 Q1 D1 D2 D3 D4 1D Q2 Q2 D1 D2 Q2 D4 D3 Q3 Q3 Q3 Q4 Q4 Q2 GND Q3 CK Truth Table Inputs CLR Outputs CK X Q L L H Qn Q Function H H L Qn D X L H X L H H H Clear No change X: Don't care System Diagram D1 4 D2 5 D3 12 D4 13 CLR 1 D R Q D R Q D R Q D R Q CK CK 9 Q CK Q CK Q CK Q 2 3 Q1 Q1 7 6 Q2 Q2 10 11 Q3 Q3 15 14 Q4 Q4 2000-07-04 2/6 TC7MH175FK Maximum Ratings Characteristics Supply voltage range DC input voltage DC output voltage Input diode current Output diode current DC output current DC VCC/ground current Power dissipation Storage temperature Symbol VCC VIN VOUT IIK IOK IOUT ICC PD Tstg Rating -0.5~7.0 -0.5~7.0 -0.5~VCC + 0.5 -20 20 25 50 180 -65~150 Unit V V V mA mA mA mA mW C Recommended Operating Conditions Characteristics Supply voltage Input voltage Output voltage Operating temperature Input rise and fall time Symbol VCC VIN VOUT Topr dt/dv Rating 2.0~5.5 0~5.5 0~VCC -40~85 0~100 (VCC = 3.3 0.3 V) 0~20 (VCC = 5 0.5 V) Unit V V V C ns/V Electrical Characteristics DC Characteristics Characteristics Symbol Test Condition VCC (V) 2.0 High level Input voltage 2.0 Low level VIL 3.0~5.5 2.0 VIN = VIH or VIL IOH = -50 A IOH = -4 mA Output voltage IOH = -8 mA IOL = 50 A 3.0 4.5 3.0 4.5 2.0 3.0 4.5 IOL = 4 mA IOL = 8 mA Input leakage current Quiescent supply current IIN ICC VIN = 5.5 V or GND VIN = VCC or GND 3.0 4.5 0~5.5 5.5 VIN = VIH or VIL VIH 3.0~5.5 Min 1.50 VCC x 0.7 1.9 2.9 4.4 2.58 3.94 Ta = 25C Typ. 2.0 3.0 4.5 0 0 0 Max 0.50 VCC x 0.3 0.1 0.1 0.1 0.36 0.36 0.1 4.0 Ta = -40~85C Min 1.50 VCC x 0.7 1.9 2.9 4.4 2.48 3.80 Max V 0.50 VCC x 0.3 0.1 0.1 0.1 0.44 0.44 1.0 40.0 A A V Unit High level VOH Low level VOL 2000-07-04 3/6 TC7MH175FK Timing Requirements (Input: tr = tf = 3 ns) Characteristics Minimum pulse width (CK) Minimum pulse width ( CLR ) Minimum set-up time Symbol Test Condition VCC (V) tw (L) tw (H) tw (L) 3.3 0.3 5.0 0.5 3.3 0.3 5.0 0.5 3.3 0.3 5.0 0.5 3.3 0.3 5.0 0.5 3.3 0.3 5.0 0.5 Ta = 25C Typ. Limit 5.0 5.0 5.0 5.0 5.0 4.0 1.0 1.0 5.0 5.0 Ta = -40~85C Limit 5.0 5.0 5.0 5.0 5.0 4.0 1.0 1.0 5.0 5.0 ns ns ns ns ns Unit ts Minimum hold time Minimum removal time ( CLR ) th trem AC Characteristics (Input: tr = tf = 3 ns) Characteristics Symbol Test Condition VCC (V) CL (pF) 3.3 0.3 tpLH tpHL 5.0 0.5 15 50 15 50 15 50 15 50 15 50 15 50 50 50 Min 90 50 150 85 (Note2) Ta = 25C Typ. 7.5 10.0 4.8 6.3 6.3 8.8 4.3 5.8 140 75 210 115 4 44 Max 11.5 15.0 7.3 9.3 10.1 13.6 6.4 8.4 1.5 1.0 10 Ta = -40~85C Min 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 75 45 125 75 Max 13.5 17.0 8.5 10.5 12.0 15.5 ns 7.5 9.5 1.5 1.0 10 pF pF ns MHz ns Unit Propagation delay time (CK-Q) Propagation delay time ( CLR -Q) tpHL 3.3 0.3 5.0 0.5 3.3 0.3 Maximum clock frequency fmax 5.0 0.5 tosLH tosHL CIN CPD 3.3 0.3 5.0 0.5 Output to output skew Input capacitance Power dissipation capacitance (Note1) Note1: Parameter guaranteed by design. tosLH = |tpLHm - tpLHn|, tosHL = |tpHLm - tpHLn| Note2: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC (opr) = CPD VCC fIN + ICC/4 (per bit) And the total CPD when n pcs of flip-flop operate can be gained by the following equation: CPD (total) = 30 + 14 n 2000-07-04 4/6 TC7MH175FK Noise Characteristics (Input: tr = tf = 3 ns) Characteristics Quiet output maximum dynamic VOL Quiet output minimum dynamic VOL Minimum high level dynamic input voltage VIH Maximum low level dynamic input voltage VIL Symbol VOLP VOLV VIHD VILD Test Condition VCC (V) CL = 50 pF CL = 50 pF CL = 50 pF CL = 50 pF 5.0 5.0 5.0 5.0 Ta = 25C Typ. 0.4 -0.4 Limit 0.8 -0.8 3.5 1.5 V V V V Unit Input Equivalent Circuit Input 2000-07-04 5/6 TC7MH175FK Package Dimensions Weight: 0.02 g (typ.) 2000-07-04 6/6 |
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