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| TC7MH595FK TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC7MH595FK 8-Bit Shift Register/Latch (3-State) The TC7MH595FK is an advanced high speed 8 bit shift register/latch fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent bipolar schottky TTL while maintaining the CMOS low power dissipation. The TC7MH595FK contains an 8 bit static shift register which feeds an 8 bit storage register. Shift operation is accomplished on the positive going transition of the SCK input. The output register is loaded with the contents of the shift register on the positive going transition of the RCK Weight: 0.02 g (typ.) input. Since RCK and SCK signal are independent, parallel outputs can be held stable during the shift operation. And, since the parallel outputs are 3-state, it can be directly connected to 8 bit bus. This register can be used in serial-to-parallel conversion, data receivers, etc. An input protection circuit ensures that 0 to 7 V can be applied to the input pins without regard to the supply voltage. This device can be used to interface 5 V to 3 V systems and two supply systems such as battery back up. This circuit prevents device destruction due to mismatched supply and input voltages. Features * * * * * * * * High speed: fmax = 185 MHz (typ.) (VCC = 5 V) Low power dissipation: ICC = 4 A (max) (Ta = 25C) High noise immunity: VNIH = VNIL = 28% VCC (min) Power down protection is provided on all inputs. Balanced propagation delays: tpLH tpHL - Wide operating voltage range: VCC (opr) = 2~5.5 V Low noise: VOLP = 1.0 V (max) Pin and function compatible with 74ALS595 000630EBA1 * TOSHIBA is continually working to improve the quality and reliability of its products. Nevertheless, semiconductor devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer, when utilizing TOSHIBA products, to comply with the standards of safety in making a safe design for the entire system, and to avoid situations in which a malfunction or failure of such TOSHIBA products could cause loss of human life, bodily injury or damage to property. In developing your designs, please ensure that TOSHIBA products are used within specified operating ranges as set forth in the most recent TOSHIBA products specifications. Also, please keep in mind the precautions and conditions set forth in the "Handling Guide for Semiconductor Devices," or "TOSHIBA Semiconductor Reliability Handbook" etc.. * The Toshiba products listed in this document are intended for usage in general electronics applications (computer, personal equipment, office equipment, measuring equipment, industrial robotics, domestic appliances, etc.). These Toshiba products are neither intended nor warranted for usage in equipment that requires extraordinarily high quality and/or reliability or a malfunction or failure of which may cause loss of human life or bodily injury ("Unintended Usage"). Unintended Usage include atomic energy control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments, medical instruments, all types of safety devices, etc.. Unintended Usage of Toshiba products listed in this document shall be made at the customer's own risk. * The products described in this document are subject to the foreign exchange and foreign trade laws. * The information contained herein is presented only as a guide for the applications of our products. No responsibility is assumed by TOSHIBA CORPORATION for any infringements of intellectual property or other rights of the third parties which may result from its use. No license is granted by implication or otherwise under any intellectual property or other rights of TOSHIBA CORPORATION or others. * The information contained herein is subject to change without notice. 2000-07-04 1/8 TC7MH595FK Pin Assignment (top view) IEC Logic Symbol G QB QC QD QE QF QG QH GND 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 VCC QA RCK SCLR (13) (12) (10) (11) (14) SI G SCK SI EN3 C2 SRG8 R C/1 1D 2D 3 (15) (1) (2) (3) (4) (5) (6) (7) (9) QA QB QC QD QE QF QG QH QH' RCK SCK SCLR QH' 2D 3 Truth Table Inputs SI X X X L H X X X X X SCK X X X SCLR Function RCK X X X X X X G X X L H H H X X H L X X X X X X QA thru QH outputs disable QA thru QH outputs enable Shift register is cleared. First stage of S.R. becomes "L". Other stages store the data of previous stage, respectively. First stage of S.R. becomes "H". Other stages store the data of previous stage, respectively. State of S.R. is not changed. S.R. data is stored into storage register. Storage register stage is not changed. X: Don't care 2000-07-04 2/8 TC7MH595FK Timing Chart SCK SI RCK SCLR G QA QB QC QD QE QF QG QH QH' System Diagram 10 SCLR 14 SI R DQ R DQ R DQ R DQ R DQ R DQ R DQ R DQ QH' 9 SCK 11 SCK SCK SCK SCK SCK SCK SCK SCK DQ DQ DQ DQ DQ DQ DQ DQ RCK 12 RCK RCK RCK RCK RCK RCK RCK RCK 13 G 15 QA 1 QB 2 QC 3 QD 4 QE 5 QF 6 QG 7 QH 2000-07-04 3/8 TC7MH595FK Maximum Ratings Characteristics Supply voltage range DC input voltage DC output voltage Input diode current Output diode current DC output current DC VCC/ground current Power dissipation Storage temperature Symbol VCC VIN VOUT IIK IOK IOUT ICC PD Tstg Rating -0.5~7.0 -0.5~7.0 -0.5~VCC + 0.5 -20 20 25 75 180 -65~150 Unit V V V mA mA mA mA mW C Recommended Operating Conditions Characteristics Supply voltage Input voltage Output voltage Operating temperature Input rise and fall time Symbol VCC VIN VOUT Topr dt/dv Rating 2.0~5.5 0~5.5 0~VCC -40~85 0~100 (VCC = 3.3 0.3 V) 0~20 (VCC = 5 0.5 V) Unit V V V C ns/V 2000-07-04 4/8 TC7MH595FK Electrical Characteristics DC Characteristics Characteristics Symbol Test Condition VCC (V) 2.0 High level Input voltage 2.0 Low level VIL 3.0~5.5 2.0 VIN = VIH or VIL IOH = -50 A 3.0 4.5 IOH = -4 mA Output voltage VIN = VIH or VIL IOH = -8 mA IOL = 50 A IOL = 4 mA IOL = 8 mA 3-state output off-state current Input leakage current Quiescent supply current IOZ IIN ICC VIN = VIH or VIL VOUT = VCC or GND VIN = 5.5 V or GND VIN = VCC or GND 3.0 4.5 2.0 3.0 4.5 3.0 4.5 5.5 0~5.5 5.5 VIH 3.0~5.5 Min 1.50 VCC x 0.7 1.9 2.9 4.4 2.58 3.94 Ta = 25C Typ. 2.0 3.0 4.5 0 0 0 Max 0.50 VCC x 0.3 0.1 0.1 0.1 0.36 0.36 0.25 0.1 4.0 Ta = -40~85C Min 1.50 VCC x 0.7 1.9 2.9 4.4 2.48 3.80 Max V 0.50 VCC x 0.3 0.1 0.1 0.1 0.44 0.44 2.50 1.0 40.0 A A A V Unit High level VOH Low level VOL Timing Requirements (Input: tr = tf = 3 ns) Characteristics Minimum pulse width (SCK, RCK) Minimum pulse width ( SCLR ) Minimum set-up time (SI-SCK) Minimum set-up time (SCK-RCK) Minimum set-up time ( SCLR -RCK) Minimum hold time (SI-SCK) Minimum hold time (SCK-RCK, SCLR -RCK) Minimum removal time ( SCLR ) Symbol tw (H) tw (L) Test Condition VCC (V) 3.3 0.3 5.0 0.5 3.3 0.3 5.0 0.5 3.3 0.3 5.0 0.5 3.3 0.3 5.0 0.5 3.3 0.3 5.0 0.5 3.3 0.3 5.0 0.5 3.3 0.3 5.0 0.5 3.3 0.3 5.0 0.5 Ta = 25C Typ. Limit 5.0 5.0 5.0 5.0 3.5 3.0 8.0 5.0 8.0 5.0 1.5 2.0 0 0 3.0 2.5 Ta = -40~85C Limit 5.0 5.0 5.0 5.0 3.5 3.0 8.5 5.0 9.0 5.0 1.5 2.0 0 0 3.0 2.5 ns ns ns ns ns ns ns ns Unit tw (L) ts ts ts th th trem 2000-07-04 5/8 TC7MH595FK AC Characteristics (Input: tr = tf = 3 ns) Characteristics Symbol Test Condition VCC (V) CL (pF) 3.3 0.3 tpLH tpHL 5.0 0.5 15 50 15 50 15 50 15 50 15 50 15 50 15 50 15 50 50 50 15 50 15 50 Min 80 55 135 95 (Note) Ta = 25C Typ. 8.8 11.3 6.2 7.7 8.4 10.9 5.9 7.4 7.7 10.2 5.4 6.9 7.5 9.0 4.8 8.3 12.1 7.6 150 130 185 155 4 6 87 Max 13.0 16.5 8.2 10.2 12.8 16.3 8.0 10.0 11.9 15.4 7.4 9.4 11.5 15.0 8.6 10.6 15.7 10.3 10 Ta = -40~85C Min 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 70 50 115 85 Max 15.0 18.5 9.4 11.4 13.7 17.2 9.1 11.1 13.5 17.0 8.5 10.5 13.5 17.0 10.0 12.0 16.2 11.0 10 pF pF pF MHz ns ns ns ns ns Unit Propagation delay time (SCK-QH') Propagation delay time ( SCLR -QH') tpHL 3.3 0.3 5.0 0.5 Propagation delay time (RCK-Qn) 3.3 0.3 tpLH tpHL 5.0 0.5 Output enable time tpZL tpZH 3.3 0.3 RL = 1 k 5.0 0.5 3.3 0.3 5.0 0.5 3.3 0.3 Output disable time tpLZ tpHZ RL = 1 k Maximum clock frequency fmax 5.0 0.5 Input capacitance Output capacitance Power dissipation capacitance CIN COUT CPD Note: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC (opr) = CPD VCC fIN + ICC 2000-07-04 6/8 TC7MH595FK Noise Characteristics (Input: tr = tf = 3 ns) Characteristics Quiet output maximum dynamic VOL Quiet output minimum dynamic VOL Minimum high level dynamic input voltage VIH Maximum low level dynamic input voltage VIL Symbol VOLP VOLV VIHD VILD Test Condition VCC (V) CL = 50 pF CL = 50 pF CL = 50 pF CL = 50 pF 5.0 5.0 5.0 5.0 Ta = 25C Typ. 0.8 -0.8 Limit 1.0 -1.0 3.5 1.5 V V V V Unit Input Equivalent Circuit Input 2000-07-04 7/8 TC7MH595FK Package Dimensions Weight: 0.02 g (typ.) 2000-07-04 8/8 |
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