View ICS65021_986738.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

ICS650-21
System Periperhal Clock Source
Description
The ICS650-21 is a low cost, low-jitter, high-performance clock synthesizer for system peripheral applications. Using analog/digital Phase Locked Loop (PLL) techniques, the device accepts a parallel resonant 25 MHz crystal input to produce up to eight output clocks. The device provides clocks for PCI, SCSI, Fast Ethernet, Ethernet, USB, and AC97. The user can select one of three USB frequencies and also one of two AC97 audio frequencies. The OE pin puts all outputs into a high-impedance state for board level testing. All frequencies are generated with less than one ppm error, meeting the demands of SCSI and Ethernet clocking.
Features
* * * * * * * * * * * * * *
Packaged in 20-pin tiny SSOP (QSOP) Available in Pb (lead) free package Lower jitter version of ICS650-01 Operating voltage of 3.3 V or 5 V Zero ppm synthesis error in all clocks Inexpensive 25 MHz crystal or clock input Provides Ethernet and Fast Ethernet clocks Provides SCSI clocks Provides PCI clocks Selectable AC97 audio clock Selectable USB clock OE pin tri-states the outputs for testing Selectable frequencies on three clocks Duty cycle of 45/55 for Processor clock and Audio clock
* Advanced, low-power CMOS process * Industrial temperature range available
Block Diagram
VDD 3
PSEL1:0 ASEL USEL
2
3
Processor Clocks Audio Clock USB Clock 20 MHz
Clock Synthesis Circuitry
X1/ICLK 25 MHz Crystal or Clock Crystal Oscillator X2 2 Optional crystal capacitors GND OE (all outputs)
25 MHz
MDS 650-21 E
1
Revision 052605
Integrated Circuit Systems, Inc. 525 Race Street, San Jose, CA 95126 tel (408) 297-1201 www.icst.com
ICS650-21 System Periperhal Clock Source
Pin Assignment
USEL X2 X1/ICLK VDD VDD GND UCLK 20M ACLK 25M 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 PSEL1 PSEL0 PCLK2 PCLK3 VDD ASEL GND OFF/14.318M PCLK1 OE
Processor Clock (MHz)
PSEL1 0 0 0 M M M 1 1 1 PSEL0 0 M 1 0 M 1 0 M 1 PCLK1 25 37.5 66.66 40 33.3333 20 20 20 50 PCLK2, 3 50 75 133.33 80 66.6667 40 33.3333 66.6667 100
20-pin (150 mil) SSOP
USB Clock (MHz)
USEL 0 M 1 UCLK 12 24 48
Audio Clock (MHz)
ASEL 0 M 1 ACLK 49.152 24.576 14.318
0 = connect directly to ground 1 = connect directly to VDD M = leave unconnected (floating)
Pin Descriptions
Pin Number
1 2 3 4 5 6 7 8 9 10 11 12 13
Pin Name
USEL X2 X1/ICLK VDD VDD GND UCLK 20M ACLK 25M OE PCLK1 OFF/14.318M
Pin Type
Input XO XI Power Power Power Output Output Output Output Input Output Output
Pin Description
UCLK select pin. Determines frequency of USB clock per table above. Crystal connection. Connect to parallel mode 25 MHz crystal. Leave open for clock. Crystal connection. Connect to parallel mode 25 MHz crystal or clock. Connect to VDD. Must be same value as other VDD. Decouple with pin 6. Connect to VDD. Must be same value as other VDD. Connect to ground. USB clock output per table above. Fixed 20 MHz output for Ethernet. AC97 audio clock output per table above. Fixed 25 MHz reference output for Fast Ethernet. Output enable. Tri-states all outputs when low. PCLK output number 1 per table above. 14.31818 MHz clock output only when ASEL = VDD.
MDS 650-21 E
2
Revision 052605
Integrated Circuit Systems, Inc. 525 Race Street, San Jose, CA 95126 tel (408) 297-1201 www.icst.com
ICS650-21 System Periperhal Clock Source
Pin Number
14 15 16 17 18 19 20
Pin Name
GND ASEL VDD PCLK3 PCLK2 PSEL0 PSEL1
Pin Type
Power Input Power Output Output Input Input Connect to ground.
Pin Description
ACLK select pin. Determines frequency of audio clock per table above. Connect to VDD. Must be same value as other VDD. Decouple with pin 14. PCLK output number 3 per table above. PCLK output number 2 per table above. Processor select pin #0. Determines frequencies on PCLKs 1-3 per table above. Processor select pin #1. Determines frequencies on PCLKs 1-3 per table above.
External Components
The ICS650-21 requires a minimum number of external components for proper operation. with the clock line, as close to the clock output pin as possible. The nominal impedance of the clock output is 20.
Decoupling Capacitor
Decoupling capacitors of 0.01F must be connected between each VDD and GND (pins 4 and 6, pins 16 and 14), as close to the device as possible. For optimum device performance, the decoupling capacitor should be mounted on the component side of the PCB. Avoid the use of vias in the decoupling circuit.
Crystal Information
The crystal used should be a fundamental mode (do not use third overtone), parallel resonant. Crystal capacitors should be connected from pins X1 to ground and X2 to ground to optimize the initial accuracy. The value of these capacitors is given by the following equation: Crystal caps (pF) = (CL - 6) x 2 In the equation, CL is the crystal load capacitance. So, for a crystal with a 16pF load capacitance, two 20 pF [(16-6) x 2] capacitors should be used.
Series Termination Resistor
When the PCB trace between the clock outputs and the loads are over 1 inch, series termination should be used. To series terminate a 50 trace (a commonly used trace impedance) place a 33 resistor in series
MDS 650-21 E
3
Revision 052605
Integrated Circuit Systems, Inc. 525 Race Street, San Jose, CA 95126 tel (408) 297-1201 www.icst.com
ICS650-21 System Periperhal Clock Source
Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the ICS650-21. These ratings, which are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical parameters are guaranteed only over the recommended operating temperature range.
Item
Supply Voltage, VDD All Inputs and Outputs Ambient Operating Temperature Storage Temperature Junction Temperature Soldering Temperature 7V
Rating
-0.5 V to VDD+0.5 V 0 to +70C -65 to +150C 175C 260C
Recommended Operation Conditions
Parameter
Ambient Operating Temperature Power Supply Voltage (measured in respect to GND)
Min.
0 +3.0
Typ.
+3.3
Max.
+70 +5.5
Units
C V
DC Electrical Characteristics
Unless stated otherwise, VDD = 3.3V 5%, Ambient Temperature 0 to +70C
Parameter
Operating Voltage Supply Current Input High Voltage Input Low Voltage Output High Voltage Output High Voltage Output Low Voltage Short Circuit Current Input Capacitance, inputs
Symbol
VDD IDD VIH VIL VOH VOH VOL IOS
Conditions
No load, Note 1 Select inputs, OE Select inputs, OE IOH = -8 mA IOH = -8 mA IOL = 8 mA CLK output Except X1
Min.
3.0
Typ.
30
Max.
5.5
Units
V mA V
2 0.8 VDD-0.4 2.4 0.4 50 5
V V V V mA pF
Note 1: With all clocks at highest frequencies
MDS 650-21 E
4
Revision 052605
Integrated Circuit Systems, Inc. 525 Race Street, San Jose, CA 95126 tel (408) 297-1201 www.icst.com
ICS650-21 System Periperhal Clock Source
AC Electrical Characteristics
Unless stated otherwise, VDD = 3.3V 5%, Ambient Temperature 0 to +70 C
Parameter
Input Frequency Output Clocks Accuracy (synthesis error) Output Rise Time Output Fall Time Output Clock Duty Cycle
Symbol
Conditions
All clocks
Min.
Typ.
25
Max. Units
MHz 1 ppm ns ns 60 55 % % ps ps 500 ps
tOR tOF
0.8 to 2.0 V, Note 2 2.0 to 0.8 V, Note 2 UCLK, at VDD/2 PCLCK, ACLCK, at VDD/2 40 45
1.5 1.5 50 50 75 120 -500
One Sigma Jitter Absolute Clock Period Jitter Note 1: Values dependent on programming Note 2: Measured with 15 pF load
except ACLK ACLK UCLK, 20M
Thermal Characteristics
Parameter
Thermal Resistance Junction to Ambient
Symbol
JA JA JA JC
Conditions
Still air 1 m/s air flow 3 m/s air flow
Min.
Typ.
135 93 78 60
Max. Units
C/W C/W C/W C/W
Thermal Resistance Junction to Case
Marking Diagram
20 11
650R-21 ###### YYWW$$
1
Notes: 1. ###### is the lot code. 2. YYWW is the last two digits of the year, and the week number that the part was assembled.
10
MDS 650-21 E
5
Revision 052605
Integrated Circuit Systems, Inc. 525 Race Street, San Jose, CA 95126 tel (408) 297-1201 www.icst.com
ICS650-21 System Periperhal Clock Source
MDS 650-21 E
6
Revision 052605
Integrated Circuit Systems, Inc. 525 Race Street, San Jose, CA 95126 tel (408) 297-1201 www.icst.com
ICS650-21 System Periperhal Clock Source
Package Outline and Package Dimensions (20-pin SSOP, 150 Mil. Body)
Package dimensions are kept current with JEDEC Publication No. 95
20
Millimeters Symbol
E1 E
Inches Min Max
Min
Max
INDEX AREA
12 D
A 2 A 1
A
A A1 A2 b C D E E1 e L
1.35 1.75 0.10 0.25 -1.50 0.20 0.30 0.18 0.25 8.55 8.75 5.80 6.20 3.80 4.00 0.635 Basic 0.40 1.27 0 8
.053 .069 .0040 .010 -.059 0.008 0.012 .007 .010 .337 .344 .228 .244 .150 .157 0.025 Basic .016 .050 0 8
c
-Ce
b SEATING PLANE L
.10 (.004)
C
Ordering Information
Part / Order Number
ICS650R-21 ICS650R-21T ICS650R-21LF ICS650R-21LFT ICS650R-21I ICS650R-21IT ICS650R-21ILF ICS650R-21ILFT
Marking
ICS650R-21 ICS650R-21 ICS650R-21L ICS650R-21L ICS650R-21I ICS650R-21I 650R-21ILF 650R-21ILF
Shipping Packaging
Tubes Tape and Reel Tubes Tape and Reel Tubes Tape and Reel Tubes Tape and Reel
Package
20-pin SSOP 20-pin SSOP 20-pin SSOP 20-pin SSOP 20-pin SSOP 20-pin SSOP 20-pin SSOP 20-pin SSOP
Temperature
0 to +70 C 0 to +70 C 0 to +70 C 0 to +70 C -40 to 85 C -40 to 85 C -40 to 85 C -40 to 85 C
Parts that are ordered with a "LF" suffix to the part number are the Pb-Free configuration and are RoHS compliant. While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems (ICS) assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical medical instruments.
MDS 650-21 E
7
Revision 052605
Integrated Circuit Systems, Inc. 525 Race Street, San Jose, CA 95126 tel (408) 297-1201 www.icst.com

▲Up To Search▲

Price & Availability of ICS65021

	To Download ICS65021 Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .