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LP3994 CMOS Voltage Regulator with Enable Control
PRELIMINARY
June 2004
LP3994 50mA CMOS Voltage Regulator with Enable Contol
General Description
The LP3994 regulator provides 1.5V and 1.8V outputs options at up to 50mA load current suitable for Bluetooth applications. Other voltage options up to 3.3V are available for general use within the range of portable, battery-powered equipment. The LP3994 provides an accurate output voltage with low quiescent current at full current. Good noise performance is obtained without a Noise Bypass Capacitor. The low quiescent current in operation can be reduced to virtually zero when the device is disabled via a logic signal to the enable input. In conjuction with small space saving capacitors, the small package size of the microSMD devices results in a regulator solution with a very small footprint for any given application. The LP3994 also features short-circuit and thermalshutdown protection. Performance is specified for a -40C to 125C temperature range. This device is available with output voltages of 1.5V and 1.8V in both microSMD and LLP packages, however other voltages and alternative packages may be made available, please contact your local NSC sales office.
Key Specifications
n n n n n n n n Input Voltage Range Output Voltage Range Output Current Noise Figure PSRR Fast Startup Output Capacitor Virtually Zero IQ(Disabled) 2.5 to 5.5V 1.5 to 3.3V 50mA 95VRMS 70dB 10s 1F Low ESR 0.001A
Package
Tiny 4 Pin micro SMD 6 pin LLP 1014m by 1014m by 600m SOT23 footprint
Applications
n Bluetooth Devices n Battery Powered Devices n Portable Information Appliances
Features
n n n n n n 4 Pin MicroSMD Package/ 6 Pin LLP No Noise Bypass Capacitor Required Logic Controlled Enable Stable with Low ESR Ceramic Capacitors Fast turn ON Thermal-Overload and Short Circuit Protection
Typical Application Circuit
20046501
(c) 2004 National Semiconductor Corporation
DS200465
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LP3994
Pin Descriptions
Packages micro SMD-4 and LLP-6 Pin No micro SMD A1 B1 B2 A2 Symbol Pin No LLP 5 2 1 6 3 4 VEN GND VOUT VIN Enable Input; Enables the Regulator when 1.2V Disables the Regulator when 0.4V Common Ground Voltage output. A 1.0F Low ESR Capacitor should be connected to this Pin. Connect this output to the load circuit. Voltage Supply Input. A 1.0F capacitor should be connected at this input. No Connection. Do not connect to any other device pins. No Connection. Do not connect to any other device pins. Name and Function
Connection Diagrams
20046502
micro SMD-4 Package Top View See NS package number TLA04 LLP- 6 Package (SOT23 footprint)
20046507
Top View See NS Package Number LDE06A
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LP3994
Ordering Information
For micro SMD Package Please contact Sales Office for Availability Output Voltage (V) 1.5 1.8 Grade STD STD LP3994 Supplied as 1000 Units, Tape and Reel LP3994TL-1.5 LP3994TL-1.8 LP3994 Supplied as 3000 Units, Tape and Reel LP3994TLX-1.5 LP3994TLX-1.8
For microSMD Package (Lead Free) Please contact Sales Office for Availability Output Voltage (V) 1.5 1.8 Grade STD STD LP3994 Supplied as 1000 Units, Tape and Reel LP3994TL-1.5NOPB LP3994TL-1.8NOPB For LLP Package Please contact Sales Office for Availability Output Voltage (V) 1.5 1.8 Grade STD STD LP3994 Supplied as 1000 Units, Tape and Reel LP3994LD-1.5 LP3994LD-1.8 LP3994 Supplied as 3000 Units, Tape and Reel LP3994LDX-1.5 LP3994LDX-1.8 Package Marking L028B L029B LP3994 Supplied as 3000 Units, Tape and Reel LP3994TLX-1.5NOPB LP3994TLX-1.8NOPB
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LP3994
Absolute Maximum Ratings
(Notes 1, 2) If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Input Voltage Output Voltage Enable Input Voltage Junction Temperature Lead Temp. microSMD LLP Storage Temperature Continuous Power Dissipation(Note 3) 260C 235oC -65 to 150C -0.3 to 6.5V -0.3 to (VIN + 0.3V) to 6.5V (max) -0.3 to (VIN + 0.3V) to 6.5V (max) 150C
ESD Rating (Note 4) Human Body Model Machine Model 2KV 200V
Operating Conditions(Note 1)
Input Voltage Enable Input Voltage Junction Temperature (TJ) Range Ambient Temperature (TA) Range (Note 5) 2.5 to 5.5V 0 to (VIN + 0.3V) -40C to 125C -40 to 85oC
Thermal Properties
Junction to Ambient Thermal Resistance(Note 6) JA microSMD package JA LLP package 220oC/W 88oC/W
Internally Limited
Electrical Characteristics(Notes 2, 7)
Unless otherwise noted, VEN = 1.2, VIN = VOUT + 1.0V, CIN = 1 F, IOUT = 1 mA, COUT = 1 F. Typical values and limits appearing in normal type apply for TJ = 25C. Limits appearing in boldface type apply over the full temperature range for operation, -40 to +125C. (Notes 13, 14) Symbol VIN Parameter Input Voltage Output Voltage Tolerance VOUT Line Regulation Error Load Regulation Error IQ Quiescent Current Over full line and load regulation. VIN = (VOUT(NOM) + 1.0V) to 5.5V, IOUT = 1mA IOUT = 1mA to 50mA microSMD: LLP: Quiescent Current(Disabled) Device Output: VOUT > 1.8V VIN VOUT Input Voltage Output Voltage Tolerance Line Regulation Error Load Regulation Error Dropout Voltage (where applicable) IQ Quiescent Current Over full line and load regulation. VIN = (VOUT(NOM) + 1.0V) to 5.5V, IOUT = 1mA IOUT = 1mA to 50mA IOUT = 1mA IOUT = 50mA microSMD: LLP: Quiescent Current(Disabled) Full VOUT RANGE ILOAD ISC Load Current Short Circuit Current Limit (Notes 8, 9) (Note 12) 0 235 A mA VEN = 0.4V IOUT = 0mA IOUT = 50mA IOUT = 0mA IOUT = 50mA 2.5 -90 0.005 100 1.5 75 18 22 20 22 0.001 5.5 +90 0.1 500 4.5 140 50 60 55 65 1.5 A V mV %/V V/mA mV VEN = 0.4V IOUT = 0mA IOUT = 50mA IOUT = 0mA IOUT = 50mA Conditions Min 2.5 -60 0.005 100 15 22 15 25 0.001 Typ Max 5.5 +60 0.07 400 35 50 40 65 1.5 A Units V mV %/V V/mA Device Output: VOUT 1.8V
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LP3994
Electrical Characteristics(Notes 2, 7)
(Continued) Unless otherwise noted, VEN = 1.2, VIN = VOUT + 1.0V, CIN = 1 F, IOUT = 1 mA, COUT = 1 F. Typical values and limits appearing in normal type apply for TJ = 25C. Limits appearing in boldface type apply over the full temperature range for operation, -40 to +125C. (Notes 13, 14) Symbol Parameter Power Supply Rejection Ratio Conditions f = 100Hz, IOUT = 1mA to 50mA f = 50kHz, IOUT = 1mA to 50mA f = 1MHz, IOUT = 1mA f = 1MHz, IOUT = 50mA Min Typ 70 30 50 40 95 160 20 VEN = 0.0V and VIN = 5.5V VIN = 2.5V to 5.5V VIN = 2.5V to 5.5V 10 to 90% of VOUT(NOM) (Note 10) To 95% Level (Note 11) Line Transient Response |VOUT| Figure 1 (Note 9) Load Transient Response |VOUT| Figure 2 (Note 9) 1.2 10 35 20 100 20 70 mV VRMS C dB Max Units
PSRR
EEN
Output noise Voltage (Note 9)
BW = 100Hz to 100kHz, VIN = 4.2V, IOUT = 1mA
TSHUTDOWN Thermal Shutdown Temperature Thermal Shutdown Hysteresis Enable Control Characteristics IEN VIL VIH TON1 TON2 Transient Response Maximum Input Current at VEN Input Low Input Threshold High Input Threshold Turn On Time (Note 9)
0.015 0.4
A V V
Timing Characteristics S
Note 1: Absolute Maximum Ratings are limits beyond which damage can occur. Operating Ratings are conditions under which operation of the device is guaranteed. Operating Ratings do not imply guaranteed performance limits. For guaranteed performance limits and associated test conditions, see the Electrical Characteristics tables. Note 2: All Voltages are with respect to the potential at the GND pin. Note 3: Internal thermal shutdown circuitry protects the device from permanent damage Note 4: The human body is 100pF discharge through 1.5kW resistor into each pin. The machine model is a 200 pF capacitor discharged directly into each pin. Note 5: In applications where high power dissipation and/or poor thermal resistance is present, the maximum ambient temperature may have to be derated. Maximum ambient temperature (TA(max)) is dependant on the maximum operating junction temperature (TJ(max-op)), the maximum power dissipation (PD(max)), and the junction to ambient thermal resistance in the application (JA). This relationship is given by :-
TA(max) = TJ(max-op) - (PD(max) x JA)
See Applications section. Note 6: Junction to ambient thermal resistance is highly application and board layout dependent. In applications where high maximum power dissipation exists, the thermal dissipation issues should be addressed in the board layout design. Note 7: Min and Max limits are guaranteed by design, test, or statistical analysis. Typical numbers are not guaranteed, but do represent the most likely norm. Note 8: The device maintains the regulated output voltage without the load. Note 9: This electrical specification is guaranteed by design. Note 10: Time for VOUT to rise from 10 to 90% of VOUT(nom). (figure 1) Note 11: Time from VEN = 1.2V to VOUT = 95%(VOUT(nom)). Note 12: Short circuit current is measured on the input supply line at the point when the short circuit condition reduces the output voltage to 95% of its nominal value. Note 13: CIN, and COUT: Low ESR surface mont devices used in setting electrical characteristics. Note 14: All limits are guaranteed. All electrical characteristics having room-temperature limits are tested during production at TJ = 25C or correlated using Statistical Quality Control methods. Operation over the temperature specification is guaranteed by correlating the electrical characteristics to process and temperature variations and applying statistical process control.
Output Capacitor, Recommended Specifications
Symbol Co Parameter Output Capacitor ESR Conditions Capacitance(Note 15) Min 0.7 Typ 1.0 5 500 Max Units F m
Note 15: The capacitor tolerance should be 30% or better over the full temperature range. The full range of operating conditions for the capacitor in the application should be considered during device selection to ensure this minimum capacitance specification is met. X7R capacitor types are recommended to meet the full device temperature range, however X5R, Y5V, and Z5U types may be used with careful consideration of the application and its operating conditions. (See Capacitor Sections in Application Hints.)
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LP3994
20046504
FIGURE 1. Line Transient Response Requirement.
20046505
FIGURE 2. Load Transient Response Requirement.
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LP3994
Typical Performance Characteristics.
VIN = VOUT + 1.0V, TA = 25C, VEN pin is tied to VIN. Output Voltage Change vs Temperature
Unless otherwise specified, CIN = COUT = 1.0 F Ceramic, Ground Current vs Load Current
20046510
20046511
Ground Current vs VIN, ILOAD = 1mA
Short Circuit Current
20046513
20046512
Line Transient Response
Load Transient Response
20046514
20046515
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LP3994
Typical Performance Characteristics. Unless otherwise specified, CIN = COUT = 1.0 F Ceramic, VIN
= VOUT + 1.0V, TA = 25C, VEN pin is tied to VIN. (Continued) Enable Start Up Timing, (VOUT = 1.8V) Enable Start Up Timing, (VOUT = 1.5V)
20046516
20046517
Ripple Rejection
Noise Density (VIN = 4.2V)
20046518
20046519
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LP3994
Application Hints
EXTERNAL CAPACITORS In common with most regulators, the LP3994 requires external capacitors for regulator stability. The LP3994 is specifically designed for portable applications requiring minimum board space and smallest components. These capacitors must be correctly selected for good performance and to ensure that their value remains within specification over the full operating range. INPUT CAPACITOR An input capacitor is required for stability. It is recommended that a 1.0F capacitor be connected between the LP3994 input pin and ground (this capacitance value may be increased without limit). This capacitor must be located a distance of not more than 1cm from the input pin and returned to a clean analogue ground. Any good quality ceramic, tantalum, or film capacitor may be used at the input. Important: Tantalum capacitors can suffer catastrophic failures due to surge current when connected to a lowimpedance source of power (like a battery or a very large capacitor). If a tantalum capacitor is used at the input, it must be guaranteed by the manufacturer to have a surge current rating sufficient for the application. There are no requirements for the ESR (Equivalent Series Resistance) on the input capacitor, but tolerance and temperature coefficient must be considered when selecting the capacitor to ensure the capacitance will remain ) 1.0F over the entire operating temperature range. OUTPUT CAPACITOR Correct selection of the output capacitor is essential to ensure stable operation in the intended application. The output capacitor must meet all the requirements specified in the recommended capacitor table over all conditions in the application. These conditions include DC-Bias, frequency and temperature. Unstable operation may result if the capacitance drops below the minimum specified value. (See the Capacitor Characteristics section). The LP3994 is designed specifically to work with very small ceramic output capacitors. A 1.0F ceramic capacitor (dielectric type X7R) with ESR between 5m to 500m, is suitable in the LP3994 application circuit. X5R type capacitors may be used but have a narrower temperature range. With these capacitors and others types (Y5v, Z6U) that may be used, selection of the capacitor for any application is dependant on the range of operating conditions and temperature range for that application. (see section on Capacitor Characteristics). It may also be possible to use tantalum or film capacitors at the device output, COUT (or VOUT), but these are not as attractive for reasons of size and cost (see the section Capacitor Characteristics). It is also recommended that the output capacitor be placed within 1cm from the output pin and returned to a clean ground line.
NO-LOAD STABILITY The LP3994 will remain stable and in regulation with no external load. This is an important consideration in some circuits, for example CMOS RAM keep-alive applications. CAPACITOR CHARACTERISTICS The LP3994 is designed to work with ceramic capacitors on the input and output to take advantage of the benefits they offer. For capacitance values around the 1F value, ceramic capacitors give the circuit designer the best design options in terms of low cost and minimal area. Ceramic capacitors have the lowest ESR values, thus making them best for eliminating high frequency noise. The ESR of a typical 1F ceramic capacitor is in the range of 20m to 40m, which easily meets the ESR requirement for stability for the LP3994. For both input and output capacitors careful interpretation of the capacitor specification is required to ensure correct device operation. The capacitor value can change greatly dependant on the conditions of operation and capacitor type. In particular the output capacitor selection should take account of all the capacitor parameters to ensure that the specification is met within the application. Capacitance value can vary with DC bias conditions as well as temperature and frequency of operation. Capacitor values will also show some decrease over time due to aging. The capacitor parameters are also dependant on the particular case size with smaller sizes giving poorer performance figures in general. A study of manufacturers data on 0402 case size capacitors shows that these devices may drop below the minimum specified capacitance due to DC-Bias conditions in conjunction with other parameters such as temperature and are thus not recommended for use. The temperature performance of ceramic capacitors varies by type. Capacitor type X7R is specified with a tolerance of 15% over the temperature range -55oC to +125oC. The X5R has a similar tolerance over the reduced temperature range of -55oC to +85oC. Most large value ceramic capacitors ( 2.2F) are manufactured with Z5U or Y5V temperature characteristics, which results in the capacitance dropping by more than 50% as the temperature goes from 25C to 85C. Therefore X7R is recommended over these other capacitor types in applications where the temperature will change significantly above or below 25oC. Tantalum capacitors are less desirable than ceramic for use as output capacitors because they are more expensive when comparing equivalent capacitance and voltage ratings in the 1F to 4.7F range. Another important consideration is that tantalum capacitors have higher ESR values than equivalent size ceramics. This means that while it may be possible to find a tantalum capacitor with an ESR value within the stable range, it would have to be larger in capacitance (which means bigger and more costly) than a ceramic capacitor with the same ESR value. It should also be noted that the ESR of a typical tantalum will increase about 2:1 as the temperature goes from 25C down to -40C, so some guard band must be allowed.
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LP3994
Application Hints
ENABLE
(Continued)
If the application does not require the Enable switching feature, the VEN pin should be tied to VIN to keep the regulator output permanently on. To ensure proper operation, the signal source used to drive the VEN input must be able to swing above and below the specified turn-on/off voltage thresholds listed in the Electrical Characteristics section under VIL and VIH.
The LP3994 features an active high Enable pin, VEN, which turns the device on when pulled high. When not enabled the regulator output is off and the device typically consumes 1nA.
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LP3994
Physical Dimensions
inches (millimeters) unless otherwise noted
micro SMD, 4 Bump, Package (TLA04) NS Package Number TLA04AAA The dimensions for X1, X2 and X3 are given as: X1 = 1.014 +/- 0.03mm X2 = 1.014 +/- 0.03mm X3 = 0.600 +/- 0.075mm
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LP3994 CMOS Voltage Regulator with Enable Control
Physical Dimensions
inches (millimeters) unless otherwise noted (Continued)
LLP, 6 Lead, Package (SOT23 Land) NS Package Number LDE06A
LIFE SUPPORT POLICY NATIONAL'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. BANNED SUBSTANCE COMPLIANCE National Semiconductor certifies that the products and packing materials meet the provisions of the Customer Products Stewardship Specification (CSP-9-111C2) and the Banned Substances and Materials of Interest Specification (CSP-9-111S2) and contain no ``Banned Substances'' as defined in CSP-9-111S2.
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National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.

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