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 LMC6035/LMC6036 Low Power 2.7V Single Supply CMOS Operational Amplifiers
June 1999
LMC6035/LMC6036 Low Power 2.7V Single Supply CMOS Operational Amplifiers
General Description
The LMC6035/6 is an economical, low voltage op amp capable of rail-to-rail output swing into loads of 600. LMC6035 is available in a chip sized package (8-Bump micro-SMD) using National's micro-SMD package technology. Both allow for single supply operation and are guaranteed for 2.7V, 3V, 5V and 15V supply voltage. The 2.7 supply voltage corresponds to the End-of-Life voltage (0.9V/cell) for three NiCd or NiMH batteries in series, making the LMC6035/6 well suited for portable and rechargeable systems. It also features a well behaved decrease in its specifications at supply voltages below its guaranteed 2.7V operation. This provides a "comfort zone" for adequate operation at voltages significantly below 2.7V. Its ultra low input currents (IIN) makes it well suited for low power active filter application, because it allows the use of higher resistor values and lower capacitor values. In addition, the drive capability of the LMC6035/6 gives these op amps a broad range of applications for low voltage systems.
Features
(Typical Unless Otherwise Noted) n LMC6035 in micro-SMD Package n Guaranteed 2.7V, 3V, 5V and 15V Performance n Specified for 2 k and 600 Loads n Wide Operating Range: 2.0V to 15.5V n Ultra Low Input Current: 20 fA n Rail-to-Rail Output Swing @ 600: 200 mV from either rail at 2.7V @ 100 k: 5 mV from either rail at 2.7V n High Voltage Gain: 126dB n Wide Input Common-Mode Voltage Range -0.1V to 2.3V at Vs = 2.7V n Low Distortion: 0.01% at 10 kHz
Applications
n n n n Filters High Impedance Buffer or Preamplifier Battery Powered Electronics Medical Instrumentation
Connection Diagrams
8-Pin SO/MSOP 8-Bump micro-SMD
DS012830-1
Top View 14-Pin SO/TSSOP Top View
DS012830-65
DS012830-2
Top View
(c) 1999 National Semiconductor Corporation
DS012830
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Ordering Information
Package Temperature Range Industrial -40C to +85C 8-pin Small Outline (SO) LMC6035IM LMC6035IMX 8-pin Mini Small Outline (MSOP) LMC6035IMM LMC6035IMMX 14-pin Small Outline (SO) LMC6036IM LMC6036IMX 14-pin Thin Shrink Small Outline (TSSOP) 8-Bump micro-SMD LMC6036IMT LMC6036IMTX LMC6035IBP Rails Tape and Reel Rails Tape and Reel Rails Tape and Reel Rails Tape and Reel 250 Units Tape and Reel 3k Units Tape and Reel MTC14 M14A MUA08A M08A Transport Media NSC Drawing
BPA08FFB
LMC6035IBPX
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2
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. ESD Tolerance (Note 2) Human Body Model Machine Model Differential Input Voltage Supply Voltage (V+ - V-) Output Short Circuit to V + Output Short Circuit to V - Lead Temperature (soldering, 10 sec.) Current at Output Pin Current at Input Pin Current at Power Supply Pin 3000V 300V Supply Voltage 16V (Note 8) (Note 3) 260C 18 mA 5 mA 35 mA
Storage Temperature Range Junction Temperature (Note 4)
-65C to +150C 150C
Operating Ratings (Note 1)
Supply Voltage Temperature Range LMC6035I and LMC6036I Thermal Resistance ( JA) MSOP, 8-pin Mini Surface Mount M Package, 8-pin Surface Mount M Package, 14-pin Surface Mount MTC Package, 14-pin TSSOP BP, 8-Bump micro-SMD Package 2.0V to 15.5V -40C T
J
+85C
230C/W 175C/W 127C/W 137C/W 220C/W
DC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for TJ = 25C, V+ = 2.7V, V- = 0V, VCM = 1.0V, VO = 1.35V and RL > 1 M. Boldface limits apply at the temperature extremes. LMC6035I Symbol VOS TCVOS IIN IOS RIN CMRR +PSRR -PSRR VCM Parameter Input Offset Voltage Input Offset Voltage Average Drift Input Current Input Offset Current Input Resistance Common Mode Rejection Ratio Positive Power Supply Rejection Ratio Negative Power Supply Rejection Ratio Input Common-Mode Voltage Range 0.7V VCM 12.7V V+ = 15V 5V V+ 15V, VO = 2.5V 0V V- -10V VO = 2.5V, V+ = 5V V+ = 2.7V For CMRR 40 dB 2.3 V+ = 3V For CMRR 40 dB 2.6 V+ = 5V For CMRR 50 dB 4.5 V+ = 15V For CMRR 50 dB 14.4 -0.5 -0.5 -0.3 (Note 11) (Note 11) 0.02 90 0.01 45 pA max pA max Tera 63 60 93 97 -0.1 63 60 74 70 0.3 0.5 2.0 1.7 0.1 0.3 2.3 2.0 -0.2 0.0 4.2 3.9 -0.2 0.0 14.0 13.7 dB min dB min dB min V max V min V max V min V max V min V max V min Conditions Typ (Note 5) 0.5 2.3 LMC6036I Limit (Note 6) 5 6 mV max V/C Units
> 10
96
3
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DC Electrical Characteristics
(Continued)
Unless otherwise specified, all limits guaranteed for TJ = 25C, V+ = 2.7V, V- = 0V, VCM = 1.0V, VO = 1.35V and RL > 1 M. Boldface limits apply at the temperature extremes. LMC6035I Symbol AV Parameter Large Signal Voltage Gain (Note 7) Sinking RL = 2 k VO Output Swing V R
+ L
Conditions R = 600 Sourcing
Typ (Note 5) 1000 250 2000 500 2.5 0.2
LMC6036I Limit (Note 6) 100 75 25 20
Units V/mV min V/mV min V/mV V/mV
L
Sourcing Sinking
= 2.7V = 600 to 1.35V
2.0 1.8 0.5 0.7 2.4 2.2 0.2 0.4 13.5 13.0 1.25 1.50 14.2 13.5 0.4 0.5 4 3 3 2 1.6 1.9 2.7 3.0
V min V max V min V max V min V max V min V max mA min mA min mA max mA max
V R
+ L
= 2.7V = 2 k to 1.35V
2.62 0.07
V R
+ L
= 15V = 600 to 7.5V
14.5 0.36
V R
+ L
= 15V = 2 k to 7.5V
14.8 0.12
IO
Output Current
V V
O
= 0V = 2.7V
Sourcing Sinking
8 5 0.65 1.3
O
IS
Supply Current
LMC6035 for Both Amplifiers V O = 1.35V LMC6036 for All Four Amplifiers V O = 1.35V
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AC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for TJ = 25C, V+ = 2.7V, V- = 0V, VCM = 1.0V, V 1 M. Boldface limits apply at the temperature extremes. Symbol SR GBW m Gm en Slew Rate Gain Bandwidth Product Phase Margin Gain Margin Amp-to-Amp Isolation Input-Referred Voltage Noise (Note 10) f = 1 kHz V CM = 1V f = 1 kHz f = 10 kHz, AV = -10 L = 2 k, VO = 8 VPP
+ O
= 1.35V and RL > Units V/s MHz dB dB
Parameter
Conditions (Note 9) += 15V
Typ (Note 5) 1.5 1.4 48 17 130 27
V
in THD
Input Referred Current Noise Total Harmonic Distortion
0.2
R V
0.01
%
= 10V
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics. Note 2: Human body model, 1.5 k in series with 100 pF. Note 3: Applies to both single-supply and split-supply operation. Continuous short circuit operation at elevated ambient temperature can result in exceeding the maximum allowed junction temperature of 150C. Output currents in excess of 30 mA over long term may adversely affect reliabilty. Note 4: The maximum power dissipation is a function of TJ(max), JA, and TA. The maximum allowable power dissipation at any ambient temperature is PD = (TJ(max) -TA)/ JA. All numbers apply for packages soldered directly onto a PC board with no air flow. Note 5: Typical Values represent the most likely parametric norm or one sigma value. Note 6: All limits are guaranteed by testing or statistical analysis. Note 7: V+ = 15V, VCM = 7.5V and R L connected to 7.5V. For Sourcing tests, 7.5V VO 11.5V. For Sinking tests, 3.5V VO 7.5V. Note 8: Do not short circuit output to V+ when V+ is greater than 13V or reliability will be adversely affected. Note 9: V+ = 15V. Connected as voltage follower with 10V step input. Number specified is the slower of the positive and negative slew rates. Note 10: Input referred, V + = 15V and RL = 100 k connected to 7.5V. Each amp excited in turn with 1 kHz to produce VO = 12 VPP. Note 11: Guaranteed by design.
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Typical Performance Characteristics
Supply Current vs Supply Voltage (Per Amplifier)
Unless otherwise specified, VS = 2.7V, single supply, TA = 25C Sourcing Current vs Output Voltage
Input Current vs Temperature
DS012830-52
DS012830-53
DS012830-54
Sourcing Current vs Output Voltage
Sinking Current vs Output Voltage
Sinking Current vs Output Voltage
DS012830-55
DS012830-56
DS012830-57
Output Voltage Swing vs Supply Voltage
Input Noise vs Frequency
Input Noise vs Frequency
DS012830-58
DS012830-59
DS012830-60
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Typical Performance Characteristics
25C (Continued) Amp to Amp Isolation vs Frequency
Unless otherwise specified, VS = 2.7V, single supply, TA =
Amp to Amp Isolation vs Frequency
+PSRR vs Frequency
DS012830-32
DS012830-61
DS012830-62
-PSRR vs Frequency
CMRR vs Frequency
CMRR vs Input Voltage
DS012830-33
DS012830-34 DS012830-35
CMRR vs Input Voltage
Input Voltage vs Output Voltage
Input Voltage vs Output Voltage
DS012830-36
DS012830-14
DS012830-15
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Typical Performance Characteristics
25C (Continued) Frequency Response vs Temperature
Unless otherwise specified, VS = 2.7V, single supply, TA =
Frequency Response vs Temperature
Gain and Phase vs Capacitive Load
DS012830-16
DS012830-17
DS012830-18
Gain and Phase vs Capacitive Load
Slew Rate vs Supply Voltage
Non-Inverting Large Signal Response
DS012830-20 DS012830-19 DS012830-37
Non-Inverting Large Signal Response
Non-Inverting Large Signal Response
Non-Inverting Small Signal Response
DS012830-21
DS012830-22
DS012830-23
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Typical Performance Characteristics
25C (Continued) Non-Inverting Small Signal Response
Unless otherwise specified, VS = 2.7V, single supply, TA =
Non-Inverting Large Signal Response
Inverting Large Signal Response
DS012830-24
DS012830-25
DS012830-26
Inverting Large Signal Response
Inverting Large Signal Response
Inverting Small Signal Response
DS012830-27
DS012830-28
DS012830-29
Inverting Small Signal Response
Inverting Small Signal Response
Stability vs Capacitive Load
DS012830-30
DS012830-31 DS012830-38
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Typical Performance Characteristics
25C (Continued) Stability vs Capacitive Load Stability vs Capacitive Load
Unless otherwise specified, VS = 2.7V, single supply, TA =
Stability vs Capacitive Load
DS012830-39
DS012830-40
DS012830-41
Stability vs Capacitive Load
Stability vs Capacitive Load
DS012830-42
DS012830-43
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1.0 Application Notes
1.1 Background The LMC6035/6 is exceptionally well suited for low voltage applications. A desirable feature that the LMC6035/6 brings to low voltage applications is its output drive capability -- a hallmark for National's CMOS amplifiers. The circuit of Figure 1 illustrates the drive capability of the LMC6035/6 at 3V of supply. It is a differential output driver for a one-to-one audio transformer, like those used for isolating ground from the telephone lines. The transformer (T1) loads the op amps with about 600 of AC load, at 1 kHz. Capacitor C1 functions to block DC from the low winding resistance of T1. Although the value of C1 is relatively high, its load reactance (Xc) is negligible compared to inductive reactance (XI) of T1.
DS012830-45
FIGURE 2. Output Swing Performance of the LMC6035 per the Circuit of Figure 1
DS012830-44
FIGURE 1. Differential Driver
DS012830-46
The circuit in Figure 1 consists of one input signal and two output signals. U1A amplifies the input with an inverting gain of -2, while the U1B amplifies the input with a noninverting gain of +2. Since the two outputs are 180 out of phase with each other, the gain across the differential output is 4. As the differential output swings between the supply rails, one of the op amps sources the current to the load, while the other op amp sinks the current. How good a CMOS op amp can sink or source a current is an important factor in determining its output swing capability. The output stage of the LMC6035/6 -- like many op amps -- sources and sinks output current through two complementary transistors in series. This "totem pole" arrangement translates to a channel resistance (Rdson) at each supply rail which acts to limit the output swing. Most CMOS op amps are able to swing the outputs very close to the rails -- except, however, under the difficult conditions of low supply voltage and heavy load. The LMC6035/6 exhibits exceptional output swing capability under these conditions. The scope photos of Figure 2 and Figure 3 represent measurements taken directly at the output (relative to GND) of U1A, in Figure 1. Figure 2 illustrates the output swing capability of the LMC6035, while Figure 3 provides a benchmark comparison. (The benchmark op amp is another low voltage (3V) op amp manufactured by one of our reputable competitors.)
FIGURE 3. Output Swing Performance of Benchmark Op Amp per the Circuit of Figure 1 Notice the superior drive capability of LMC6035 when compared with the benchmark measurement -- even though the benchmark op amp uses twice the supply current. Not only does the LMC6035/6 provide excellent output swing capability at low supply voltages, it also maintains high open loop gain (A VOL) with heavy loads. To illustrate this, the LMC6035 and the benchmark op amp were compared for their distortion performance in the circuit of Figure 1. The graph of Figure 4 shows this comparison. The y-axis represents percent Total Harmonic Distortion (THD plus noise) across the loaded secondary of T1. The x-axis represents the input amplitude of a 1 kHz sine wave. (Note that T1 loses about 20% of the voltage to the voltage divider of RL (600) and T1's winding resistances -- a performance deficiency of the transformer.)
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1.0 Application Notes
(Continued)
1.2.1.1 Low-Pass Frequency Scaling Procedure The actual component values represented in bold of Figure 5 were obtained with the following scaling procedure: 1. First determine the frequency scaling factor (FSF) for the desired cutoff frequency. Choosing fc at 3 kHz, provides the following FSF computation: FSF = 2 x 3 kHz (desired cutoff freq.) = 18.84 x 10 3 2. Then divide all of the normalized capacitor values by the FSF as follows: C1' = C(Normalized)/FSF C1' = 0.707/18.84 x 103 = 37.93 x 10-6 C2' = 1.414/18.84 x 103 = 75.05 x 10-6 (C1' and C2': prior to impedance scaling) 3. Last, choose an impedance scaling factor (Z). This Z factor can be calculated from a standard value for C2. Then Z can be used to determine the remaining component values as follows: Z = C2'/C2(chosen) = 75.05 x 10 -6/6.8 nF = 8.4k C1 = C1'/Z = 37.93 x 10-6 /8.4k = 4.52 nF
DS012830-47
(Standard capacitor value chosen for C1 is 4.7 nF ) R1 = R1(normalized) x Z = 1 x 8.4k = 8.4 k R2 = R2(normalized) x Z = 1 x 8.4k = 8.4 k (Standard value chosen for R1 and R2 is 8.45 k ) 1.2.2 High Pass Active Filter The previous low-pass filter circuit of Figure 5 converts to a high-pass active filter per Figure 6.
FIGURE 4. THD+Noise Performance of LMC6035 and "Benchmark" per Circuit of Figure 1
Figure 4 shows the superior distortion performance of LMC6035/6 over that of the benchmark op amp. The heavy loading of the circuit causes the AVOL of the benchmark part to drop significantly which causes increased distortion.
1.2 APPLICATION CIRCUITS 1.2.1 Low-Pass Active Filter A common application for low voltage systems would be active filters, in cordless and cellular phones for example. The ultra low input currents (IIN) of the LMC6035/6 makes it well suited for low power active filter applications, because it allows the use of higher resistor values and lower capacitor values. This reduces power consumption and space.
DS012830-49
Figure 5 shows a low pass, active filter with a Butterworth (maximally flat) frequency response. Its topology is a Sallen and Key filter with unity gain. Note the normalized component values in parenthesis which are obtainable from standard filter design handbooks. These values provide a 1 Hz cutoff frequency, but they can be easily scaled for a desired cutoff frequency (fc). The bold component values of Figure 5 provide a cutoff frequency of 3 kHz. An example of the scaling procedure follows Figure 5.
FIGURE 6. 2 Pole, 300 Hz, Sallen and Key, High-Pass Filter 1.2.2.1 High-Pass Frequency Scaling Procedure Choose a standard capacitor value and scale the impedances in the circuit according to the desired cutoff frequency (300 Hz) as follows: C = C1 = C2 Z = 1 Farad/C(chosen) x 2 x (desired cutoff freq.) = 1 Farad/6.8 nF x 2 x 300 Hz = 78.05k R1 = Z x R1(normalized) = 78.05k x (1/0.707) = 110.4 k (Standard value chosen for R1 is 110 k ) R2 = Z x R2(normalized) = 78.05k x (1/1.414) = 55.2 k (Standard value chosen for R1 is 54.9 k ) 1.2.3 Dual Amplifier Bandpass Filter The dual amplifier bandpass (DABP) filter features the ability to independently adjust fc and Q. In most other bandpass topologies, the fc and Q adjustments interact with each other. The DABP filter also offers both low sensitivity to component values and high Qs. The following application of Figure 7, provides a 1 kHz center frequency and a Q of 100.
DS012830-48
FIGURE 5. 2-Pole, 3 kHz, Active, Sallen and Key, Lowpass Filter with Butterworth Response
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1.0 Application Notes
(Continued)
DS012830-50
FIGURE 7. 2 Pole, 1 kHz Active, Bandpass Filter 1.2.3.1 DABP Component Selection Procedure Component selection for the DABP filter is performed as follows: 1. First choose a center frequency (fc). Figure 7 represents component values that were obtained from the following computation for a center frequency of 1 kHz. R2 = R3 = 1/(2 f cC) Given: fc = 1 kHz and C (chosen) = 6.8 nF R2 = R3 = 1/(2 x 3 kHz x 6.8 nF) = 23.4 k (Chosen standard value is 23.7 k ) 2. Then compute R1 for a desired Q (fc/BW) as follows: R1 = Q x R2. Choosing a Q of 100, R1 = 100 x 23.7 k = 2.37 M. 1.3 PRINTED-CIRCUIT-BOARD LAYOUT FOR HIGH-IMPEDANCE WORK It is generally recognized that any circuit which must operate with < 1000 pA of leakage current requires special layout of the PC board. If one wishes to take advantage of the ultra-low bias current of the LMC6035/6, typically < 0.04 pA, it is essential to have an excellent layout. Fortunately, the techniques for obtaining low leakages are quite simple. First,
the user must not ignore the surface leakage of the PC board, even though it may at times appear acceptably low. Under conditions of high humidity, dust or contamination, the surface leakage will be appreciable. To minimize the effect of any surface leakage, lay out a ring of foil completely surrounding the LMC6035 or LMC6036 inputs and the terminals of capacitors, diodes, conductors, resistors, relay terminals, etc. connected to the op amp's inputs. See Figure 8. To have a significant effect, guard rings should be placed on both the top and bottom of the PC board. This PC foil must then be connected to a voltage which is at the same voltage as the amplifier inputs, since no leakage current can flow between two points at the same potential. For example, a PC board trace-to-pad resistance of 1012, which is normally considered a very large resistance, could leak 5 pA if the trace were a 5V bus adjacent to the pad of an input. This would cause a 100 times degradation from the amplifiers actual performance. However, if a guard ring is held within 5 mV of the inputs, then even a resistance of 1011 would cause only 0.05 pA of leakage current, or perhaps a minor (2:1) degradation of the amplifier's performance. See Figure 9a, b, c for typical connections of guard rings for standard op amp configurations. If both inputs are active and at high impedance, the guard can be tied to ground and still provide some protection; see Figure 9 d.
DS012830-7
FIGURE 8. Example, using the LMC6036 of Guard Ring in P.C. Board Layout
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1.0 Application Notes
(Continued)
DS012830-10
(c) Follower
DS012830-8
(a) Inverting Amplifier
DS012830-9
(b) Non-Inverting Amplifier
DS012830-11
(d) Howland Current Pump FIGURE 9. Guard Ring Connections 1.3.1 CAPACITIVE LOAD TOLERANCE Like many other op amps, the LMC6035/6 may oscillate when its applied load appears capacitive. The threshold of oscillation varies both with load and circuit gain. The configuration most sensitive to oscillation is a unity-gain follower. See the Typical Performance Characteristics. The load capacitance interacts with the op amp's output resistance to create an additional pole. If this pole frequency is sufficiently low, it will degrade the op amp's phase margin so that the amplifier is no longer stable at low gains. As shown in Figure 10, the addition of a small resistor (50-100) in series with the op amp's output, and a capacitor (5 pF-10 pF) from inverting input to output pins, returns the phase margin to a safe value without interfering with lower-frequency circuit operation. Thus, larger values of capacitance can be tolerated without oscillation. Note that in all cases, the output will ring heavily when the load capacitance is near the threshold for oscillation. 1.4 micro-SMD Considerations Contrary to what might be guessed, the micro-SMD package does not follow the trend of smaller packages having higher thermal resistance. LMC6035 in micro-SMD has thermal resistance of 220C/W compared to 230C/W in MSOP. Even when driving a 600 load and operating from 7.5V supplies, the maximum temperature raise will be under 4.5C. For application information specific to micro-SMD, see Application note AN-1112.
DS012830-5
FIGURE 10. Rx, Cx Improve Capacitive Load Tolerance Capacitive load driving capability is enhanced by using a pull up resistor to V+ (Figure 11). Typically a pull up resistor conducting 500 A or more will significantly improve capacitive load responses. The value of the pull up resistor must be determined based on the current sinking capability of the amplifier with respect to the desired output swing. Open loop gain of the amplifier can also be affected by the pull up resistor (see Electrical Characteristics).
DS012830-6
FIGURE 11. Compensating for Large Capacitive Loads with a Pull Up Resistor
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Physical Dimensions
inches (millimeters) unless otherwise noted
8-Lead (0.150" Wide) Molded Small Outline Package, JEDEC NS Package Number M08A
15
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Physical Dimensions
inches (millimeters) unless otherwise noted (Continued)
8-Lead (0.150" Wide) Molded Mini Small Outline Package, JEDEC NS Package Number MUA08A
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16
Physical Dimensions
inches (millimeters) unless otherwise noted (Continued)
14-Lead (0.150" Wide) Molded Small Outline Package, JEDEC NS Package Number M14A
17
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Physical Dimensions
inches (millimeters) unless otherwise noted (Continued)
14-Pin TSSOP NS Package Number MTC14
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18
Physical Dimensions
inches (millimeters) unless otherwise noted (Continued)
NOTE: UNLESS OTHERWISE SPECIFIED. 1. EPOXY COATING. 2. 63Sn/37Pb EUTECTIC BUMP. 3. RECOMMEND NON-SOLDER MASK DEFINED LANDING PAD. 4. PIN 1 IS ESTABLISHED BY LOWER LEFT CORNER WITH RESPECT TO TEXT ORIENTATION PINS ARE NUMBERED COUNTERCLOCKWISE. 5. XXX IN DRAWING NUMBER REPRESENTS PACKAGE SIZE VARIATION WHERE X1 IS PACKAGE WIDTH, X2 IS PACKAGE LENGTH AND X3 IS PACKAGE HEIGHT. 6. REFERENCE JEDEC REGISTRATION MO-211, VARIATION BC. 8-Bump micro-SMD NS Package Number BPA08FFB X1 = 1.412 X2 = 1.412 X3 = 0.850
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LMC6035/LMC6036 Low Power 2.7V Single Supply CMOS Operational Amplifiers
Notes
LIFE SUPPORT POLICY NATIONAL'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT AND GENERAL COUNSEL OF NATIONAL SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user.
National Semiconductor Corporation Americas Tel: 1-800-272-9959 Fax: 1-800-737-7018 Email: support@nsc.com www.national.com National Semiconductor Europe Fax: +49 (0) 1 80-530 85 86 Email: europe.support@nsc.com Deutsch Tel: +49 (0) 1 80-530 85 85 English Tel: +49 (0) 1 80-532 78 32 Francais Tel: +49 (0) 1 80-532 93 58 Italiano Tel: +49 (0) 1 80-534 16 80
2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness.
National Semiconductor Asia Pacific Customer Response Group Tel: 65-2544466 Fax: 65-2504466 Email: sea.support@nsc.com
National Semiconductor Japan Ltd. Tel: 81-3-5639-7560 Fax: 81-3-5639-7507
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications.


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