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ERRATA TO THE TSB21LV03A DATA SHEET FOR SN104923PM DEVICE
(TEXAS INSTRUMENTS LITERATURE NO. SLLS278, NOVEMBER 1997)
This document contains corrections and additions to information in the TSB21LV03A data sheet (TI Literature Number SLLS278, November 1997) and is applicable to the SN104923PM device (symbolized TSB21LV03B).
Application notes:
a. If in a network of 10 hops or more a topology uses S200 speed packets, data packet errors and spurious bus resets may occur (resets not initiated by hot plugs, or software). This is assuming that all nodes in the topology are TSB21LV03B devices. This problem may never be seen if the combination of Link and Phy that is transmitting has a data prefix that is longer than 350 ns. Conversely, this problem may be seen with fewer hops if the combination of Link and Phy has a data prefix that is shorter than 350 ns. Workaround: Topologies must either: Be configured with 10 hops or fewer, or Only use S100 speed packets b. Isochronous data are randomly lost when the TSB21LV03B is the root node and is connected to the TSB11LV01PT through a repeater node. Such a problem does not occur when the TSB21LV03B is not the root node in the network or if there is no repeater node between the TSB21LV03B and the TSB11LV01PT. Workaround: Topologies must either: Be connected directly between TSB21LV03B and TSB11LV01PT with no repeater in between, or Not set the TSB21LV03B as the root node c. The SUBACTION_GAP on the TSB21LV03B occurs 40 ns prior to the SUBACTION_GAP specified in the 1394-1995 STD. This will not cause a problem in real life applications. The PHY in the network will start to arbitrate for the bus during a fairness interval after a SUBACTION_GAP and ARB_DELAY time. The SUBACTION_GAP plus ARB_DELAY time will always be larger than the SUBACTION_GAP of 1394-1995 PHY. This will guarantee that all nodes in the network will detect a SUBACTION_GAP.
d. The TSB21LV03B will detect ARB_RESET_GAP delayed 20 ns to 1200 ns than the time specified 1394-1995 STD. The delay is dependent on the gap count values, and does not occur when the gap count is 1. TSB21LV03B starts to arbitrate for the bus after ARB_RESET_GAP and ARB_DELAY time at the end of the fairness interval. The TSB21LV03B delays the arbitration for the bus by 80 ns more than specified in the 1394-1995 STD. This will not cause problems in real life applications. The above timing guarantees that all the nodes will detect an ARB_RESET_GAP. e. The DATA_END time measured is 20 ns less than the time specified in the 1394-1995 STD. This will not cause problems in real life applications. f. RESET_WAIT: The delay in the RESET_WAIT time makes the TSB21LV03B more likely to be root unless any other Phy on the bus has their root holdoff bit set. This will not cause any problems in real life applications.
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SLLS327 - May 1999
g. TPBias leakage. If the TSB21LV03B PHY is powered on, connected to an active 1394-1995 PHY supplying TPBias, then powered down, the TSB21LV03B may not power up correctly when power is again applied to the device. This is caused by the TPBias from the connected node partially powering the TSB21LV03B. This only occurs if the method of resetting the TSB21LV03B is a single 0.1-F capacitor connected from RESET to PHY GND. If the reset line is actively driven, instead of only a passive capacitor, this problem will not occur. Workaround 1: To ensure the TSB21LV03B properly powers back up when not actively driving the RESET terminal, the schematic with the TSB21LV03B should include an approximately 110-k resistor connected from the RESET terminal to PHY GND. This resistor will be in parallel with the recommended 0.1-F capacitor. Workaround 2: lf the boards are designed with the capability of powering the PHY from bus power, and if bus power supply will always be provided in the system, this will keep the PHYs powered at all times and the leakage problem will not occur. h. When the SN104923PM (Symbolized TSB21LV03B) is used in extreme conditions (High Temperature and low voltage 70C, 2.7 V) could cause occasional isochronous failure. Workaround: This failure does not occur in temperatures from 0C to 70C if the Voltage supply is between 2.9 V to 3.6 V. The SN104923PM will work from 2.7 V to 3.6 V if the device is used between 0C and 60C
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POST OFFICE BOX 655303
* DALLAS, TEXAS 75265
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Copyright (c) 1999, Texas Instruments Incorporated

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