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THS7001 Programmable Gain Amplifier Evaluation Module
User's Guide
December 1999
Mixed-Signal Products
SLOU057
IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI's standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE ("CRITICAL APPLICATIONS"). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO BE FULLY AT THE CUSTOMER'S RISK. In order to minimize risks associated with the customer's applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. TI's publication of information regarding any third party's products or services does not constitute TI's approval, warranty or endorsement thereof.
Copyright (c) 1999, Texas Instruments Incorporated
Preface
Related Documentation From Texas Instruments
J J
THS7001 Programmable-Gain Amplifier (literature number SLOS214) This is the data sheet for the THS7001 amplifier integrated circuit used on the EVM. PowerPADTM Thermally Enhanced Package (literature number SLMA002) This is the technical brief for the special PowerPAD package in which the THS7001 amplifier IC is supplied.
FCC Warning
This equipment is intended for use in a laboratory test environment only. It generates, uses, and can radiate radio frequency energy and has not been tested for compliance with the limits of computing devices pursuant to subpart J of part 15 of FCC rules, which are designed to provide reasonable protection against radio frequency interference. Operation of this equipment in other environments may cause interference with radio communications, in which case the user at his own expense will be required to take whatever measures may be required to correct this interference.
Trademarks
TI is a trademark of Texas Instruments Incorporated. PowerPAD is a trademark of Texas Instruments Incorporated.
Chapter Title--Attribute Reference
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iv
Running Title--Attribute Reference
Contents
1 General Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1 1.1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2 1.2 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2 1.3 Programmable Gain Amplifier Gain Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-6 1.4 EVM DIP Switch Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-8 1.5 EVM Circuit Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-9 1.6 Using The THS7001 EVM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-10 1.7 THS7001 EVM Performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-11 1.8 General High-Speed Amplifier Design Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . 1-14 1.9 General PowerPADt Design Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-15 1.10 THS7001 EVM Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-18 Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-1 2.1 THS7001 Programmable-Gain Amplifier EVM Parts List . . . . . . . . . . . . . . . . . . . . . . . . . 2-2 2.2 THS7001 EVM Board Layouts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-3
2
Chapter Title--Attribute Reference
v
Running Title--Attribute Reference
Figures
1-1 1-2 1-3 1-4 1-5 1-6 1-7 1-8 1-9 1-10 1-11 1-12 2-1 2-2 2-3 THS7001 Evaluation Module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3 THS7001 EVM Schematic Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-4 Simplified PGA Section of the THS7001 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-7 THS7001 Evaluation Module Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-9 THS7001 EVM Preamplifier Response, VCC = 15 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-11 THS7001 EVM Preamplifier Response, VCC = 5 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-11 THS7001 EVM PGA Response, VCC = 15 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-12 THS7001 EVM PGA Response, VCC = 5 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-12 THS7001 EVM Preamplifier + PGA Response, VCC = 15 V . . . . . . . . . . . . . . . . . . . . . . 1-13 THS7001 EVM Preamplifier + PGA Response, VCC = 5 V . . . . . . . . . . . . . . . . . . . . . . . 1-13 PowerPAD PCB Etch and Via Pattern . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-15 Maximum Power Dissipation vs. Free-Air Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-16 THS7001 EVM PC Board: Top Assembly . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-3 THS7001 EVM PC Board: Top Layer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-3 THS7001 EVM PC Board: Bottom Layer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-4
Tables
1-1 1-2 1-3 1-4 2-1 THS7001 EVM PGA Nominal Gain/Attenuation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-6 EVM DIP Switch Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-8 THS7001 EVM Jumper Settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-10 THS7001 EVM DIP Switch Settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-10 THS7001 Programmable-Gain Amplifier EVM Parts List . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2
vi
Chapter 1
General Information
This chapter details the Texas Instruments (TITM) THS7001 programmable-gain amplifier evaluation module (EVM), SLOP250. It includes a list of EVM features, a brief description of the module illustrated with a pictorial and schematic diagrams, EVM specifications, details on configuring, connecting, and using the EVM, and a discussion on high-speed amplifier and PowerPAD package design considerations.
Topic
1.1 1.2 1.3 1.4 1.5 1.6 1.7 1.8 1.9
Page
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2 Programmable Gain Amplifier Gain Control . . . . . . . . . . . . . . . . . . . . . 1-6 EVM DIP Switch Functionality . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-8 EVM CIrcuit Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-9 Using the THS7001 EVM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-10 THS7001 EVM Performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-11 General High-Speed Amplifier Design Considerations . . . . . . . . . 1-14 General PowerPADTM Design Considerations . . . . . . . . . . . . . . . . . . 1-15
1.10 THS7001 EVM Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-18
General Information
1-1
Features
1.1 Features
THS7001 programmable-gain amplifier EVM features include:
J J J J J J J
Multiple Input Configurations Set Via On Board Jumpers DIP Switches Allow Quick and Easy Adjustment of Gain, Shut Down, Reference Voltage, and Output Clamping Standard BNC Connector Inputs and Outputs 5-V to 15-V Operation With 5-V Reference Input Nominal 50- Impedance Inputs and Outputs Includes Test Points for Easy Digital Control of EVM Circuit Gain and Operating Parameters Good Example of PowerPAD Package and High-Speed Amplifier Design and Layout
1.2 Description
The TI THS7001 programmable-gain amplifier evaluation module (EVM) is a complete low-noise receiver and a highly configurable programmable-gain amplifier circuit. It consists of the TI THS7001 programmable-gain amplifier IC and a number of passive parts, all mounted on a multilayer circuit board (Figure 1-1). Although the THS7001 IC was developed primarily for xDSL receiver front-ends, a large number of different circuits can benefit from the many features incorporated into the THS7001. This EVM illustrates a universal design and can be used for numerous system configurations. The EVM uses standard BNC connectors for inputs and outputs and also includes test points for user connections and testing. It is completely assembled, fully tested, and ready to use--just connect it to power, a signal source, and a load (if desired).
1-2
General Information
Description
Figure 1-1. THS7001 Evaluation Module
SLOP250 THS7001 EVM Board
J1
J2
J3
J4
+VCC
C13
GND + +
-VCC
C14
+5 V +
Texas Instruments
L1
C4
C5 C17
L2
C21 GND S1 S/D (4) AVREF (5) VL (6) R24 R26 R28 R30 R32 C18, C10 C19, C9 R42 C15
Pre-Amp A Output J5
G2 (3) G1 (2) G0 (1) C7 R23 R25 R27 U1 R29 R31
1999
R18 R5 C6 R6 R7 R8
J6
1
R20
PGA - A Output
R44
Input A
R9 JP2
JP1
J9
C8
R2 C3 C1
R41 C12 JP3
VH
Input power is applied to the EVM through banana jacks J1, J2, J3, and J4. An LC filter on each power bus isolates the EVM circuits from the external supply. J4 provides a reference point for numerous circuit functions and draws relatively little current. The schematic for the EVM amplifiers appears in Figure 1-2.
R1
General Information
1-3
S1:A
S1:B
S1:C
R23, 330
13
20
19 R25, 330
18 R27, 330
G0
G1
G2
JP2 5 - 4 3 JP1 R20 TBD C17 TBD 7 VIN -Vcc U1:A + R5 49.9 J5 Pre-amp A Output 3 C3 TBD 6 8 2
VCC
SID
GND
1
VREF
1
14
R9 49.9 R1 TBD C11 0.1 F -15 V
17
2
1-4
J2 J3 -VCC TP1 C4 6.8 F + + + 6.8 F 0.22 H 6.8 F C5 L2 C21 +5 V J4 GND C13 C14 0.1 F -15 V 5V 5V C17, 0.1 F TP2, G0 TP4, G1 G2, TP3 +15 V R24, 3.3 k R26, 3.3 k R28, 3.3 k TP5 VH R41 49.9 U1:B 12 VH 16 VO 15 VL R42 4.7 k JP3 1 2 3 C15 0.1 F C9, 0.1 F R44 100 5V C8, TBD R7 499 +15 V C6, TBD 1 R2 TBD 2 C12 0.1 F R6 0 C19, 0.1 F R8 499 +15 V 0.1 F J9 PGA-A Output R31 49.9 VL TP6 -15 V R29 330 R18 49.9 VREF TP8 R30 3.3 k S/D TP7 PREAMPLIFIER 5V PGA S1:D S1:E S1:F R32 4.7 k C10, 0.1 F C18, 0.1 F -15 V
J1
Description
+VCC
L1
0.22 H
+15 V
J6 Input A
3
General Information
Figure 1-2. THS7001 EVM Schematic Diagram
Description
The THS7001 EVM is equipped with BNC input and output connectors. The input is terminated with a 50- resistor to provide correct line impedance matching (Figure 1-3). Note that using a source with a 50- output impedance will create a voltage divider at the EVM inputs. Thus, accurate knowledge of the source output characteristics is required to determine proper input signal amplitudes. The output of the preamplifier stage is routed through a 50- resistor to provide proper cable impedance matching and termination impedance matching. One of the drawbacks of using this type of impedance matching is that it places an equivalent 100- load on the output of the preamplifier. Although the preamplifier section has a large output current capability, the programmable gain amplifier (PGA) section has a limited current drive capability. It is recommended that the total impedance placed on the output of the PGA section is at least 500 . The THS7001 IC is a voltage feedback amplifier. It follows the classic operational amplifier gain equations: Inverting Gain
+ * RF R
G
(1)
Noninverting Gain
R + 1 ) RF
(2)
G
The gain of the preamplifier can easily be changed to support different applications by changing the resistor ratios. Although any of the components on the EVM board can be replaced with different values, it is imperative that the THS7001 preamplifier gain be kept to a minimum of +2 or -1 for stability purposes. Also, component pads have been placed in convenient locations on the PCB (shown as components with the value TBD in the schematic) to allow numerous modifications to the basic EVM configuration. However, care must be taken because the surface-mount solder pads on the board are somewhat fragile and will not survive a large number of soldering/desoldering operations. For independent evaluation of the preamplifier, a BNC connector directly at the preamplifier output pin (J5) allows the user to investigate the preamplifier independently of the PGA section. The shutdown feature of the THS7001 IC is implemented on this EVM. The shutdown signal is low for normal THS7001 operation. When the shutdown pin is high (5 V), the preamplifier and the PGA section are turned off. Shutdown on the EVM is controlled by switch S1:D, or by applying an external shutdown signal to test point TP7 with the switch set to OFF. An isolation resistor on the THS7001 IC shutdown control input pin is used to minimize surges in the EVM environment and can be omitted in a final system design.
General Information
1-5
Programmable Gain Amplifier Gain Control
1.3 Programmable Gain Amplifier Gain Control
The THS7001 IC is provided with three digital control inputs for setting the gain of the PGA stage (G0 - G2). Standard TTL or CMOS Logic signals operate these control inputs. The gain control inputs are not latched and respond to the control signals in real time. Therefore, the control signals on these inputs must remain constant if the PGA gain is to remain constant. For stand-alone evaluation of this function, onboard DIP switches (S1:A to S1:C) are used to control the gain of the PGA. Note that all DIP switch gain control elements must be set to OFF if gain is to be set by digital control signals. For convenience, test points (TP2 - TP4) are placed on each of these lines to allow easy external connections. There are 330- isolation resistors in series with each IC gain control input pins. These were added only for surge suppression and are not required for actual system design. Nominal gain/attenuation is shown in Table 1-1.
Table 1-1. THS7001 EVM PGA Nominal Gain/Attenuation
G2 0 0 0 0 1 1 1 1 G1 0 0 1 1 0 0 1 1 G0 0 1 0 1 0 1 0 1 PGA Gain (dB) -22 -16 -10 -4 2 8 14 20 PGA Gain (V/V) 0.08 0.16 0.32 0.63 1.26 2.52 5.01 10
One aspect of the THS7001 PGA signal input that must be considered is that there are internal variable resistors (RF and RG) that set the gain. The resistance of RG changes from about 270 (gain = +20 dB) to about 3 k (gain = -22 dB). Therefore, any source impedance at the input to the PGA amplifier will cause a gain error to be seen at the output. A buffer/amplifier is highly recommended to directly drive the input of the PGA section to help minimize this effect. Another consideration is that when the amplifier VREF is connected to ground, the internal RG resistor is connected to a virtual ground. Therefore, if a termination resistor is used on the source side, the total terminating resistance is the parallel combination of the terminating resistance and the internal RG resistor. This, in conjunction with the series impedance problem mentioned previously, can potentially cause a voltage mismatch between the output of a 50- source and the expected PGA output voltage. These points are illustrated by the following formula and in the simplified diagram of the THS7001 PGA section shown in Figure 1-3. R TOTALTERMINATION
+R R
TERMINATION TERMINATION
) (R
(R SOURCE
SOURCE
)R ) )R )
G G
(3)
1-6
General Information
Programmable Gain Amplifier Gain Control
Figure 1-3. Simplified PGA Section of the THS7001
No Source Impedance VIN PGA -VIN RSOURCE RTERMINATION - PGA PGA VREF + PGA VOUT Negative Clamp VL RG G0 G1 G2 THS7001 IC
RF Positive Clamp VH
The PGA VREF terminal is also accessible via test point TP8. Typically, the DIP switches are used to keep this point at ground. If a voltage is applied to this terminal, then the output of the PGA section will amplify the applied reference voltage by one plus the selected gain. Thus, the output gain due only to VREF will be from +0.6 dB to +21 dB according to the following formula: V OUT V REF
+ 20
Log 10 1
) PGA Gain(V V
(4)
Typically, the output of the PGA will directly drive an A/D converter. Because of the limited linear input range and saturation characteristics of most ADCs, the PGA output incorporates a voltage clamp. These clamps are typically connected to the power supply pins to allow a full output range. However, by setting switch S1:F to OFF and setting jumper JP3 to the 1-2 position, the outputs will be clamped to either +Vcc or +5V (depending on JP3) and ground. The output can be further limited by applying an external reference voltage to test points TP5 (VH) and TP6 (VL). The accuracy of this clamp is dependant on the amount of current flowing through the internal clamping diodes. As is typical with all diodes, the voltage drop across this diode increases with current. Therefore, the accuracy of the clamp is highly dependant upon the output voltage, the clamping voltage differences, and the output current. The 50- series resistors are placed on this EVM only for surge suppression. In a final system layout, these resistors are not required for proper operation.
General Information
1-7
EVM DIP Switch Functionality
1.4 EVM DIP Switch Functionality
The THS7001 can be fully evaluated without any external digital control signals applied. This is accomplished through the use of a DIP switch. The DIP switch incorporates six SPST switches labeled A through F. The functionality of each switch is described in Table 1-2.
Table 1-2. EVM DIP Switch Functionality
SWITCH S1:A S1:B S1:C S1:D S1:E S1:F LABEL A-G0 A G0 A-G1 A G1 A-G2 A G2 A S/D A-S/D A-VREF A VREF VL POSITION 0 1 0 1 0 1 0 1 0 1 0 1 DESCRIPTION PGA Gain Bit 0 (LSB): Value = 0 (Low) PGA Gain Bit 0 (LSB): Value = 1 (High) PGA Gain Bit 1: Value = 0 (Low) PGA Gain Bit 1: Value = 1 (High) PGA Gain Bit 2 (MSB): Value = 0 (Low) PGA Gain Bit 2 (MSB): Value = 1 (High) Shutdown Control: Value = 0 (Low) -- Active Shutdown Control: Value = 1 (High) -- Shutdown VREF Floating (Connect TP8 to Ext. Ref.) VREF Connected to Ground Low Side Clamp Ground (Connect TP6 to Ext Ref) Low Side Clamp Connected to -Vcc
1-8
General Information
EVM Circuit Configuration
1.5 EVM Circuit Configuration
The THS7001 EVM design allows evaluation of each section of the THS7001 amplifier IC separately. Configuration of the EVM is accomplished through jumpers mounted on the module PCB. Each jumper is a three-pin header that acts as an SPDT switch when a shunt is placed across two of the three pins to select either of two signal routes (Figure 1-4).
Figure 1-4. THS7001 Evaluation Module Block Diagram
5V 2 15 V JP3 U1: B
THS7001
1 3
VH Clamp
U1:A Input A J6 3 JP2 Preamp 1 2 -
THS7001
1 2 3 JP1 PGA
PGA A Output J9 Preamp A Output J5
+
-
Jumper JP1:
J J
1-2 -- Connects the input of the PGA (U1: B) to the input A BNC (J6), bypassing the THS7001 preamplifier (U1:A) 2-3 -- Connects the input of A-channel PGA (U1: B) to the output of the A-channel preamplifier (U1:A)
-
Jumper JP2:
J J
1-2 -- Connects the inverting input terminal of the preamplifier (U1:A) to the input A BNC (J6). In order to use this functionality, components R1, R2, and C3 must be selected and installed on the EVM by the user 2-3 -- Connects the noninverting input terminal of the preamplifier (U1:A) to the input A BNC (J6)
-
Jumper JP3:
J J
1-2 -- Connects the THS7001 IC positive clamp input pin (VH) to +VCC 2-3 -- Connects the THS7001 IC positive clamp input pin (VH) to +5V
For example, to use the preamplifier as a buffer and gain: 1) Set JP1 to 2-3 2) Set JP2 to 2-3 3) Set JP3 to 2-3 4) Apply the input to input A (J6)
General Information
1-9
Using the THS7001 EVM
1.6 Using the THS7001 EVM
The THS7001 EVM operates from a split power supply with voltages ranging from 5 V to 15 V. It also uses 5 volt logic control signals to configure the operation of the EVM when the DIP switches are used. The use of a single supply for this EVM is not recommended. As shipped, the preamplifier is set to a gain of 2 and the preamplifier directly drives the PGA stage. An oscilloscope is typically used to view and analyze the EVM output signals. 1) Ensure that all power supplies are set to OFF before making power supply connections to the THS7001 EVM. 2) Select the operating voltage for the EVM and connect appropriate split power supplies to the banana jacks on the module marked +VCC (J1) and -VCC (J3). 3) Connect a 5-V power supply to the banana jack marked +5 V (J4). 4) Connect all power supply grounds to the banana jack marked GND (J2). 5) Connect an oscilloscope probe to the PGA-A amplifier output BNC (J9). Connecting directly to J9 with a 50- nominal impedance cable and probe is not recommended. The output drive capability of the PGA is very limited. Such a connection will load the output excessively, reducing the output voltage range of the amplifier and is not a true measurement of the amplifier performance. 6) Set EVM jumpers as shown in Table 1-3.
Table 1-3. THS7001 EVM Jumper Settings
JP1 2-3 JP2 2-3 JP3 2-3
7) Set DIP switch S1 as shown in Table 1-4.
Table 1-4. THS7001 EVM DIP Switch Settings
SWITCH S1 S1:A S1:B S1:C S1:D S1:E S1:F LABEL G0 G1 G2 S/D VREF VL POSITION 0 0 1 0 1 1
8) Set the power supplies to ON. 9) Connect a signal input to the INPUT A BNC (J6). Note that each input connector on this EVM is terminated with a 50- resistor to ground. With a 50- source impedance, the voltage seen by the THS7001 amplifier IC on the EVM will be the source signal voltage applied to the EVM input connector.
1/2
10) Verify the output signal on the oscilloscope using a high-impedance probe -- a voltage gain of approximately 2.5 to 1 should be observed.
1-10
General Information
THS7001 EVM Performance
1.7 THS7001 EVM Performance
Figure 1-5 shows the typical frequency and phase response the THS7001 EVM preamplifier with 15-V supplies and Figure 1-6 shows the typical frequency and phase response of the THS7001 EVM preamplifier with 5-V supplies. Typical -3 dB bandwidth of the preamplifier with a 15-V power supply is 100 MHz and 90 MHz with a 5-V power supply.
Figure 1-5. THS7001 EVM Preamplifier Response, VCC = 15 V
7 Amplitude 6 Output Amplitude - dB 5 Phase 4 3 2 1 0 -1 100k VO = 0.4 Vp-p RL = 150 -30 -60 -90 -120 -150 -180 500M 30 0 Output Phase - 60
1M
10M f - Frequency - Hz
100M
Figure 1-6. THS7001 EVM Preamplifier Response, VCC = 5 V
7 Amplitude 6 Output Amplitude - dB 5 Phase 4 3 2 1 0 -1 100k VO = 0.4 Vp-p RL = 150 -30 -60 -90 -120 -150 -180 500M 30 0 Output Phase - 60
1M
10M f - Frequency - Hz
100M
General Information
1-11
THS7001 EVM Performance
Figure 1-7 shows the typical frequency and phase response of the THS7001 EVM PGA with 15-V supplies and Figure 1-8 shows the typical frequency and phase response of the THS7001 EVM PGA with 5-V supplies. This data was collected with the gain set to +2 dB. Typical - 3 dB bandwidth is 70 MHz with a 5-V power supply and 80 MHz with a 15-V power supply.
Figure 1-7. THS7001 EVM PGA Response, VCC = 15 V
4 3 Amplitude Output Amplitude - dB 2 1 0 Phase -1 -2 -3 -4 100k VO = 0.4 Vp-p RL = 150 1M 10M f - Frequency - Hz 100M 135 90 45 0 500M 270 225 180 Output Phase - Output Phase - 360 315
Figure 1-8. THS7001 EVM PGA Response, VCC = 5 V
4 3 Amplitude Output Amplitude - dB 2 1 0 Phase -1 -2 -3 -4 100k VO = 0.4 Vp-p RL = 150 1M 10M f - Frequency - Hz 100M 135 90 45 0 500M 270 225 180 360 315
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General Information
THS7001 EVM Performance
Figure 1-9 shows the typical frequency and phase response of the THS7001 EVM preamplifier + PGA with 15-V supplies and Figure 1-10 shows the typical frequency and phase response of the THS7001 EVM preamplifier + PGA with 5-V supplies. This data was collected with the preamplifier directly driving the PGA input. The PGA was set to a gain of +2 dB. Typical - 3 dB bandwidth is 70 MHz with a 5-V power supply and 80 MHz with a 15-V power supply.
Figure 1-9. THS7001 EVM Preamplifier + PGA Response, VCC = 15 V
10 9 Amplitude Output Amplitude - dB 8 7 Phase 6 5 4 3 100k VO = 0.4 Vp-p RL = 500 1M 10M f - Frequency - Hz 100M 135 90 45 0 500M 225 180 Output Phase - Output Phase - 315 270
Figure 1-10. THS7001 EVM Preamplifier + PGA Response, VCC = 5 V
10 9 Amplitude Output Amplitude - dB 8 7 Phase 6 5 4 3 100k VO = 0.4 Vp-p RL = 500 1M 10M f - Frequency - Hz 100M 135 90 45 0 500M 225 180 315 270
General Information
1-13
General High-Speed Amplifier Design Considerations
1.8 General High-Speed Amplifier Design Considerations
The THS7001 EVM layout has been designed and optimized for use with high-speed signals and can be used as an example when designing THS7001 applications. Careful attention has been given to component selection, grounding, power supply bypassing, and signal path layout. Disregard of these basic design considerations could result in less than optimum performance of the THS7001 IC. Surface-mount components were selected because of the extremely low lead inductance associated with this technology. Also, because surface mount components are physically small, the layout can be very compact. This helps minimize both stray inductance and capacitance. Tantalum power supply bypass capacitors (C4, C5, and C21) at the power input pads help supply currents for rapid, large signal changes at the amplifier output. The 0.1 F power supply bypass capacitors (C11, C12, C18, and C19) were placed as close as possible to the IC power input pins in order to keep the PCB trace inductance to a minimum. This improves high-frequency bypassing and reduces harmonic distortion. A proper ground plane on both sides of the PCB should always be used with high-speed circuit design. This provides low-inductive ground connections for return current paths. In the area of the preamplifier input pins, however, the ground plane was removed to minimize stray capacitance and reduce ground plane noise coupling into these pins. This is especially important for the inverting pin while the amplifier is operating in the noninverting mode. Because the voltage at this pin swings directly with the noninverting input voltage, any stray capacitance would allow currents to flow into the ground plane, causing possible gain error and/or oscillation. Capacitance variations at the amplifier IC input pin of less than 1 pF can significantly affect the response of the amplifier. In general, it is always best to keep signal lines as short and as straight as possible. Sharp 90_ corners should generally be avoided -- round corners or a series of 45_ bends should be used, instead. Stripline techniques should also be incorporated when signal lines are greater than 1 inch in length. These traces should be designed with a characteristic impedance of either 50 or 75 , as required by the application. Such signal lines should also be properly terminated with an appropriate resistor. Finally, proper termination of all inputs and outputs should be incorporated into the layout. Unterminated lines, such as coaxial cable, can appear to be a reactive load to the amplifier IC. By terminating a transmission line with its characteristic impedance, the amplifier's load then appears to be purely resistive, and reflections are absorbed at each end of the line. Another advantage of using an output termination resistor is that capacitive loads are isolated from the amplifier output. This isolation helps minimize the reduction in amplifier phase-margin and improves the amplifier stability for improved performance such as reduced peaking and settling times.
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General Information
General PowerPADt Design Considerations
1.9 General PowerPADt Design Considerations
The THS7001 IC is mounted in a special package incorporating a thermal pad that transfers heat from the IC die directly to the PCB. The PowerPAD package is constructed using a downset leadframe. The die is mounted on the leadframe but is electrically isolated from it. The bottom surface of the lead frame is exposed as a metal thermal pad on the underside of the package and makes physical contact with the PCB. Because this thermal pad is in direct physical contact with both the die and the PCB, excellent thermal performance can be achieved by providing a good thermal path away from the thermal pad mounting point on the PCB. Although there are many ways to properly heatsink this device, the following steps illustrate the recommended approach as used on the THS7001 EVM, which is built on a multilayer PCB with an internal ground plane. 1) Prepare the PCB with a top side etch pattern as shown in Figure 1-11. There should be etch for the leads as well as etch for the thermal pad.
Figure 1-11. PowerPAD PCB Etch and Via Pattern
Thermal pad area (0.12 x 0.17) with 8 vias (Via diameter = 13 mils)
2) Place 8 holes in the area of the thermal pad. These holes should be 13 mils in diameter. They are kept small so that solder wicking through the holes is not a problem during reflow. 3) Additional vias under the package, but outside the thermal pad area, will improve heat transfer but are not required. These holes should be 25 mils in diameter. They may be larger because they are not in the area to be soldered so that wicking is not a problem. 4) Connect all holes, the 8 within the thermal pad area and any others outside the pad area, to the internal ground plane. 5) When connecting these holes to the ground plane, do not use the typical web or spoke via connection methodology. Web connections have a high thermal resistance connection that is useful for slowing the heat transfer during soldering operations. This makes the soldering of vias that have plane connections easier. However, in this application, low thermal resistance is desired for the most efficient heat transfer. Therefore, the holes under the THS7001 package should make their connection to the internal ground plane with a complete connection around the entire circumference of the plated through hole.
General Information
1-15
General PowerPADt Design Considerations
6) The top-side solder mask should leave exposed the terminals of the package and the thermal pad area with its holes. Any larger holes outside the thermal pad area, but still under the package, should be covered with solder mask. 7) Apply solder paste to the exposed thermal pad area and all of the operational amplifier terminals. 8) With these preparatory steps in place, the THS7001 is simply placed in position and run through the solder reflow operation as any standard surface-mount component. This results in a part that is properly installed. The actual thermal performance achieved with the THS7001 in its PowerPAD package depends on the application. In the example above, if the size of the internal ground plane is approximately 3 inches x 3 inches, then the expected thermal coefficient, JA, is about 32.6_C/W. For a given JA, the maximum power dissipation is shown in Figure 1-12 and is calculated by the following formula:
P Where:
+ D
T
-T MAX A
q JA
PD = Maximum power dissipation of THS7001 (watts) TMAX = Absolute maximum junction temperature (150C) TA = Free-ambient air temperature (C) JA = JC + CA JC = Thermal coefficient from die junction to case (1.4 C/W) CA = Thermal coefficient from case to ambient air (C/W)
Figure 1-12. Maximum Power Dissipation vs Free-Air Temperature
MAXIMUM POWER DISSIPATION vs FREE-AIR TEMPERATURE
9 Tj = 150C 8 Maximum Power Dissipation - W 7 6 5 4 3 2 1 0 -40 JA = 74.4C/W 2 oz Trace and Copper Pad without Solder -20 0 20 40 60 80 100 TA - Free-Air Temperature - C JA = 32.6C/W 2 oz Trace and Copper Pad with Solder
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General Information
General PowerPADt Design Considerations
Even though the THS7001 EVM PCB is different from the one in the example above, the results should give an idea of how much power can be dissipated by the PowerPAD IC package. The THS7001 EVM is a good example of proper thermal management when using PowerPAD-mounted devices. Correct PCB layout and manufacturing techniques are critical for achieving adequate transfer of heat away from the PowerPAD IC package. More details on proper board layout can be found in the THS7001 Programmable-Gain Amplifier data sheet (SLOS214). For more general information on the PowerPAD package and its thermal characteristics, see the Texas Instruments Technical Brief, PowerPAD Thermally Enhanced Package (SLMA002).
General Information
1-17
THS7001 EVM Specifications
1.10 THS7001 EVM Specifications
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 V to 15 V Supply current, ICC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 mA, typ Input voltage, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VCC, max Output drive, THS7001 Preamplifier, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95 mA, typ Output drive, THS7001 PGA, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA, typ Continuous total power dissipation at TA = 25C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.8 W, max For complete THS7001 amplifier IC specifications and parameter measurement information, and additional application information, see the THS7001 data sheet, TI Literature Number SLOS214.
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General Information
Chapter 2
Reference
This chapter includes a parts list and PCB layout illustrations for the THS7001 EVM.
Topic
2.1 2.2
Page
THS7001 Dual Differential Line Drivers and Receivers EVM Parts List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2 THS7001 EVM Board Layouts
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-3
Reference
2-1
THS7001 Programmable-Gain Amplifier EVM Parts List
2.1 THS7001 Programmable-Gain Amplifier EVM Parts List
Table 2-1. THS7001 EVM Parts List
Reference C4, C5, C21 C9 - C15, C17 - C19 L1, L2 J5, J6, J9 J1 - J4 JP1 - JP3 P1 - P3 SW1 R6 R18, R31, R41 R5, R9 R44 R23, R25, R27, R29 R7, R8 R24, R26, R28, R30 R32, R42 U1 TP2 - TP8 TP1 R1, R2, R20 C3, C6 C7, C8 Description CAPACITOR, 6.8 F, 35V, 20%, TANTALUM, SM CAPACITOR, 0.1 F, CERAMIC, 10%, SM INDUCTOR, 0.22 H AXIAL, THRU HOLE CONNECTOR, BNC 50 OHM VERTICAL PC MOUNT JACK, THRU HOLE JACK, BANANA RECEPTACLE, FOR 0.025 DIA. HOLE HEADER, 3 PIN, 0.1 CTRS., 0.025 SQ. PINS SHORTING JUMPERS, 0.1 CTRS, FOR 0.025 SQ. PINS 6PST DIP SWITCH (CTS 219 NST Series Gold Finish) RESISTOR, 0 , 1/8 W, 1% SM RESISTOR, 49.9 , 1/10 W, 1% SM RESISTOR, 49.9 , 1/8 W, 1% SM RESISTOR, 100 , 1/8 W, 1% SM RESISTOR, 330 1/10 W, 5% SM RESISTOR, 499 , 1/10 W, 1% SM RESISTOR, 3.3 K , 1/10 W, 5% SM RESISTOR, 4.7 K , 1/10 W, 5% SM IC, THS7001CPWP TEST POINT, (RED) TEST POINT, (BLACK) RESISTOR, X OHMS, SM CAPACITOR, X F, 10% CERAMIC 4-40 THREAD HEX STANDOFFS 0.625" LENGTH, 0.250" OD 4-40 THREAD HEX SCREWS 0805 0805 0805 0805 1206 1206 0805 0805 0805 0805 0805 Size Qty 3 10 2 3 4 3 3 1 1 3 2 1 4 2 4 2 1 7 1 3 4 4 4 (MOUSER) 534-1804 (TI) THS7001CPWP (FARNELL) 240-345 (FARNELL) 240-333 (DIGI-KEY) CT2196MST-ND Manufacturer/Distributor Part Number (SPRAGUE) 293D685X9035D2T (MuRata) GRM40-X7R104K25 (DELEVAN) DN41221/ (DIGI-KEY) DN41221-ND (MOUSER) 523-31-5329 (NEWARK) 35F865 (DIGI-KEY) S1021-36-ND
PCB1 PCB, THS7001 EVM (SLOP250) 1 The values of these components are to be determined by the user in accordance with the application requirements.
2-2
Reference
THS7001 EVM Board Layouts
2.2 THS7001 EVM Board Layouts
Board layout examples of the THS7001 EVM PCB are shown in the following illustrations. They are not to scale and appear here only as a reference.
Figure 2-1. THS7001 EVM PC Board: Top Assembly
Figure 2-2. THS7001 EVM PC Board: Top Layer
Reference
2-3
THS7001 EVM Board Layouts
Figure 2-3. THS7001 EVM PC Board: Bottom Layer (Top VIew)
2-4
Reference

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