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W52900 ADPCM VOICE SYNTHESIZER (ROM-LESS PowerSpeech II)
GENERAL DESCRIPTION
The W52900 is a CMOS IC used solely for the purpose of demonstrating the W529xx series PowerSpeech II products. The W52900 is a 4-bit ADPCM and/or 8-bit PCM ROMless voice synthesizer that provides basic PowerSpeech instructions and a number of more powerful commands, including basic ALU operations, data move, branch, and random number generation. When used with a Winbond OTP or flash EPROM, the W52900 allows users to create demonstration devices quickly and easily.
FEATURES
* * * * * * * *
ROMless structure, used with Winbond OTP or serial flash EPROM for demonstration Powerful programmable speech synthesizer Wide operating voltage range: 2.4 to 5.5 volts Both 4-bit ADPCM and 8-bit PCM synthesis methods can be used Provides 4 trigger pins with separate control of falling/rising edges Two trigger input debounce times (160 to 320 S or 20 to 40 mS) can be set Eight multiplexed pins can be set as SCAN, FTEST, LED, STOP, or INPUT Supports ALU operations, including - Branch decisions - Logic operations - Binary addition/subtraction - Data move - Bit operand Eight general-purpose registers: R0 to R7 Four special registers: EN, MODEn (n:1, 2), OUTPUT, and ACC Maximum 32 matrix keys can be defined by H/W or S/W Provides random number generation by H/W Section control provided for each GO instruction - Variable frequency: 4.8/6/8/12 KHz - LED: ON/OFF Three LED flash types provided: 3 Hz/Circular/Random System clock uses 1.5 MHz frequency Total of 256 label entries available for programming Packaged in 24-pin skinny DIP
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PIN CONFIGURATION
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Publication Release Date: July 1996 Revision A1
W52900
WRP NC NC TEST TG1 TG2 TG3 TG4 IO1 IO2 IO3 IO4
1 2 3 4 5 6 7 8 9 10 11 12
24 23 22 21 20 19 18 17 16 15 14 13
DATA RDP V SS OSC V DD SPK RESET V SS IO8/FTEST IO7 IO6 IO5
PIN DESCRIPTION
NO. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 NAME WRP NC NC TEST TG1 TG2 TG3 TG4 IO1 IO2 IO3 IO4 IO5 IO6 IO7 IO8/FTEST I/O O I I I I I I/O I/O I/O I/O I/O I/O I/O I/O Not connected Not connected Test pin, internally pulled low Direct trigger input 1, internally pulled high Direct trigger input 2, internally pulled high Direct trigger input 3, internally pulled high Direct trigger input 4, internally pulled high SCAN/LED/STOP/INPUT multiplexed pin 1 SCAN/LED/STOP/INPUT multiplexed pin 2 SCAN/LED/STOP/INPUT multiplexed pin 3 SCAN/LED/STOP/INPUT multiplexed pin 4 SCAN/LED/STOP/INPUT multiplexed pin 5 SCAN/LED/STOP/INPUT multiplexed pin 6 SCAN/LED/STOP/INPUT multiplexed pin 7 LED/STOP/INPUT multiplexed pin 8 or frequency test pin DESCRIPTION Write clock output pin for serial interface
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W52900
Pin Description, continued
NO. 17 18 19 20 21 22 23 24
NAME VSS
RESET
I/O I O I O I/O Negative power supply
DESCRIPTION Reset; functions as POR; low active Current type output for speaker Positive power supply Oscillator input, connect ROSC to VDD Negative power supply Read clock output pin for serial interface Bidirectional data pin for serial interface
SPK VDD OSC VSS RDP DATA
BLOCK DIAGRAM
RDP WRP DATA
Entry
Decoder
JUMP/GO Controller
Control
Serial Interface Controller
Registers ALU
Synthesizer
D/A
SPK
Result
Power Regulator
V DD V SS RESET
I/O Port
OSC & Timing Generator
TG I/O
IO8/FTEST
OSC
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Publication Release Date: July 1996 Revision A1
W52900
FUNCTIONAL DESCRIPTION
Trigger Inputs
The W52900 provides four direct trigger input pins that are pulled high internally. All of these trigger inputs can be independently defined to be enabled or disabled by the rising or falling edge. The debounce time of the trigger inputs can be set as 160 S to 320 S or 20 mS to 40 mS.
SPK Output
This pin is a current-type voice output that is connected to the output of the internal D/A converter. The full-scale output of the 8-bit D/A convereter is 5 mA, which is sufficient to drive an external 8 speaker through the amplification of a low-power NPN transistor with a of 120 to 160 (an 8050D transistor is usually appropriate).
I/O Pin
The I/O pins, IO1 to IO8, are multiplexed for four different functions: SCAN/FTEST, LED, STOP, and INPUT. All of these pins can be defined independently as shown in the following table. GROUP 0 1 2 3 FTEST/LED IO8 IO7 IO6 SCAN/LED INPUT/LED LED/STOP IO5 IO4 IO3 IO2 IO1
INPUT/STOP
INPUT/LED SCAN/LED SCAN/STOP LED/STOP
Oscillator
The oscillator is used to generate the system frequency of around 1.5 MHz. The OSC pin is connected directly to VDD by an ROSC resistor, which is used to provide a bias current for the oscillator. RESET This is an active low reset input with an internal pull-high resistance. If customers turn the W52900 off and then on again without discharging the VDD to ground level, the chip may function abnormally, causing unpredictable operation. Users may reset the W52900 by sending a pulse through the RESET pin to restart the operation from the beginning.
ABSOLUTE MAXIMUM RATINGS
PARAMETER Power Supply Input Voltage Storage Temp. Operating Temp. SYMBOL VDD-VSS VIN TSTG TOPR CONDITIONS All Inputs RATED VALUE -0.3 to +7.0 VSS -0.3 to VDD +0.3 -55 to +150 0 to +70 UNIT V V C C
Note: Exposure to conditions beyond those listed under Absolute Maximum Ratings may adversely affect the life and reliability of the device.
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W52900
DC CHARACTERISTICS
(TA = 25 C, VSS = 0 V)
PARAMETER
SYM.
CONDITIONS MIN.
LIMITS TYP. 4.5 -5.0 1.5 4 MAX. 5.5 0.3 VDD VDD 1 400 800 -3 -6.0 1.65 7.5
UNI T
Operating Voltage Input Voltage Standby Current Operating Current
VDD VIL VIH IDD IOP1 IOP2
All Input Pins VDD = 5 V, No Playing VDD = 3 V, No Load VDD = 5 V, No Load VDD = 3 V, VIN = 0 V VDD = 4.5 V, RL = 100 VDD = 3 V, VOUT = 0.4 V VDD = 3 V, VOUT = 2.7 V ROSC = Typ. F(3 V) - F(2.4 V) F(3 V) FOSC = 1.5 MHz
2.4 VSS -0.3 0.7 VDD -4.0 1 -0.5 1.35 0
V V A A A mA mA MHz %
Input Current for TGn SPK (D/A Full Scale) Output Current for IOn Oscillation Frequency Oscillation Frequency Deviation by Voltage Drop. Input Debounce Time
IIN IO IOL IOH FOSC FOSC FOSC TDEB1 TDEB2
20 160
30 240
40 320
mS S
Note: ROSC = Typ. = 120 K.
-5-
Publication Release Date: July 1996 Revision A1
W52900
TYPICAL APPLICATION CIRCUIT_(I)
W52900
1
W55412A
24 1
3.6-5.5V
WRP NC NC TEST TG1 TG2 TG3 TG4 IO1 IO2 IO3 IO4
DATA RDP VSS OSC VDD SPK RESET VSS IO8/FTEST IO7 IO6 IO5
VPP
PGM
8
2
23 2 22 3 21
PREDATA VDD VSS WRP RDP DATA
7
3
6
4
ROSC
5 20
4
5
6
19
7
18
8
17
Speaker 8 ohm 1/4 watt T'x, 8050
9
16
10
15
CS LED R
RS
11
14
12
13
Notes: 1. In principle, the playing speed determined by ROSC should correspond to the sampling rate during the coding phase. The playing speed may be adjusted by varying ROSC, however. 2. RS is an optional current-dividing resistor. If RS is added, the resistance should be between 470 and 750 . 3. CS is optional. 4. The DC current gain of transistor 8050 ranges from 120 to 160. 5. All unused trigger pins can be left open because of their internal pull-high resistance. 6. R is used to limit the current on the LED. 7. Typical Rosc is 120 K.
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W52900
TYPICAL APPLICATION CIRCUIT_(II)
W52900
1
W55FXX
24 1
3.6-5.5V
WRP NC NC TEST TG1 TG2 TG3 TG4 IO1 IO2 IO3 IO4
DATA RDP VSS OSC VDD SPK RESET VSS IO8/FTEST IO7 IO6 IO5
EOP CTRL VSS ADDR
MODE V DD CLK DATA
8
2
23
2
7
3
22
3
6
4
21
ROSC
5 20
4
5
6
19
7
18
8
17
Speaker 8 ohm 1/4 watt T'x, 8050
9
16
10
15
CS LED R
RS
11
14
12
13
Notes: 1. In principle, the playing speed determined by ROSC should correspond to the sampling rate during the coding phase. The playing speed may be adjusted by varying ROSC, however. 2. RS is an optional current-dividing resistor. If RS is added, the resistance should be between 470 and 750 . 3. CS is optional. 4. The DC current gain of transistor 8050 ranges from 120 to 160. 5. All unused trigger pins can be left open because of their internal pull-high resistance. 6. R is used to limit the current on the LED. 7. Typical ROSC is 120 K.
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Publication Release Date: July 1996 Revision A1
W52900
BONDING PAD DIAGRAM
WRP DATA RDP VSS
OSC TEST V DD TG1 SPK TG2 TG3 TG4 RESET IO1 VSS
(0,0)
IO2
IO3
IO4
IO5
IO6
IO7
IO8/FTEST
Headquarters
No. 4, Creation Rd. III, Science-Based Industrial Park, Hsinchu, Taiwan TEL: 886-3-5770066 FAX: 886-3-5792697 http://www.winbond.com.tw/ Voice & Fax-on-demand: 886-2-7197006
Winbond Electronics (H.K.) Ltd.
Rm. 803, World Trade Square, Tower II, 123 Hoi Bun Rd., Kwun Tong, Kowloon, Hong Kong TEL: 852-27516023 FAX: 852-27552064
Winbond Electronics North America Corp. Winbond Memory Lab. Winbond Microelectronics Corp. Winbond Systems Lab.
2730 Orchard Parkway, San Jose, CA 95134, U.S.A. TEL: 1-408-9436666 FAX: 1-408-9436668
Taipei Office
11F, No. 115, Sec. 3, Min-Sheng East Rd., Taipei, Taiwan TEL: 886-2-7190505 FAX: 886-2-7197502
Note: All data and specifications are subject to change without notice.
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