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Weltrend Semiconductor, Inc.
WT6803
Monitor On-Screen Display
Data Sheet
REV. 1.01 September 24, 2001
The information in this document is subject to change without notice. (c)Weltrend Semiconductor, Inc. All Rights Reserved.
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2F, No. 24, Industry E. 9 th RD., Science-Based Industrial Park, Hsin-Chu, Taiwan TEL:886-3-5780241 FAX:886-3-5794278.5770419 Email:support@weltrend.com.tw
WT6803
Data Sheet Rev. 1.01
GENERAL DESCRIPTION
WT6803 is designed to interface with a MCU to do the OSD (On Screen Display) function in CRT monitor. The on-chip PLL generates a wide-ranged system clock up to 160 MHz to meet the resolution requirements (OSD resolution is programmable) of different display modes. The full OSD screen size is 30 columns x 15 rows, and setting the internal registers can freely program the OSD position. Special functions include color font, character bordering, shadowing, blinking, double height, double width, all blanking effect, row to row spacing control, 4 windows with shadowing and programmable fin in / fan out effect.
FEATURES
* Programmable horizontal resolutions up to 2040 dots per line * Horizontal frequency up to 150kHz * Dot Frequency generated by On-chip PLL up to 160MHz * Fully programmable character array of 15 rows by 30 columns * 12x18 dot matrix per character * 256 characters and graphic symbols ROM including 16 multi-color fonts * 8 colors per display character * 7 colors per display character background * 4 programmable windows * 8 colors per display window * 8 colors per display window shadowing * Double character height and width control * Programmable character height (18 to 69 lines) * Programmable row-to-row spacing * Programmable OSD vertical and horizontal starting position * Bordering, shadowing and blinking effect * Fade-in/fade-out effects * I2C interface with slave address $7AH * Power supply: 5V * Package type: 16-pin plastic DIP
PIN CONFIGURATION
VSSA 1 NC 2 VCO 3 VDDA 4 HS 5 NC 6 SDA 7 SCL 8
16 VSS 15 R 14 G 13 B 12 BLANK 11 NC 10 VS 9 VDD
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WT6803
WT6803
Data Sheet Rev. 1.01
BLOCK DIAGRAM
SDA SCL
MCU Interface
Display RAM
Display Font ROM
Window Control Circuit / Frame
VS
12 bit Shift Registers
Vertical Sync Control Circuit R, G, B Video Output Control Circuit
BLANK
VCO HS
PLL Circuit Horizontal Sync Control Circuit
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WT6803
Data Sheet Rev. 1.01
PIN DESCRIPTION
Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Pin Name VSSA NC VCO VDDA HS NC SDA SCL VDD VS NC FBKG B G R VSS I I I I/O Analog ground. No connection. I/O Loop filter of PLL. Analog power supply Horizontal sync input. No connection. I/O Serial data of I2C interface. Serial clock of I2C interface. Digital power supply Vertical sync input. No connection. Fast Blanking output. This pin controls the mixer of vedio amplifier O to cutoff the video signal while displaying character or window. O Blue color output O Green color output O Red color output Digital ground Description
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WT6803
Data Sheet Rev. 1.01
MCU INTERFACE
SDA CHIP ADDRESS ACK DATA BYTES ACK
SCL 1 START 2-7 8 9 STOP
WT6803 uses I2 C to interface with MCU, the Max. data rate is 100 kbps. Default Chip Address byte is as : A6 0 A5 1 A4 1 A3 1 A2 1 A1 0 A0 1 Read / Write R= 1 , W= 0
(i.e. 7AH for write) The MCU master initiates a transmission by sending a START ( SDA goes low first, then SCL goes low ), followed by a slave Chip Address byte. Once the address is properly identified, the slave WT6803 will respond with an ACK by pulling SDA to low during the 9th SCL clock. Each data byte, which then follows, must be 8 bits long with an ACK as the 9th bit. In the case of no ACK or complete of data transmission, the master will send a STOP (SCL goes high first, then SDA goes high).
DATA TRANSMISSION FORMAT Data write
To access a specific register in WT6803 , a Row address byte and a Column address byte must be given by MCU to WT6803. There are 3 kinds of data transmission format options to optimize the transmission efficiency, depending on different situations. (A) R X/ C X/ D X/ R X/ C X/ D X/.......... (B) R X/ C X/ D X/ C X/ D X/ C X/.......... (C) R X/ C X/ D X/ D X/ D X/ D X/.......... R : Row address byte , C : Column address byte , D : Data byte
During a single transmission, it is permissible to change the format from (A) to (B), or from (A) to (C), or from (B) to (A),or from (B) to (C), but not from (C) back to (A) or (B). During a Data bytes updating, it is recommended that format (A) is used for those Data bytes which have different Row and different Column address bytes, format (B) for the same Row but different Column address bytes and format (C) for the same Row address and continuous Column address bytes. Format (C) is the best choice for large area screen pattern updating, these Data bytes will be written with Column address bytes automatically increased for each Data byte updating. During the format (C) transmission, a dummy Data byte should be inserted in Data byte train if Column address reaches one of those undefined registers in WT6803. To differentiate the Row address byte of Character Display Register from the Row address byte of Character Attribute register, the most significant 3 bits are set to " 100 " to represent the Character Display Row address byte, and " 101 " for Character Attribute ROW address byte. Bit 7 (Character Display, Window Reg) Row address byte (Character/ Row Attribute, Control, Auto-calibration Reg) Row address byte Column address byte Column address byte 1 1 0 0 Bit 6 0 0 0 1 Bit 5 0 1 X X Bit 4 X X AD AD Bit 3 AD AD AD AD Bit 2 AD AD AD AD Bit 1 AD AD AD AD Bit 0 AD AD AD AD Format A,B,C A,B,C A,B C
X : Don't Care
AD : Address of register
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WT6803
Data Sheet Rev. 1.01
0
COLUMN
28 29 30 Row Attribute Reg
Bit7-5 of address byte =100 Bit7-5 of address byte=101
REGISTER DESCRIPTION
(1)Character Display Registers
Bit 0~7 Symbol CRAD0 ~ CRAD7
Note: For all the Character Display Registers (described in (1) above) and the Window Registers (described in (4) below ), the most significant 3 bits of their Row address bytes must be set to "100" during the data transmission between MCU and WT6803. But for all the other registers (Character Attribute Registers Row Attribute Registers and Control Registers ), the Row address bytes must be set to "101".
(2)Character Attribute Registers
Bit 0 1 2 3 4 5 6 7 R G Symbol B G R BLINK BB BG BR
0 0 0 Black TRANSPARENT Black Black TRANSPARENT 0 0 1 Blue Blue Blue Blue Blue 0 1 0 Green Green Green Green Green 0 1 1 Cyan Cyan Cyan Cyan Cyan 1 0 0 Red Red Red Red Red 1 0 1 Magenta Magenta Magenta Magenta Magenta 1 1 0 Yellow Yellow Yellow Yellow Yellow 1 1 1 White White White White White Table 1 color for character foreground, character background, window, border/shadow and color font
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0 ROW 13 14 15
Character Display Reg
Character Attribute Reg
Window Reg Control Reg
ROW m (m=0~14) ; COLN n (n=0~29)
Description
These 8 bits, CRAD7~CRAD0, select 1 character/symbol to be displayed on OSD screen from the 256 characters/ symbols in the ROM fonts.
ROW m (m=0~14) ; COLN n (n=0~29)
Description
R, G, B defines the foreground color of t e corresponding character/ symbol selected by h Character Display Register. Refer to Table 1 If BLINK=1, the corresponding character/ symbol selected by Character Display Registers will blink. The blinking frequency is the frequency of VS divided by 64 and the duty cycle is 50%. BR, BG, BB defines the background color of the corresponding character selected by the Character Display Registers, but, if BR, BG, BB =(0, 0, 0), there is no background (i.e. transparent) for this character/ symbol. Refer to Table 1. Not used B Foreground Background Window Border and shadow Color font (F0H-FFH)
WT6803
Data Sheet Rev. 1.01
(3)Row Attribute Registers
Bit 0 1 2~7 Symbol DWm DHm
ROW m (m=0~14) ; COLN 30
Description
Double Width control for ROWm (m=0~14). If DWm=1, the widths of the even column characters in ROWm will be doubled and the odd column characters will not be displayed. Double Height control for ROWm (m=0~14). If DHm=1, the heights of all the characters in ROWm will be doubled. ( for WT6803 only) Not used
(4) Window Registers
Window1 Registers ROW 15 ; COLN n (n= 0~2) Window2 Registers ROW 15 ; COLN n (n= 3~5) Window3 Registers ROW 15 ; COLN n (n= 6~8) Window4 Registers ROW 15 ; COLN n (n= 9~11) Other window registers ROW 15 ; COLN 12~15 Note: There are 4 windows Max. can be set up, the controls of these windows are similar, take Window1 as an example:
Window1 Registers:
ROW 15 ; COLN 0 Bit 0~3 4~7 Symbol WREND0~ WREND3 WRSTART0~ WRSTART3 Description WREND3~0 defines the row end address of Window1 WRSTART3~0 defines the row start address of Window1
ROW 15 ; COLN 1 Bit 0 1 2 3~7 Symbol WSHD WENB WCSTART0~ WCSTART4 Description If WSHD=1, black-edge shadowing of Window1 will be enabled Not used If WENB=1, Window1 will be enabled. If WENB=0, Window1 is disabled. WCSTART4~0 defines the column start address of window1
ROW 15 ; COLN 2 Bit 0 1 2 3~7 Symbol WB WG WR WCEND0~ WCEND4 Description WR, WG, WB defines the Window1 color. Refer to Table 1. The Window1 color will offer the background color( if Window1 is enabled ) for those characters which background color settings are transparent and are included in the Window1 area. WCEND4~0 defines the column end address of Window1
Note: There are 4 windows can be used. If window over-lapping happens, the higher priority window will cover the lower one. Window1 has the highest priority and Window4 the least.
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WT6803
Data Sheet Rev. 1.01
Other window Registers:
ROW 15 ; COLN 12 ( window shadow height setting ) Bit 0 1 2 3 4 5 6 7 Symbol WSH10 WSH11 WSH20 WSH21 WSH30 WSH31 WSH40 WSH41 Description Defines the window shadow height of Window1. Refer to table 3. Defines the window shadow height of Window2. Refer to table 3. Defines the window shadow height of Window3. Refer to table 3. Defines the window shadow height of Window4. Refer to table 3.
ROW 15 ; COLN 13 ( Window shadow width setting ) Bit 0 1 2 3 4 5 6 7 WSWk1 0 0 1 1 Table 2 Symbol WSW10 WSW11 WSW20 WSW21 WSW30 WSW31 WSW40 WSW41 WSWk0 0 1 0 1 Description Defines the window shadow width of Window1. Refer to table 2. Defines the window shadow width of Wndow2. Refer to table 2. Defines the window shadow width of Window3. Refer to table 2. Defines the window shadow width of Wndow4. Refer to table 2.
Shadow width( dots) 2 4 6 8
WSHk1 0 0 1 1
WSHk0 0 1 0 1
Shadow height( scan lines ) 2 4 6 8
k=1~4 for window1-window4
Table 3 K=1~4 for window1-window4
X (dots) X is decided by ( WSWk1, WSWk0 ) Y is decided by ( WSHk1, WSHk0 ) Window area Y(scan lines) Y(scan lines)
Window shadow X (dots)
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WT6803
Data Sheet Rev. 1.01
ROW 15 ; COLN 14 ( window shadowing color s etting ) Bit 0~2 3 4~6 7 Symbol WSC1(B,G,R) WSC2(B,G,R) Description Defines the window shadowing color of Window1. Refer to Table 1. Not used Defines the window shadowing color of Window2. Refer to Table 1. Not used
ROW 15 ; COLN 15 ( window shadowing color setting ) Bit 0~2 3 4~6 7 Symbol WSC3(B,G,R) WSC4(B,G,R) Description Defines the window shadowing color of Window3. Refer to Table 1. Not used Defines the window shadowing color of Window4. Refer to Table 1. Not used
(5) Control Registers
ROW 15 ; COLN 0 Bit 0~7 Symbol Reserved Must set "0". Description
ROW 15 ; COLN 1 ( OSD resolution setting ) Bit 0~7 Symbol DOTN0~ DOTN7 If DR=0, OSD resolution = DOTN X 4 where DOTN = (DOTN7....DOTN0 2) Description , if DR =1 ,OSD resolution = DOTN X 8
ROW 15 ; COLN 2 ( Horizontal start position ) Bit Symbol Description The OSD horizontal start position = HP X 6 dots , counting from the trailing edge of HS pin signal. Where HP = ( HP7..... HP0 2) ( HP7..... HP0 2) = ( 00..0 ) is not allowed.
0~7
HP0~HP7
ROW 15 ; COLN 3 ( Vertical start position setting ) Bit Symbol Description The OSD vertical start position = VP X 4 + 1 scan lines , counting from the leading edge of VS pin signal . Where VP = ( VP7..... VP0 2) ( VP7..... VP0 2) = ( 00..0 ) is not allowed.
0~7
V0~VP7
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WT6803
Data Sheet Rev. 1.01
ROW 15 ; COLN 4 ( Character height & Dot frequency range setting ) Bit Symbol Description The character height can be expanded from the 12 X 18 font matrix by setting CH5~CH0. The display character height = CH + ADJ scan lines, (i.e. Character height range is 18 to 69 scan lines) Where CH = ( CH5....CH0 2) CH should be 16 ( default ) at least. ADJ = 2 if 16 O CH < 32 4 if 32 O CH < 48 6 if 48 O CH < 64 ( HF, LF ) determines the frequency range of Dotc, dot frequency from the PLL, ( HF, LF ) = (1,1) 105 MHz < Dotc O 160 MHz ( HF, LF ) = (1,0) 50 MHz < Dotc O 110 MHz ( HF, LF ) = (0,0) 25 MHz < Dotc O 55 MHz ( HF, LF ) = (0,1) 12.5 MHz O Dotc < 28 MHz Note: If Disable CMODE : DR=0, Dotc = DOTN X 4 X (Frequency of HS), DR =1, Dotc = DOTN X 8 X (Frequency of HS) If enable CMODE: DR=0, Dotc = (DOTN X 4) X (HTOTAL / HPERIOD) X (Frequency of HS) DR=1, Dotc = (DOTN X 8) X (HTOTAL / HPERIOD) X (Frequency of HS) HTOTAL
0~5
CH0~CH5
6
LF
7
HF
HPERIOD HWIDTH The default value of (HF, LF) is (0, 0)
Note: The character height is the result of : multi-scan lines
plus
repeat lines
(CH5, CH4) determines the multi-scan lines (duplicating the all the scan lines originated from the 12 X 18 font matrix) as: Single-scan lines (18 scan lines) if (CH5, CH4) = 01 Double-scan lines (36 scan lines) if (CH5, CH4) = 10 Triple-scan lines (54 scan lines) if (CH5, CH4) = 11 (CH3 ~ CH0) determines the repeat lines (repeating the scan lines, ranging from 0 to 15 lines, originated from the 12 X 18 font matrix) as: REPEAT LINES 8 9 10 V V V
0 CH0=1 CH1=1 CH2=1 CH3=1 Table 4. Repeat
1 2 V lines
3 V -
4 V
5 V -
6 V
7 V -
11 V -
12 V
13 V -
14 V
15 V -
16 V
17 -
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WT6803
Data Sheet Rev. 1.01
ROW 15 ; COLN 5 ( Miscellaneous setting ) Bit 0 1 2 3 4 Symbol BLANKC FAN DIV CLR CMODE Description If BLANKC=0 , BLANK pin will be high during displaying character foreground and window. If BLANKC=1 , BLANK pin will be high only during displaying character foreground . If FAN=1, fan in (/ fan out) effect is enabled while the OSD is turned on (/off) by setting OSDEN=1 (/0) If DIV=0, the fan in/ fan out speed will be high speed than DIV=1 Setting CLR=1 will clear all the Character Display Registers and Character Attribute Registers Setting CMODE=1 will refresh the horizontal synchronous pulse width and keep the ratio of A : B : C (refer to the figure below) same as the last display mode. After this action, CMODE will return to 0 automatically. CMODE setting can (option) be used when a new display mode is coming and want to keep fixed A : B : C ratio. If SHDW=1, black-edged shadow is selected when BSEN=1 If SHDW=0, black-edged border is selected when BSEN=1 If BSEN=1, enable character bordering (or shadowing depending on SHDW) If OSDEN=1 , enable OSD circuit.
5 6 7
SHDW BSEN OSDEN
A
B OSD Monitor video raster
C
ROW 15 ; COLN 6 ( Miscellaneous setting ) Bit 0 1 2 3~7 Symbol VSPO HSPO TRI SP0~SP4 Description If the polarity of VS pin input signal is negative, set VSPO to 0 (default), and set to 1 for positive VS. If the polarity of HS pin input signal is negative, set HSPO to 0 (default), and set to 1 for positive HS. If TRI=1, then R, G, B, BLANK output pins will be Low when OSDEN=0 (OSD disabled) If TRI=0, then R, G, B, BLANK output pins will be in high impedance state when OSDEN=0 (OSD disabled) SP4~SP0 defines the row to row space in unit of horizontal scan lines.
ROW 15 ; COLN 7 Bit 0~2 3 4~7 Symbol SREST Description Must set "0" Set to 1 for software reset, then set to 0 for normal operation. Must set "0"
ROW 15 COLN 8~15 (Reserved) Bit 0~7 Symbol Reserved Description
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WT6803
Data Sheet Rev. 1.01
ROW 15 ; COLN 16 (Miscellaneous setting) Bit 0 1 2 3 4 5 6 7 Symbol BSB BSG BSR CFONT CMODEEN DR Description BSR, BSG, BSB defines the border and shadow color. Refer to Table 1. Not used Color font selected at address F0H to FFH if CFONT=1, otherwise mono-color selected at address F0H to FFH Not used Set to 0 for enable CMODE function, set to 1 for disable CMODE function Double OSD resolution enabled if DR=1
COLOR FONT
There are total 256 fonts can be used in WT6803, address 00H should be left blank--all white, Font address from F0 to FFH are replaced by setting "CFONT = 1", used for color fonts. Each color font is made up of 3 different R, G, B fonts which should be defined during the font design stage. Refer to table 1 for the relation between color font and R, G, B fonts
+
+
Yellow Blue
R Font
G Font
B Font
Color Font
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WT6803
Data Sheet Rev. 1.01
APPLICATION DIAGRAM
VCC Bead or Inductor (>100gH)
(Option) 0.1gF 100gF 1 2 3 VDD 9 16 10 gF 0.1 gF
VSSA
4700P
1K 0.22gF
SSA NC
VCO
VSS
15 R
100 R 100 G 100 B
4 VDDA 14 330 HSYNC WT6803 5 HS B 13 G
100 I 2C BUS
7
BLANK SDA
12
BLANK 10K
100
8
SCL
VS
10 VSYNC
ANALOG GROUND DIGITAL GROUND Note: Let the analog ground floating
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WT6803
Data Sheet Rev. 1.01
ABSOLUTE MAXIMUM RATINGS (Voltage Referenced to VSS)
Symbol VDD V in Id Ta V stg Supply Voltage Input Voltage Current Drain per Pin Excluding VDD and VSS Operating Temperature Range Storage Temperature Range Characteristic Value -0.3 to + 7.0 VSS - 0.3 to VDD + 0.3 25 0 to 70 -40 to +125 Unit V V mA J J
Note: Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the limits in the Electrical Characteristics tables or Pin Description section.
AC ELECTRICAL CHARACTERISTICS (VDD, VDDA = 5.0V, VSS, VSSA = 0V, TA = 25C, Voltage Referenced to VSS)
Symbol tr tf FHS Characteristic Output Signal ( R, G, B, BLANK ), Cload = 20 pF Rise Time, Fall Time HS Input Frequency Min 15K Typ Max 6 6 150K Unit ns ns Hz
90% 10% tf
Switching Characteristics
90% 10% tr
DC CHARACTERISTICS (VDD , VDDA = 5.0 VO10%, VSS , VSSA = 0 V, TA = 25J, Voltage Referenced to V SS)
Symbol V OH Characteristic High Level Output Voltage Iout = -5mA Low Level Output Voltage Iout = 5mA Digital Input Voltage (Not Including SDA and SCL) Logic Low Logic High Input Voltage of Pin SDA and SCL Logic Low Logic High High-Z Leakage Current (R, G, B and BLANK) Input Current (Not Including VCO, R, G, B, BLANK and INTN) Supply Current (NO Load on Any Output) at VDD = 5.0V Min V DD -0.8 Typ Max Unit V
V OL
V SS +0.4
V
V IL V IH V IL V IH III III IDD
0.7 V DD 0.7 V DD -10 -10

0.3 V DD
0.3 V DD
V V V V gA gA mA
+10 +10 +28
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WT6803
Data Sheet Rev. 1.01
PACKAGE OUTLINE
PDIP 16-pin package
Package typeG Pin DIP 300mil 16
SYMBOLS A A1 A2 B C D E E1 F L MIN 0.015 0.125 NOR UNITG INCH MAX 0.210 0.135
0.735 0.245 0.115 0.335 0
0.130 0.018 0.060 0.755 0.300 BSC 0.250 0.100 0.130 0.355 7
0.775 0.255 0.150 0.375 15
eB
cX
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