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INTEGRATED CIRCUITS
DATA SHEET
TZA3043; TZA3043B Gigabit Ethernet/Fibre Channel transimpedance amplifier
Product specification Supersedes data of 2001 Apr 17 2002 Sep 06
Philips Semiconductors
Product specification
Gigabit Ethernet/Fibre Channel transimpedance amplifier
FEATURES * Wide dynamic range, typically 2.5 A to 1.5 mA * Low equivalent input noise, typically 5.7 pA/Hz * Differential transimpedance of 8.3 k * Wide bandwidth from DC to 950 MHz * Differential outputs * On-chip Automatic Gain Control (AGC) * No external components required * Single supply voltage from 3.0 to 5.5 V * Bias voltage for PIN diode * Pin compatible with TZA3023 and SA5223 * Switched output polarity available (B-version) * Goldplated version available for direct placement of photodiode on die. ORDERING INFORMATION TYPE NUMBER TZA3043T TZA3043U TZA3043U/G TZA3043BT TZA3043BU TZA3043BU/G PACKAGE NAME SO8 - - SO8 - - DESCRIPTION APPLICATIONS
TZA3043; TZA3043B
* Digital fibre optic receiver in medium and long haul optical telecommunications transmission systems or in high speed data networks * Wideband RF gain block. GENERAL DESCRIPTION The TZA3043 is a high speed transimpedance amplifier with AGC designed to be used in Gigabit Ethernet/Fibre Channel optical links. It amplifies the current generated by a photo detector (PIN diode or avalanche photodiode) and converts it to a differential output voltage.
VERSION SOT96-1 - - SOT96-1 - -
plastic small outline package; 8 leads; body width 3.9 mm bare die in waffle pack carriers; die dimensions 1.030 x 1.300 mm bare die with goldplating in waffle pack carriers; die dimensions 1.030 x 1.300 mm plastic small outline package; 8 leads; body width 3.9 mm bare die in waffle pack carriers; die dimensions 1.030 x 1.300 mm bare die with goldplating in waffle pack carriers; die dimensions 1.030 x 1.300 mm
2002 Sep 06
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Philips Semiconductors
Product specification
Gigabit Ethernet/Fibre Channel transimpedance amplifier
BLOCK DIAGRAM
handbook, full pagewidth
TZA3043; TZA3043B
AGC(1)
VCC 8 (11, 12)
VCC 1 nF DREF 1 (1) 125 10 pF IPhoto 3 (4) A1 low noise amplifier 125 GAIN CONTROL
(13)
peak detector
(10) 7 A2 single-ended to differential converter (9) 6
OUTQ OUT
TZA3043T TZA3043U
BIASING 2, 4, 5 (2, 3, 5, 6, 7, 8)
MGU096
GND The numbers in brackets refer to the pad numbers of the bare die version. (1) AGC analog I/O (pad 13) is only available on the TZA3043U.
Fig.1 Block diagram of TZA3043T and TZA3043U.
handbook, full pagewidth
AGC(1)
VCC 8 (11, 12)
VCC 1 nF DREF 1 (1) 125 10 pF IPhoto 3 (4) A1 low noise amplifier 125 GAIN CONTROL
(13)
peak detector
(9) 6 A2 single-ended to differential converter (10) 7
OUTQ OUT
TZA3043BT TZA3043BU
BIASING 2, 4, 5 (2, 3, 5, 6, 7, 8)
MGU097
GND
The numbers in brackets refer to the pad numbers of the bare die version. (1) AGC analog I/O (pad 13) is only available on the TZA3043BU.
Fig.2 Block diagram of TZA3043BT and TZA3043BU.
2002 Sep 06
3
Philips Semiconductors
Product specification
Gigabit Ethernet/Fibre Channel transimpedance amplifier
PINNING SYMBOL DREF PIN TZA3043T 1 PIN TZA3043BT 1 PAD TZA3043U 1 PAD TZA3043BU 1 TYPE analog output ground analog input
TZA3043; TZA3043B
DESCRIPTION bias voltage for PIN diode; cathode should be connected to this pin; note 1 ground current input; anode of PIN diode should be connected to this pin; DC bias level of 822 mV is one diode voltage above ground ground ground data output; pin OUT goes HIGH when current flows into pin IPhoto compliment of pin OUT supply voltage AGC analog I/O
GND IPhoto
2 3
2 3
2, 3 4
2, 3 4
GND GND OUT OUTQ VCC AGC Note
4 5 6 7 8 -
4 5 7 6 8 -
5, 6 7, 8 9 10 11, 12 13
5, 6 7, 8 10 9 11, 12 13
ground ground data output data output supply input/ output
1. For the TZA3043BU/G and TZA3043U/G this pad is connected to the gold layer on top of the passivation layer.
handbook, halfpage
handbook, halfpage
DREF 1 GND 2
8 VCC 7 OUTQ OUT GND
DREF 1 GND 2
8 VCC 7 OUT OUTQ GND
TZA3043T
IPhoto GND 3 4
MGR287
TZA3043BT
6 5 IPhoto GND 3 4
MGU098
6 5
Fig.3 Pin configuration of TZA3043T.
Fig.4 Pin configuration of TZA3043BT.
2002 Sep 06
4
Philips Semiconductors
Product specification
Gigabit Ethernet/Fibre Channel transimpedance amplifier
FUNCTIONAL DESCRIPTION The TZA3043 is a transimpedance amplifier intended for use in fibre optic links for signal recovery in Fibre Channel or Gigabit Ethernet applications. It amplifies the current generated by a photo detector (PIN diode or avalanche photodiode) and transforms it into a differential output voltage. The most important characteristics of the TZA3043 are high receiver sensitivity and wide dynamic range. High receiver sensitivity is achieved by minimizing noise in the transimpedance amplifier. Input circuit The signal current generated by a PIN diode can vary between 2.5 A to 1.5 mA (p-p). An AGC loop is implemented to make it possible to handle such a wide dynamic range. The AGC loop increases the dynamic range of the receiver by reducing the feedback resistance of the preamplifier.
TZA3043; TZA3043B
The AGC loop hold capacitor is integrated on-chip, so an external capacitor is not needed for AGC. AGC monitoring The AGC voltage can be monitored at pad 13 on the bare die (TZA3043U/TZA3043BU). Pad 13 is not bonded in the packaged device (TZA3043T/TZA3043BT). This pad can be left unconnected during normal operation. It can also be used to force an external AGC voltage. If pad 13 (AGC) is connected to GND, the internal AGC loop is disabled and the receiver gain is at a maximum. The maximum input current is then approximately 75 A. Output circuit A differential amplifier converts the output of the preamplifier to a differential voltage (see Fig.5). The logic level symbol definitions for the differential outputs are shown in Fig.6.
handbook, full pagewidth
VCC 800 800 30 OUTQ 30 OUT 4.5 mA 2 mA 4.5 mA
MGR290
Fig.5 Differential data output circuit.
handbook, full pagewidth
VCC VO(max) VOQH VOH Vo(p-p) VOQL VOL VO(min) VOO
MGR243
Fig.6 Logic level symbol definitions for data outputs OUT and OUTQ.
2002 Sep 06
5
Philips Semiconductors
Product specification
Gigabit Ethernet/Fibre Channel transimpedance amplifier
PIN diode bias voltage DREF The transimpedance amplifier together with the PIN diode determines the performance of an optical receiver for a large extent. Especially how the PIN diode is connected to the input and the layout around the input pin influence the key parameters like sensitivity, the bandwidth and the Power Supply Rejection Ratio (PSRR) of a transimpedance amplifier. The total capacitance at the input pin is critical to obtain the highest sensitivity. It should be kept to a minimum by reducing the capacitance of the PIN diode and the parasitics around the input pin. The PIN diode should be placed very close to the IC to reduce the parasitics. Because the capacitance of the PIN diode depends on the reverse voltage across it, the reverse voltage should be chosen as high as possible. The PIN diode can be connected to the input in two ways as shown in Figs 7 and 8. In Fig.7 the PIN diode is connected between pins DREF and IPhoto. Pin DREF provides an easy bias voltage for the PIN diode. The voltage at DREF is derived from VCC by a low-pass filter. The low-pass filter consisting of the internal resistors R1, R2, C1 and the external capacitor C2 rejects the supply voltage noise. The external capacitor C2 should be equal or larger then 1 nF for a high PSRR.
TZA3043; TZA3043B
The reverse voltage across the PIN diode is 4.18 V (5 - 0.82 V) for 5 V supply or 2.48 V (3.3 - 0.82 V) for 3.3 V supply. It is preferable to connect the cathode of the PIN diode to a higher voltage then VCC when such a voltage source is available on the board. In this case pin DREF can be left unconnected. When a negative supply voltage is available, the configuration in Fig.8 can be used. It should be noted that in this case the direction of the signal current is reversed compared to the Fig.7. Proper filtering of the bias voltage for the PIN diode is essential to achieve the highest sensitivity level.
VCC R2 DREF 1 125 C2 1 nF Ii R1 125 C1 10 pF 8 R2 DREF 1 125 R1 125 C1 10 pF
VCC 8
3 IPhoto
IPhoto 3
TZA3043
MGU103
Ii
TZA3043
MGU104
negative supply voltage
Fig.7
The PIN diode connected between the input and pin DREF.
Fig.8
The PIN diode connected between the input and a negative supply voltage.
2002 Sep 06
6
Philips Semiconductors
Product specification
Gigabit Ethernet/Fibre Channel transimpedance amplifier
AGC The TZA3043 transimpedance amplifier can handle input currents from 1 A to 1.5 mA. This means a dynamic range of 63 dB. At low input currents, the transimpedance must be high to get enough output voltage, and the noise should be low enough to guaranty minimum bit error rate. At high input currents however, the transimpedance should be low to avoid pulse width distortion. This means that the gain of the amplifier has to vary depending on the input signal level to handle such a wide dynamic range. This is achieved in the TZA3043 by implementing an Automatic Gain Control (AGC) loop. The AGC loop consists of a peak detector, a hold capacitor and a gain control circuit. The peak amplitude of the signal is detected by the peak detector and it is stored on the hold capacitor. The voltage over the hold capacitor is compared to a threshold level. The threshold level is set to 25 A (p-p) input current. AGC becomes active only for input signals larger than the threshold level.
TZA3043; TZA3043B
It is disabled for smaller signals. The transimpedance is then at its maximum value (8.3 k differential). When AGC is active, the feedback resistor of the transimpedance amplifier is reduced to keep the output voltage constant. The transimpedance is regulated from 8.3 k at low currents (I < 30 A) to 1 k at high currents (I < 500 A). Above 500 A the transimpedance is at its minimum and can not be reduced further but the front-end remains linear until input currents of 1.5 mA. The upper part of Fig.9 shows the output voltages of the TZA3043 (OUT and OUTQ) as a function of the DC input current. In the lower part, the difference of both voltages is shown. It can be seen from the figure that the output changes linearly up to 25 A input current where AGC becomes active. From this point on, AGC tries to keep the differential output voltage constant around 200 mV for medium range input currents (input currents <200 A). The AGC can not regulate any more above 500 A input current and the output voltage rises again with the input current.
MGU105
handbook, full pagewidth V
3.9
o (V)
3.7
VOUT
3.5 VCC = 5 V 3.3 VOUTQ 3.1 600 Vo(dif) (mV) 400
(2) (3) (1)
200
0 1 10
102
103
Ii (A)
104
Vo(dif) = VOUT - VOUTQ. (1) VCC = 3 V. (2) VCC = 3.3 V. (3) VCC = 5 V.
Fig.9 AGC characteristics.
2002 Sep 06
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Philips Semiconductors
Product specification
Gigabit Ethernet/Fibre Channel transimpedance amplifier
LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134). SYMBOL VCC Vn supply voltage DC voltage pin/pad IPhoto pins/pads OUT and OUTQ pad AGC (bare die only) pin/pad DREF In DC current pin/pad IPhoto pins/pads OUT and OUTQ pad AGC (bare die only) pin/pad DREF Ptot Tstg Tj Tamb HANDLING total power dissipation storage temperature junction temperature ambient temperature PARAMETER
TZA3043; TZA3043B
MIN. -0.5 -0.5 -0.5 -0.5 -0.5 -2.5 -15 -0.2 -2.5 - -65 - -40
MAX. +6 +1 VCC + 0.5 VCC + 0.5 VCC + 0.5 +2.5 +15 +0.2 +2.5 300 +150 150 +85 V V V V V
UNIT
mA mA mA mA mW C C C
Precautions should be taken to avoid damage through electrostatic discharge. This is particularly important during assembly and handling of the bare die. Additional safety can be obtained by bonding the VCC and GND pads first, the remaining pads may then be bonded to their external connections in any order. THERMAL CHARACTERISTICS SYMBOL Rth(j-a) PARAMETER thermal resistance from junction to ambient VALUE 160 UNIT K/W
2002 Sep 06
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Philips Semiconductors
Product specification
Gigabit Ethernet/Fibre Channel transimpedance amplifier
TZA3043; TZA3043B
CHARACTERISTICS Typical values at Tamb = 25 C and VCC = 5 V; minimum and maximum values are valid over the entire ambient temperature range and supply range; all voltages are measured with respect to ground; unless otherwise specified. SYMBOL VCC ICC Ptot Tj Tamb Rtr PARAMETER supply voltage supply current total power dissipation junction temperature ambient temperature small-signal transresistance of measured differentially; the receiver AC coupled RL = RL = 50 f-3dB(h) PSRR high frequency -3 dB point power supply rejection ratio VCC = 5 V; Ci = 0.7 pF VCC = 3.3 V; Ci = 0.7 pF measured differentially; note 1 f = 1 to 100 MHz f = 1 GHz Bias voltage: pin DREF RDREF resistance between DREF and tested at DC VCC input bias voltage on pin IPhoto input current on pin IPhoto (peak-to-peak value) small-signal input resistance total integrated RMS noise current over bandwidth VCC = 5 V; note 2 VCC = 3.3 V; note 2 fi = 1 MHz; input current <2 A (p-p) referenced to input; f = 920 MHz; note 3 210 250 290 - - 2 66 - - A/V A/V 13.2 6.6 1000 850 16.6 8.3 1200 1100 20 10 - - k k MHz MHz AC coupled; RL = 50 VCC = 5 V VCC = 3.3 V CONDITIONS 3 - - - -40 -40 MIN. 5 34 170 112 - +25 TYP. MAX. 5.5 47 259 169 +125 +85 V mA mW mW C C UNIT
Input: pin IPhoto Vbias(IPhoto) Ii(IPhoto)(p-p) Ri In(tot) 600 -1500 -1000 - - 822 +6 +6 28 200 1000 +1500 +1000 - - mV A A nA
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Philips Semiconductors
Product specification
Gigabit Ethernet/Fibre Channel transimpedance amplifier
SYMBOL PARAMETER CONDITIONS AC coupled; RL = 50 MIN. VCC - 2
TZA3043; TZA3043B
TYP.
MAX.
UNIT
Data outputs: pins OUT and OUTQ Vo(cm) Vo(se)(p-p) VOO Ro tr, tf common mode output voltage single-ended output voltage (peak-to-peak value) differential output offset voltage output resistance rise time, fall time single-ended; DC tested VCC - 1.7 VCC - 1.4 V 200 - 50 285 300 330 +100 62 430 460 mV mV ps ps AC coupled; RL = 50 ; 75 input current 100 A (p-p) -100 40
VCC = 5 V; 20% to 80%; - input current <20 A (p-p) VCC = 3.3 V; 20% to 80%; - input current <20 A (p-p)
Automatic gain control loop: pad AGC Ith(AGC) AGC threshold current referenced to the peak input current; tested at 10 MHz - 25 - A
tatt(AGC) tdecay(AGC) Notes
AGC attack time AGC decay time
- -
5 10
- -
s ms
1. PSRR is defined as the ratio of the equivalent current change at the input (IIPhoto) to a change in supply voltage: I IPhoto PSRR = ------------------V CC For example, a +10 mV disturbance on VCC at 10 MHz will typically add an extra 20 nA to the photodiode current. The external capacitor between pins DREF and GND has a large impact on the PSRR. The specification is valid with an external capacitor of 1 nF. 2. The pulse width distortion (PWD) is <5% over the whole input current range. The PWD is defined as: pulse width PWD = ----------------------------- - 1 x 100% where T is the clock period. The PWD is measured differentially with T PRBS pattern of 10-23. 3. All In(tot) measurements were made with an input capacitance of Ci = 1 pF. This was comprised of 0.5 pF for the photodiode itself, with 0.3 pF allowed for the printed-circuit board layout and 0.2 pF intrinsic to the package. Noise performance is measured differentially.
2002 Sep 06
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Philips Semiconductors
Product specification
Gigabit Ethernet/Fibre Channel transimpedance amplifier
TYPICAL PERFORMANCE CHARACTERISTICS
MGU112
TZA3043; TZA3043B
handbook, halfpage I
40 CC (mA) 38
handbook, halfpage
34.8
MGU113
ICC (mA)
34.4
36
(1)
34.0
34
(2)
33.6 32
(3)
33.2 30
28 -40
32.8 0 40 80 Tj (C) 120 3 4 5 VCC (V) 6
(1) VCC = 5 V. (2) VCC = 3.3 V. (3) VCC = 3 V.
Fig.10 Supply current as a function of the junction temperature.
Fig.11 Supply current as a function of the supply voltage.
handbook, halfpage
825
MGU114
handbook, halfpage
920
MGU115
Vi (mV) 823
Vi (mV) 840
(2)
(1) (3)
821
760 819
817 3 4 5 VCC (V) 6
680 -40
0
40
80
Tj (C)
120
(1) VCC = 5 V. (2) VCC = 3.3 V. (3) VCC = 3 V.
Fig.12 Input voltage as a function of the supply voltage.
Fig.13 Input voltage as a function of the junction temperature.
2002 Sep 06
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Philips Semiconductors
Product specification
Gigabit Ethernet/Fibre Channel transimpedance amplifier
TZA3043; TZA3043B
handbook, halfpage
1.68 Vo(cm) (V)
MGU116
handbook, halfpage
1.85
MGU117
Vo(cm) (V)
(1)
1.675
1.75 1.67
(1) (2)
1.665 1.65
(2)
1.66
1.655 3 4 5 VCC (V) 6
1.55 -40
0
40
80
Tj (C)
120
(1) VCC - VOUT. (2) VCC - VOUTQ.
VCC = 5 V. (1) VCC - VOUT. (2) VCC - VOUTQ.
Fig.14 Common mode voltage at the output as a function of the supply voltage.
Fig.15 Common mode voltage at the output as a function of the junction temperature.
2002 Sep 06
12
Philips Semiconductors
Product specification
Gigabit Ethernet/Fibre Channel transimpedance amplifier
APPLICATION AND TEST INFORMATION
TZA3043; TZA3043B
handbook, full pagewidth
10 H VP 22 nF VCC 8 DREF 1 7 Zo = 50 680 nF
OUTQ(1) OUT(1)
100 nF
TZA3043T
IPhoto 1 nF 2 GND 4 GND 5 GND 6 3
Zo = 50
100 nF R3 50 R4 50
MGU101
(1) For TZA3043BT pin 7 is OUT and pin 6 is OUTQ.
Fig.16 Application diagram.
2002 Sep 06
13
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handbook, full pagewidth
2002 Sep 06
VCC
(1)
Philips Semiconductors
Gigabit Ethernet/Fibre Channel transimpedance amplifier
680 nF
(1)
(1)
22 nF VCC 8 DREF 1 OUTQ(2) 4 pF 6 OUT(2) 1.5 nF 100 1.5 nF DIN
100 nF VCCA 6
180 k RSET 16 7 CF Vref 15 VCCD 14
100 nF
7
4
13
DOUT data out
14
1 nF IPhoto 3 2
TZA3043T
TZA3044
DINQ 5 12 DOUTQ
4 GND GND
5 GND
noise filter: 1-pole, 800 MHz
3 AGND
1 SUB
8 JAM
9 STQ
10 ST
11 DGND level-detect status 1 k 50 50 VCC - 2 V
MGU102
TZA3043; TZA3043B
Product specification
(1) Ferrite bead e.g. Murata BLM10A700S. (2) For TZA3043BT pin 7 is OUT and pin 6 is OUTQ.
Fig.17 Gigabit Ethernet/Fibre Channel receiver using the TZA3043T and TZA3044.
Philips Semiconductors
Product specification
Gigabit Ethernet/Fibre Channel transimpedance amplifier
Test circuits
TZA3043; TZA3043B
handbook, full pagewidth
ZT = s21.(R + Zi) . 2
R = 470 , Zi = 28
NETWORK ANALYZER
S-PARAMETER TEST SET PORT 1 Zo = 50 VCC 223-1 PRBS 100 nF PATTERN GENERATOR C C D D TR C IN 10 nF 470 51 OUT IPhoto OUTQ 100 nF SAMPLING OSCILLOSCOPE/ TDR/TDT 1 2 TR PORT 2 Zo = 50
TZA3043
OM5803
Zo = 50
MGU106
Fig.18 Electrical test circuit.
2002 Sep 06
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Philips Semiconductors
Product specification
Gigabit Ethernet/Fibre Channel transimpedance amplifier
TZA3043; TZA3043B
handbook, full pagewidth
LIGHTWAVE MULTIMETER -9.54 dBm OPTICAL INPUT ERROR DETECTOR OPTICAL ATTENUATOR 0 dBm/1300 IN OUT 90% 10% VCC Data in Clock in
BLM 223-1 PRBS PATTERN GENERATOR C C D D TR C IN DINQ Laser DREF LASER DRIVER DIN PIN 10 nF IPhoto
22 nF 100 nF OUT
OUTQ 100 nF
SAMPLING OSCILLOSCOPE/ TDR/TDT TR 1 2
TZA3043
TZA3041 OM5802
1.24416 GHz
OM5804
Zo = 50
MGU107
Fig.19 Optical test circuit.
2002 Sep 06
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Philips Semiconductors
Product specification
Gigabit Ethernet/Fibre Channel transimpedance amplifier
TZA3043; TZA3043B
MGU108
handbook, full pagewidth
Fig.20 Differential output with -25 dBm optical input power [input current of 5.17 A (p-p)].
MGU109
handbook, full pagewidth
Fig.21 Differential output with -15 dBm optical input power [input current of 51.7 A (p-p)].
2002 Sep 06
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Philips Semiconductors
Product specification
Gigabit Ethernet/Fibre Channel transimpedance amplifier
TZA3043; TZA3043B
MGU110
handbook, full pagewidth
Fig.22 Differential output with -5 dBm optical input power [input current of 517 A (p-p)].
MGU111
handbook, full pagewidth
Fig.23 Differential output with -2 dBm optical input power [input current of 1030 A (p-p)].
2002 Sep 06
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Philips Semiconductors
Product specification
Gigabit Ethernet/Fibre Channel transimpedance amplifier
BONDING PAD LOCATIONS
TZA3043; TZA3043B
COORDINATES(1) SYMBOL DREF GND GND IPhoto GND GND GND GND OUT OUTQ VCC VCC AGC Note 1. All coordinates are referenced, in m, to the bottom left-hand corner of the die. PAD TZA3043U 1 2 3 4 5 6 7 8 9 10 11 12 13 PAD TZA3043BU x 1 2 3 4 5 6 7 8 10 9 11 12 13 95 95 95 95 215 360 549 691 785 785 567 424 259 y 881 618 473 285 95 95 95 95 501 641 1055 1055 1055
AGC
AGC
VCC
VCC
VCC 12
13
12
11
13
11
DREF
1
DREF
1
1300 GND m GND
2 3
TZA3043U
10 9
VCC
OUTQ OUT
1300 GND m GND
2 3
TZA3043BU
10 9
OUT OUTQ
IPhoto
4
IPhoto
4
5 x GND 0
6 GND
7 GND
8 x GND 0
5 GND
6 GND
7 GND 1030 m
8 GND
0 y
1030 m
0 y
MGU099
MGU100
Fig.24 Bonding pad locations of the TZA3043U.
Fig.25 Bonding pad locations of the TZA3043BU.
2002 Sep 06
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Philips Semiconductors
Product specification
Gigabit Ethernet/Fibre Channel transimpedance amplifier
TZA3043; TZA3043B
AGC
VCC 12
handbook, full pagewidth
13
11
DREF
1
VCC
1300 GND m GND
2 3
TZA3043BU/G
10 9
OUT OUTQ
725 m
IPhoto
4
5 x GND 0
6 GND
7 GND 1030 m
8 GND
0 y
455 m
MCE066
Fig.26 Bonding pad plus gold plate locations of the TZA3043BU/G.
AGC
VCC 12
handbook, full pagewidth
13
11
DREF
1
VCC
1300 GND m GND
2 3
TZA3043U/G
10 9
OUTQ 725 m OUT
IPhoto
4
5 x GND 0
6 GND
7 GND 1030 m
8 GND
0 y
455 m
MCE065
Fig.27 Bonding pad plus gold plate locations of the TZA3043U/G.
2002 Sep 06
20
Philips Semiconductors
Product specification
Gigabit Ethernet/Fibre Channel transimpedance amplifier
Physical characteristics of the bare die PARAMETER Gold layer(1) 2.8 m Au + 3.2 m TiW Glass passivation Bonding pad dimension Metallization Thickness Size Backing Attach temperature Attach time Note 1. For the TZA3043BU/G and TZA3043U/G versions only. VALUE
TZA3043; TZA3043B
2.1 m PSG (PhosphoSilicate Glass) on top of 0.65 m oxynitride minimum dimension of exposed metallization is 90 x 90 m (pad size = 100 x 100 m) 1.22 m W/AlCu/TiW 380 m nominal 1.03 x 1.30 mm (1.34 mm2) silicon; electrically connected to GND potential through substrate contacts <440 C; recommended die attach is glue <15 s
2002 Sep 06
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Philips Semiconductors
Product specification
Gigabit Ethernet/Fibre Channel transimpedance amplifier
PACKAGE OUTLINE SO8: plastic small outline package; 8 leads; body width 3.9 mm
TZA3043; TZA3043B
SOT96-1
D
E
A X
c y HE vMA
Z 8 5
Q A2 A1 pin 1 index Lp 1 e bp 4 wM L detail X (A 3) A
0
2.5 scale
5 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches A max. 1.75 A1 0.25 0.10 A2 1.45 1.25 A3 0.25 0.01 bp 0.49 0.36 c 0.25 0.19 D (1) 5.0 4.8 0.20 0.19 E (2) 4.0 3.8 0.16 0.15 e 1.27 HE 6.2 5.8 L 1.05 Lp 1.0 0.4 Q 0.7 0.6 v 0.25 0.01 w 0.25 0.01 y 0.1 Z (1) 0.7 0.3
0.010 0.057 0.069 0.004 0.049
0.019 0.0100 0.014 0.0075
0.244 0.039 0.028 0.050 0.041 0.228 0.016 0.024
0.028 0.004 0.012
8 0o
o
Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT96-1 REFERENCES IEC 076E03 JEDEC MS-012 EIAJ EUROPEAN PROJECTION
ISSUE DATE 97-05-22 99-12-27
2002 Sep 06
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Philips Semiconductors
Product specification
Gigabit Ethernet/Fibre Channel transimpedance amplifier
SOLDERING Introduction to soldering surface mount packages This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our "Data Handbook IC26; Integrated Circuit Packages" (document order number 9398 652 90011). There is no soldering method that is ideal for all surface mount IC packages. Wave soldering can still be used for certain surface mount ICs, but it is not suitable for fine pitch SMDs. In these situations reflow soldering is recommended. Reflow soldering Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement. Several methods exist for reflowing; for example, convection or convection/infrared heating in a conveyor type oven. Throughput times (preheating, soldering and cooling) vary between 100 and 200 seconds depending on heating method. Typical reflow peak temperatures range from 215 to 250 C. The top-surface temperature of the packages should preferable be kept below 220 C for thick/large packages, and below 235 C for small/thin packages. Wave soldering Conventional single wave soldering is not recommended for surface mount devices (SMDs) or printed-circuit boards with a high component density, as solder bridging and non-wetting can present major problems. To overcome these problems the double-wave soldering method was specifically developed.
TZA3043; TZA3043B
If wave soldering is used the following conditions must be observed for optimal results: * Use a double-wave soldering method comprising a turbulent wave with high upward pressure followed by a smooth laminar wave. * For packages with leads on two sides and a pitch (e): - larger than or equal to 1.27 mm, the footprint longitudinal axis is preferred to be parallel to the transport direction of the printed-circuit board; - smaller than 1.27 mm, the footprint longitudinal axis must be parallel to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves at the downstream end. * For packages with leads on four sides, the footprint must be placed at a 45 angle to the transport direction of the printed-circuit board. The footprint must incorporate solder thieves downstream and at the side corners. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Typical dwell time is 4 seconds at 250 C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. Manual soldering Fix the component by first soldering two diagonally-opposite end leads. Use a low voltage (24 V or less) soldering iron applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 C.
2002 Sep 06
23
Philips Semiconductors
Product specification
Gigabit Ethernet/Fibre Channel transimpedance amplifier
TZA3043; TZA3043B
Suitability of surface mount IC packages for wave and reflow soldering methods PACKAGE(1) BGA, LBGA, LFBGA, SQFP, TFBGA, VFBGA HBCC, HBGA, HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, HVQFN, HVSON, SMS PLCC(4), SO, SOJ LQFP, QFP, TQFP SSOP, TSSOP, VSO Notes 1. For more detailed information on the BGA packages refer to the "(LF)BGA Application Note" (AN01026); order a copy from your Philips Semiconductors sales office. 2. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the "Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods". 3. These packages are not suitable for wave soldering. On versions with the heatsink on the bottom side, the solder cannot penetrate between the printed-circuit board and the heatsink. On versions with the heatsink on the top side, the solder might be deposited on the heatsink surface. 4. If wave soldering is considered, then the package must be placed at a 45 angle to the solder wave direction. The package footprint must incorporate solder thieves downstream and at the side corners. 5. Wave soldering is suitable for LQFP, TQFP and QFP packages with a pitch (e) larger than 0.8 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm. 6. Wave soldering is suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm. not suitable not suitable(3) SOLDERING METHOD WAVE REFLOW(2) suitable suitable suitable suitable suitable
suitable not not recommended(4)(5) recommended(6)
2002 Sep 06
24
Philips Semiconductors
Product specification
Gigabit Ethernet/Fibre Channel transimpedance amplifier
DATA SHEET STATUS DATA SHEET STATUS(1) Objective data PRODUCT STATUS(2) Development
TZA3043; TZA3043B
DEFINITIONS This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Changes will be communicated according to the Customer Product/Process Change Notification (CPCN) procedure SNW-SQ-650A.
Preliminary data
Qualification
Product data
Production
Notes 1. Please consult the most recently issued data sheet before initiating or completing a design. 2. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com.
2002 Sep 06
25
Philips Semiconductors
Product specification
Gigabit Ethernet/Fibre Channel transimpedance amplifier
DEFINITIONS Short-form specification The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. DISCLAIMERS Life support applications These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.
TZA3043; TZA3043B
Right to make changes Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Bare die All die are tested and are guaranteed to comply with all data sheet limits up to the point of wafer sawing for a period of ninety (90) days from the date of Philips' delivery. If there are data sheet limits not guaranteed, these will be separately indicated in the data sheet. There are no post packing tests performed on individual die or wafer. Philips Semiconductors has no control of third party procedures in the sawing, handling, packing or assembly of the die. Accordingly, Philips Semiconductors assumes no liability for device functionality or performance of the die or systems after third party sawing, handling, packing or assembly of the die. It is the responsibility of the customer to test and qualify their application in which the die is used.
2002 Sep 06
26
Philips Semiconductors
Product specification
Gigabit Ethernet/Fibre Channel transimpedance amplifier
NOTES
TZA3043; TZA3043B
2002 Sep 06
27
Philips Semiconductors - a worldwide company
Contact information For additional information please visit http://www.semiconductors.philips.com. Fax: +31 40 27 24825 For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com.
(c) Koninklijke Philips Electronics N.V. 2002
SCA74
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights.
Printed in The Netherlands
403510/04/pp28
Date of release: 2002
Sep 06
Document order number:
9397 750 10126

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