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ICs for TV-SETS INF8594E 512 x 8-Bit CMOS EEPROM with I2C-Bus Interface The INF8594E-2 is a 4-Kbit (512 x 8-bit) floating gate electrically erasable programmable read only memory (EEPROM). By using an internal redundant storage code it is fault tolerant to single bit errors. This feature dramatically increases reliability. IC works in systems with serial 2 I C-bus which consists of 2 lines: for data -serial data input/output (SDA) and for clock - serial clock input (SCL). Up to four 2 INF8594E-2 devices may be connected to the I C-bus.The programming of the array is implemented by electron's tunneling. The programming voltage is generated on-chip, using a voltage multiplier. Power consumption is low owing to the full CMOS technology used. Device is functionally identical to the PCF8594E-2, Philips. IC are made in 8-pin DIP and 8-pin SOP. FEATURES Low Power CMOS maximum active current 2.5 mA maximum standby current 10 A Non-volatile storage of 4-Kbits organized as two pages each 256 x 8-bits Single supply (Ucc=4,5 B - 5,5 B) On-chip voltage multiplier 2 Serial input/output I C-bus Automatically added word address Internal timer for writing (no external components) 100 000 ERASE/WRITE cycles per byte; Write operations -byte write mode -8-byte page write mode (minimizes total write time per byte) Write protection input Read operations sequential read random read Power-on reset High reliability by using a redundant storage code (single bit error correction) Endurance 0 100 k; Tamb=85 C 10 years non-volatile data retention time Pin and Address compatible to PCx8582x-2 Family and PCx8598x2 Family 0 0 Temperature range: -40 C / +85 C PIN ASSIGNMENT PIN DESCRIPTION SYMBOL WP A1 A2 Uss SDA SCL PTC Ucc PIN 1 2 3 4 5 6 7 8 DESCRIPTION WRITE protection input address input 1 address input 2 GND Informational line, input/output Clock line, input programming management Supply voltage WP A1 1 2 3 4 8 7 6 5 Ucc PTC SCL SDA A2 Uss 1 INTEGRAL ICs for TV-SETS Electrical Characteristics Parameter Supply current READ,mkA Supply current ERASE/WRITE, mA Standby Supply Current, A Clock input frequency, kHz E/WR cycle time, ms Conditions fSCL=100kHz UCC=5.5B fSCL=100kHz UCC=5.5B UCC=5,5B Symbol ICC0(RD) ICC0(E/WR) ICCS fSCL tE/WR PTC input Input high voltage, V Input low voltage, V SCL inputs Input high voltage, V Input low voltage, V Clock input frequency, kHz Leakage current, A Input capacitance, pF UIH UIL fSCL ILI CI 0,7UCC -0,8 0 UIH UIL 0,9UCC -0,8 Min. 0 4 INF8594E Max 200 2,5 10.0 100 10 UCC+0,8 0,1UCC UI=Ucc or GND UI=GND SDA input/output UCC+0,8 0,3UCC 100 1A 7 Low input voltage, V High input voltage, V Low level output voltage, V Output leakage current, A Input capacitance, pF Duration of the ERASE/WRITE cycle -internal generator -external clock signal Frequency of the external clock programming signals, kHz Number of the ERASE/WRITE cycles per byte Time of data storage IOL=3, Ucc=Uccmin UOH=Ucc UI=0B UIL UIH UOL ILO I tE/WR fp -0.8 0.7Ucc 0.3UCC UCC+0.8 0.4 1 7 4 4 25 100 000 10 000 10 10 10 60 =-40-+85 , tE/W =4-10 , =22 , tE/W =5 = 55 NE/W tS 2 INTEGRAL |
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