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 AZ DISPLAYS, INC.
COMPLETE LCD SOLUTIONS
SPECIFICATIONS FOR LIQUID CRYSTAL DISPLAY
PART NUMBER: DATE:
AGM3224I SERIES MAR. 13, 2007
LCD Module
Main Data
No. Item Contents 167.0(W) x 109.0(H) x 8.5 (D) 120.0 (W) x 90.0 (H) 320 x 3 (R.G.B) (W) x 240 (H) 0.10(W) x 0.34(H) 0.12(W) x 0.36(H) *Color-STN (Negative & transmissive type) * with Anti glare upper polarizer . (7) Contrast ratio (8) Duty (9) Viewing direction (10) Operating temperature (11) Storage temperature (12) Backlight (13) Power Supply Voltage (14) Weight 40 1/242 6 O clock 0 -20 ~ +50 ~ +60 Unit mm mm dots mm mm !C !C pcs V g
(1) Module size (2) Viewing area (3) Dot Number (4) Dot Size (5) Dot pitch (6) LCD type
LED x 16 VDD=5.0 V or 3.3 V
Vcon=1.8 V 200 (Approx.)
AZ DISPLAYS, INC.
PAGE 01
AZ DISPLAYS, INC.
Outline Dimension
P0.12x320x(RGB)-0.02=115.18 ( LCD AA )
0.1
0.12 0.02
320X 3(RGB)X 240 DOTS
R GB
0.34 0.02 0.36
R
GB
V IEWING DIRECTION
Black R ed
CN2 4 1 M63-M83-04 (MITSUMI)
CN1 1 16
PAGE 02
Interface Pin Connection CN1 Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 Signal FLM CL1 CL2 DISP OFF VDD VSS VCON D0 D1 D2 D3 D4 D5 D6 D7 VSS First Line Marker Input data latch signal ( LOAD ) Data shift clock ( CP ) Display control signal H:ON Power supply for Logic GND Contrast adjust Display data Display data Display data Display data Display data Display data Display data Display data GND L:OFF FFC Pitch 1.0mm, width 17.0mm. Pin Function
CN2 1 2
M63-M83-04 ( MITSUMI ) Signal LED(+) LED(-) Signal LED(+) LED(-) LED GND LED GND Function Power supply voltage for LED --------------------------------------------Function Power supply voltage for LED
Pin No.
Pin No. 1 2 3 4
AZ DISPLAYS, INC.
PAGE 03
Block Diagram
Timing Circuit CL1 CL2 DISP
D0~D7 Y1
Column
Driving Circuit Y960
FLM
Circuit
X1
Row Driving
COLOR
X240
LCD
PANEL
320" RGB" 240 DOTS
VDD VSS VCON
Power Supply Circuit
CN2 VLED(+) VLED(-)
LED
AZ DISPLAYS, INC.
PAGE 04
Power supply for Logic VDD-VSS -0.3 7.0 Contrast Adjustment Voltage VCON-VSS 0 VDD Input voltage (Note 1) Vi -0.3 VDD+0.3 Note 1. FLM,CL1,CL2,DISP,D0~D7. Note 2. Ta=25! C Note 3. Make certain you are grounded when handling LCM.
V V V
Environmental Absolute Maximum Ratings Operating Item MIN. MAX. Ambient Temperature 0! C 50! C Humidity Note 4 Vibration Shock 2.45m/s 29.4m/s
Storage MIN. MAX. -20! C 60! C Note 4 11.76 m/s Note 5 490 m/s Note 5
Remark Note1,2,3 No Condensation 1h max Note 6
XYZ directions 11ms
Note 1. Ta at -20! C --------<48hours, at 60! C --------<120 hours. Note 2. Background color changes slightly depending on ambient temperature. The phenomenon is reversible. Note 3. Ta<=40! C : 85%RH MAX. Ta> 40! C : Absolute humidity must be lower than the humidity of 85% RH at 40! C. Note 4. The module should be operated normally after the test is finished. Note 5. 5Hz ~ 100Hz (Except resonance frequency).
AZ DISPLAYS, INC.
PAGE 05
Electrical Characteristics
Electrical Characteristics of LCD Item Symbol Power Supply for Logic VDD Input Signal Voltage VIH Note (2) VIL Power supply current Note (4) IDD Icon Note(5) Input Leak Current IIN Note(2) Contrast Adjustment Voltage Note (1) Note (6) Frame Frequency Note (7) Vcon fFLM Condition VDD-VSS # Level H$ # Level L$ VDD=3.3V VCON=0.8~2.8V VIN=VDD or VSS Ta=0! C, =0 Ta=25! C, =0 Ta=40! C, =0 ! MIN. 3.15 0.8VDD 0 ! ! ! 0.3 1.3 ! 130 Typ. 3.3 ! ! 95 0.5 ! ! 1.8 ! 150 Max. Unit 5.5 V VDD V 0.2VDD 160 mA 1.0 mA +/- 1.0 A ! V 2.3 3.3 170 Hz
Note (1) In proportion as the VCON voltage decrease the brightness will increase. Note (2) FLM,CL1,CL2,DISPOFF,D0~D7. RGB RGB Note (3) fFLM=150Hz,Ta=25! C,Display pattern is Black/White cross pattern as below. Note (4) At all Q pattern. Note (5) VCON Note (6) Recommended Contrast Adjustment Voltage fluctuates about " 0.5V by each module. Note (7) Need to make sure of flickering and rippling of display when setting the Frame Frequency in your set. Electrical Characteristics of Backlight Item Symbol Min. Typ. Max. Unit Voltage VLED (4.2) (4.3) (4.4) V Current ILED 288.0 mA Number of LED 16 EA Power Consumption 1.24 W Note (1): VLED = VLED(+) %VLED(-) . Note (2): The current of LED is 18 mA for each one. LED driving in constant current mode is recommended . Note (3): LED power consumption is around 0.0775W for each one.
Condition Note 1 Note 2 Note 3
AZ DISPLAYS, INC.
PAGE 06
Optical Characteristics
Optical Characteristics of LCD Item Symbol Condition Viewing Angle Range 1, 2 =0K&2 Contrast Ratio Response Time Rise Fall R Color Tone (CIE Coordinate) G B W K tr tf x y x y x y x y Min. 20 (0.44) (0.26) (0.26) (0.49) (0.10) (0.07) (0.22) (0.27) Note 2. Typ. (40) 40 (250) (200) (0.49) (0.31) (0.31) (0.54) (0.15) (0.12) (0.27) (0.32) Ta= 25! C.(Backlight On) Max. Unit Remark Deg. Note 1,2 Note 2 (0.54) (0.36) (0.36) (0.59) (0.20) (0.17) (0.32) (0.37) ms ms Note 2 -
=0 =0 =0,=0 =0,=0
=0,=0
Note 1.
Definition of q and f
2 Eye from (,1)
Definition of Viewing angle f 1 and f 2 CR
Y(=180)
1
Eye from (,2)
X
Y(=0)
X
2.0 1
1<0<2 2
CR vs Viewing and
AZ DISPLAYS, INC.
PAGE 07
Definition of Contrast Ratio CR!
CR= Brightness at selected dot (B1) Brightness at non-selected dot (B2)
Sensor B1
B1 Brightness B2
LCD B2 Backlight Sensor : BM-7 Aperture : 1! Operation voltage Distance : 50 cm
Note 4.
Definition of CR! and VOP!
CR
VOP
Operation Voltage
Note 5.
Definition of optical response time
Non-selected state Brightness
Selected state
Non-selected state
100%
90%
tr Rise time
tf Fall time
AZ DISPLAYS, INC.
10%
PAGE 08
Optical Characteristics of Backlight Item Min, Brightness 100 Brightness Uniformity -
Typ. 150 -
Max. ' 30
Unit 2 cd/m %
Remark Note 1,2,3 Note 2,3,4
Note 1. Measurement Condition: * Display data should be all # ON$ (D0~D7=HIGH). * VDD=5.0V, VLED=4.3V, ILED=288mA,VCON should be adjusted at the voltage where the peak contrast is obtained by naked eyes as the # Q$ pattern. All Note 2. Measurement of the following 5 points on the display.
Y=160 Y=480
Y=800
dots Active area
X=60 X=120 X=180 dots
P1 P4
P3
P2 P5
Note3. The brightness shall be the average of P1~P5 point. Note 4. Definition of the brightness Uniformity
(
Max brightness or Min brightness %Average brightness Average brightness
)
x100%
AZ DISPLAYS, INC.
PAGE 09
Interface Timing Chart
Timing Chart
CL1
(240+n)xT
FLM
D0~D7
X1
X2
X239 X240
Dummy data
CL1
T
CL2 D7 D6 D5 D4 D3 D2 D1 D0
R0 G0 B0 R1 G1 B1 R2 G2 B2 R3 G3 B3 R4 G4 B4 R5 G5 B5 R6 G6 B6 R7 G7 B7
X1 B314 R315 G315 B315 R316 G316 B316 R317 G317 B317 R318 G318 B318 R319 G319 B319
X2
AZ DISPLAYS, INC.
PAGE 10
Electrical Characteristics (MODE1) (VDD=3.0~4.5V , V0= +10.0~ +42.0V, Ta=+0! C~50! C) Item Symbol Min. Typ. Max. Unit Shift clock period tWCK 66 ns Shift clock # pulse wide H$ tWCKH 23 ns Shift clock # pulse wide L$ tWCKL 23 ns Data setup time tDS 10 ns Data hold time tDH 25 ns Latch pulse # pulse wide H$ tWLPH 30 ns Shift clock rise to latch pulse rise time tLD 10 ns Shift clock fall to latch pulse fall time tSL 30 ns Latch pulse rise to shift clock rise time tLS 30 ns Latch pulse fall to shift clock fall time tLH 30 ns Enable setup time tTS 12 ns Input signal rise time tR 50 ns Input signal fall time tF 50 ns Output delay time tD 44 ns FLM setup time tFS 30 ns FLM hold time tFH 50 ns Note 1: (tWCK - tWCKH - tWCKL)/2 is maximum in the case of high speed operation
tWLPH
CL1
VIH VIL
tLD
tLS tF
tSL
tWCKH
tLH
tWCKL
VIH VIL
CL2
tR
tWCK
LAST DATA
Horizontal retrace period VIH VIL VIH VIL
tDS
tDH
D0~D7
TOP DATA
CL1
tDS
CL2
tDH
1
2
..
20
tFS
FLM
tFH
AZ DISPLAYS, INC.
PAGE 11
(VDD=4.5~5.5V , V0= +10.0~ +42.0V, Ta=+0! C~50! C) Item Symbol Min. Typ. Max. Unit Shift clock period tWCK 40 ns Shift clock # pulse wide H$ tWCKH 12 ns Shift clock # pulse wide L$ tWCKL 14 ns Data setup time tDS 5 ns Data hold time tDH 15 ns Latch pulse # pulse wide H$ tWLPH 15 ns Shift clock rise to latch pulse rise time tLD 5 ns Shift clock fall to latch pulse fall time tSL 25 ns Latch pulse rise to shift clock rise time tLS 25 ns Latch pulse fall to shift clock fall time tLH 25 ns Enable setup time tTS 5 ns Input signal rise time (Note 1) tR 50 ns Input signal fall time (Note 1) tF 50 ns Output delay time tD 28 ns FLM setup time tFS 30 ns FLM hold time tFH 50 ns Note 1: (tWCK - tWCKH - tWCKL)/2 is maximum in the case of high speed operation
(MODE2)
AZ DISPLAYS, INC.
PAGE 12
Power Supply and Signal Sequence Do not apply DC voltage to the LCD panel because that induces the electrochemical reaction and reduces its life time. Please follow the power supply ON/OFF sequence to prevent DC driving of LCD or latch-up of COMS LSI, as shown below.
max 1ms VDD VDD VSS Sig VSS VI min0 V I VI min0 VI min 1FRM DISPOFF VI VI min 1ms POWER ON POWER OFF VI VI VI min0 VI min0 VI VI min0 VCON VSS VDD VSS VSS
(FRM, CL1, CL2, DATA)
VCON
VCON VSS
VSS
VSS
Note 1. Please keep the specified sequence because wrong sequence may cause permanent damage to the LCD panel. Note 2. Please use DISPOFF function. Switching by other than the DISPOFF function may cause display deterioration. Note 3. VCON voltage should be set up to adjusted voltage before DISPOFF signal arises. Otherwise, when DISPOFF signal arises, adjusted contrast image may not be generated. Note 4. Please keep the specified sequence of DISPOFF signal because if the signal is short enough, LCD panel may not be restarted. (min. 1ms)
AZ DISPLAYS, INC.
PAGE 13
Input Data Allocation Table DDDDD Data Signal 76543 Y 1 X 1 2 3 4 5 6 7 8 9 10 | | | 238 239 240 R R R R R R R R R R | | | R R R 2 G G G G G G G G G G | | | G G G 3 B B B B B B B B B B | | | B B B 4 R R R R R R R R R R | | | R R R 5 G G G G G G G G G G | | | G G G
D 2 6 B B B B B B B B B B | | | B B B
D 1 7 R R R R R R R R R R | | | R R R
D 0 8 G G G G G G G G G G | | | G G G
D 7 9 B B B B B B B B B B | | | B B B
D 6
D 5
D 4 -------
D 4 9 5 6 G G G G G G G G G G | | | G G G
D 3 9 5 7 B B B B B B B B B B | | | B B B
D 2 9 5 8 R R R R R R R R R R | | | R R R
D 1 9 5 9 G G G G G G G G G G | | | G G G
D 0 9 6 0 B B B B B B B B B B | | | B B B
10 11 12 R R R R R R R R R R | | | R R R G G G G G G G G G G | | | G G G B B B B B B B B B B | | | B B B
R : RED G : GREEN B : BLUE
AZ DISPLAYS, INC.
PAGE 14


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