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| PROFET(R) BTS 707 Smart Two Channel Highside Power Switch Product Summary Overvoltage Protection Vbb(AZ) * Overload protection * Current limitation Vbb(on) Operating voltage * Short-circuit protection active channels: one * Thermal shutdown On-state resistance RON 250 * Overvoltage protection 1.9 * Fast demagnetization of inductive loads Nominal load current IL(NOM) Features * Open drain diagnostic output * Open load detection in OFF-state * CMOS compatible input * Loss of ground and loss of Vbb protection * Electrostatic discharge (ESD) protection 65 5.8 ... 58 two parallel 125 2.8 V V m A * Reverse battery protection1) Application * C compatible power switch with diagnostic feedback for 12 V and 24 V DC grounded loads * Most suitable for inductive loads * Replaces electromechanical relays, fuses and discrete circuits General Description N channel vertical power FET with charge pump, ground referenced CMOS compatible input and diagnostic feedback, monolithically integrated in Smart SIPMOS technology. Providing embedded protective functions. Pin Definitions and Functions Pin 1,10, 11,12, 15,16, 19,20 3 7 17,18 13,14 4 8 2 6 5,9 Symbol Function Vbb Positive power supply voltage. Design the wiring for the simultaneous max. short circuit currents from channel 1 to 2 and also for low thermal resistance IN1 Input 1,2, activates channel 1,2 in case of IN2 logic high signal OUT1 Output 1,2, protected high-side power output OUT2 of channel 1,2. Design the wiring for the max. short circuit current ST1 Diagnostic feedback 1,2 of channel 1,2, ST2 open drain, low in on state on failure or high in off state on failure GND1 Ground 1 of chip 1 (channel 1) GND2 Ground 2 of chip 2 (channel 2) N.C. Not Connected Pin configuration (top view) Vbb GND1 IN1 ST1 N.C. GND2 IN2 ST2 N.C. Vbb 1 2 3 4 5 6 7 8 9 10 * 20 19 18 17 16 15 14 13 12 11 Vbb Vbb OUT1 OUT1 Vbb Vbb OUT2 OUT2 Vbb Vbb 1) With external current limit (e.g. resistor RGND=150 ) in GND connection, resistor in series with ST connection, reverse load current limited by connected load. Semiconductor Group 1 of 12 2003-Oct-01 BTS 707 Block diagram + Vbb Leadframe Voltage source Overvoltage protection Current limit Gate protection VLogic Voltage sensor Charge pump Level shifter Rectifier Open load ESD Logic detection Short circuit Limit for unclamped ind. loads OUT1 17,18 3 4 1 SignalGND Chip 1 IN1 Temperature sensor Load ST1 GND1 Chip 1 detection Load GND + Vbb Leadframe Logic and protection circuit of chip 2 (equivalent to chip 1) IN2 OUT2 13,14 7 8 6 SignalGND Chip 2 Load ST2 GND2 Chip 2 PROFET Leadframe connected to pin 1, 10, 11, 12, 15, 16, 19, 20 Load GND Maximum Ratings at Tj = 25C unless otherwise specified Parameter Supply voltage (overvoltage protection see page 4) Supply voltage for full short circuit protection Tj,start = -40 ...+150C Load current (Short-circuit current, see page 5) Operating temperature range Storage temperature range Symbol Vbb Vbb IL Tj Tstg Values 65 40 self-limited -40 ...+150 -55 ...+150 Unit V V A C Semiconductor Group 2 2003-Oct-01 BTS 707 Maximum Ratings at Tj = 25C unless otherwise specified Parameter Power dissipation (DC)2) Ta = 25C: (all channels active) Ta = 85C: Electrostatic discharge capability (ESD) IN, ST: (Human Body Model) all other pins: Input voltage (DC) Current through input pin (DC) Current through status pin (DC) see internal circuit diagram page 7 Symbol Ptot VESD VIN IIN IST Values 3 1.6 1.0 1.0 -0.5 ... +36 2.0 5.0 Unit W kV V mA Thermal Characteristics Parameter and Conditions Symbol min Thermal resistance junction - soldering point2),3) each channel: Rthjs 2) junction - ambient one channel active: Rthja all channels active: ---Values typ max -45 37 18 --Unit K/W Electrical Characteristics Parameter and Conditions, each of the two channels at Tj = 25 C, Vbb = 12 V unless otherwise specified Symbol Values min typ max Unit Load Switching Capabilities and Characteristics On-state resistance (Vbb to OUT) each channel, Tj = 25C: RON IL = 2 A Vbb = 24 V Tj = 150C: two parallel channels, Tj = 25C: Nominal load current one channel active: IL(NOM) two parallel channels active: 2), T = 85C, T 150C Device on PCB a j Output current while GND disconnected or pulled IL(GNDhigh) up; Vbb = 32 V, VIN = 0, see diagram page 8 2) 3) -- 225 400 113 1.9 2.8 -- 250 500 125 -- m 1.60 2.4 -- A 1.1 mA Device on 50mm*50mm*1.5mm epoxy PCB FR4 with 6cm2 (one layer, 70m thick) copper area for Vbb connection. PCB is vertical without blown air. See page 12 Soldering point: upper side of solder edge of device pin 15. See page 12 Semiconductor Group 3 2003-Oct-01 BTS 707 Parameter and Conditions, each of the two channels at Tj = 25 C, Vbb = 12 V unless otherwise specified Symbol ton toff dV/dton Values min typ max 15 20 ----80 70 6 Unit s Turn-on time to 90% VOUT: Turn-off time to 10% VOUT: RL = 12 , Vbb = 20 V, Tj =-40...+150C Slew rate on 10 to 30% VOUT, RL = 12 , Vbb = 20 V, Tj =-40...+150C: Slew rate off 70 to 40% VOUT, RL = 12 , Vbb = 20 V, Tj =-40...+150C: Operating Parameters Operating voltage4) Tj =-40...+150C: Undervoltage shutdown Tj =-40...+150C: Undervoltage restart Tj =-40...+150C: Undervoltage restart of charge pump see diagram page 10 Tj =-40...+150C: Undervoltage hysteresis Vbb(under) = Vbb(u rst) - Vbb(under) Overvoltage protection5) Tj =-40...+150C: I bb = 40 mA Standby current, all channels off VIN = 0 Tj =150C: 6), V = 5V, Operating current IN Tj =-40...+150C one channel on: IGND = IGND1 + IGND2, two channels on: Protection Functions7) Initial peak short circuit current limit, (see timing diagrams, page 9) V/s -dV/dtoff -- -- 7 V/s Vbb(on) Vbb(under) Vbb(u rst) Vbb(ucp) Vbb(under) Vbb(AZ) Ibb(off) 5.8 2.7 ---65 ----- ---5.6 0.4 70 20 58 4.7 4.9 7.5 --70 V V V V V V A IGND 2.2 4.4 --- mA each channel, Tj =-40C: Tj =25C: Tj =+150C: two parallel channels Output clamp (inductive load switch off)8) at VON(CL) = Vbb - VOUT Thermal overload trip temperature Thermal hysteresis 4) 5) 6) 7) --19 -10 -4.0 --twice the current of one channel VON(CL) 59 -75 Tjt IL(SCp) A V C K Tjt 150 -- -10 --- 8) At supply voltage increase up to Vbb = 5.6 V typ without charge pump, VOUT Vbb - 2 V see also VON(CL) in circuit diagram on page 7. Add IST, if IST > 0 Integrated protection functions are designed to prevent IC destruction under fault conditions described in the data sheet. Fault conditions are considered as "outside" normal operating range. Protection functions are not designed for continuous repetitive operation. If channels are connected in parallel, output clamp is usually accomplished by the channel with the lowest VON(CL) Semiconductor Group 4 2003-Oct-01 BTS 707 Parameter and Conditions, each of the two channels at Tj = 25 C, Vbb = 12 V unless otherwise specified Symbol Values min typ max Unit Reverse Battery Reverse battery voltage 9) Diagnostic Characteristics Open load detection current Open load detection voltage Short circuit detection voltage (pin 3 to 5) Input and Status Feedback10) Input resistance (see circuit page 7) -Vbb -- -- 32 V A V V IL(off) Tj =-40..+150C: VOUT(OL) VON(SC) -2.4 -- 6 3 2.5 -4 -- RI VIN(T+) VIN(T-) VIN(T) VIN = 0.4 V: IIN(off) VIN = 2.5 V: IIN(on) td(ST OL3) -1 0.8 -1 10 -- 20 --0.5 -25 200 -2.5 --30 70 -- k V V V A A s Input turn-on threshold voltage Input turn-off threshold voltage Input threshold hysteresis Off state input current On state input current Delay time for status with open load (see timing diagrams, page 10) Status output (open drain) Zener limit voltage Tj =-40...+150C, IST = +1.6 mA: VST(high) ST low voltage Tj =-40...+150C, IST = +1.6 mA: VST(low) 5.4 -- 6.1 -- -0.4 V Requires a 150 resistor in GND connection. The reverse load current through the intrinsic drain-source diode has to be limited by the connected load. Note that the power dissipation is higher compared to normal operating conditions due to the voltage drop across the intrinsic drain-source diode. The temperature protection is not active during reverse current operation! Input and Status currents have to be limited (see max. ratings page 3 and circuit page 7). 10) If ground resistors R GND are used, add the voltage drop across these resistors. 9) Semiconductor Group 5 2003-Oct-01 BTS 707 Truth Table Channel 1 Channel 2 Normal operation Open load Short circuit to GND Short circuit to Vbb Overtemperature Undervoltage Overvoltage Input 1 Output 1 Status 1 Input 2 Output 2 Status 2 BTS 707 level level L L L H H H Z L H H H H L L L H L L L H H H H H L L L H L L L L L H L L no overvoltage shutdown, see normal operation Parallel switching of channel 1 and 2 is easily possible by connecting the inputs and outputs in parallel. The status outputs ST1 and ST2 have to be configured as a 'Wired OR' function with a single pull-up resistor. Terms V bb Ibb I IN1 3 I ST1 V IN1 VST1 4 ST1 IN1 Leadframe Vbb I L1 PROFET Chip 1 GND1 2 R GND1 IGND1 VOUT1 OUT1 17,18 V VON1 I ST2 IN2 VST2 8 ST2 Leadframe IN2 Vbb I L2 PROFET Chip 2 GND2 6 R GND2 IGND2 VOUT2 OUT2 13,14 VON2 I IN2 7 Leadframe (Vbb) is connected to pin 1,10,11,12,15,16,19,20 External RGND optional; two resistors RGND1, RGND2 = 150 or a single resistor RGND = 75 for reverse battery protection up to the max. operating voltage. Semiconductor Group 6 2003-Oct-01 BTS 707 Input circuit (ESD protection), IN1 or IN2 R IN I VZ Inductive and overvoltage output clamp, OUT1 or OUT2 +Vbb ESD-ZD I GND I I V ON OUT ESD zener diodes are not to be used as voltage clamp at DC conditions. Operation in this mode may result in a drift of the zener voltage (increase of up to 1 V). PROFET Power GND Status output, ST1 or ST2 +5V VON clamped to VON(CL) = -- V typ. Overvoltage protection of logic part GND1 or GND2 R ST(ON) ST + V bb GND ESDZD IN V RI Logic Z2 ESD-Zener diode: 6.1 V typ., max 5.0 mA; RST(ON) < 0 at 1.6 mA, ESD zener diodes are not to be used as voltage clamp at DC conditions. Operation in this mode may result in a drift of the zener voltage (increase of up to 1 V). R ST ST V Z1 PROFET GND Short Circuit detection Fault Signal at ST-Pin: VON > 2.5 V typ, no switch off by the PROFET itself, external switch off recommended! + V bb R GND Signal GND VZ1 = 6.1 V typ., VZ2 = 70 V typ., RI = 20 k typ., RGND = 150 , RST = 15 k nominal. V ON Open-load detection, OUT1 or OUT2 OFF-state diagnostic condition: VOUT > 3 V typ.; IN low OUT Logic unit Short circuit detection OFF I L(OL) V OUT Logic unit Open load detection Signal GND Semiconductor Group 7 2003-Oct-01 BTS 707 GND disconnect Inductive load switch-off energy dissipation E bb E AS Vbb PROFET OUT ELoad IN Vbb PROFET OUT IN ST GND V bb V IN V ST V GND = ST GND ZL { R L L EL ER Any kind of load. In case of IN = high is VOUT VIN - VIN(T+). Due to VGND > 0, no VST = low signal available. Energy stored in load inductance: EL = 1/2*L*I L While demagnetizing load inductance, the energy dissipated in PROFET is 2 GND disconnect with GND pull up IN Vbb PROFET OUT EAS= Ebb + EL - ER= VON(CL)*iL(t) dt, with an approximate solution for RL > 0 : EAS= IL* L (V + |VOUT(CL)|) 2*RL bb IL*RL ST GND ln (1+ |V OUT(CL)| ) V V bb V IN ST V GND Any kind of load. If VGND > VIN - VIN(T+) device stays off Due to VGND > 0, no VST = low signal available. Vbb disconnect with energized inductive load high IN Vbb PROFET OUT ST GND V bb For an inductive load current up to the limit defined by EAS (max. ratings ) each switch is protected against loss of Vbb. Consider at your PCB layout that in the case of Vbb disconnection with energized inductive load the whole load current flows through the GND connection. Semiconductor Group 8 2003-Oct-01 BTS 707 Timing diagrams Both channels are symmetric and consequently the diagrams are valid for channel 1 and channel 2 Figure 1a: Vbb turn on, : IN IN Figure 3a: Short circuit: shut down by overtempertature, reset by cooling V bb t d(bb IN) V OUT normal operation Output short to GND V OUT I L I L(SCp) A ST open drain ST I L(SCr) A t t Heating up requires several milliseconds, depending on external conditions. External shutdown in response to status fault signal recommended. in case of too early VIN=high the device may not turn on (curve A) td(bb IN) approx. 150 s Figure 2a: Switching an inductive load Figure 4a: Overtemperature: Reset if Tj OUT V OUT I L T t J t Semiconductor Group 9 2003-Oct-01 BTS 707 Figure 5a: Open load, : detection in OFF-state, turn on/off to open load Figure 6a: Undervoltage: IN IN ST t d(ST OL3) V bb V bb(under) Vbb(u cp) V bb(u rst) V OUT V OUT I L open normal *) t ST open drain t td(ST,OL3) depends on external circuitry because of high impedance *) IL = 6 A typ Figure 6b: Undervoltage restart of charge pump V on Figure 5b: Open load, : detection in OFF-state, open load occurs in off-state IN off-state ST V V OUT bb(u V V V bb(under) bb(u cp) OUT(OL) on-state Vbb charge pump starts at Vbb(ucp) =5.6 V typ. I L normal *) open normal *) t *) IL = 6 A typ Semiconductor Group 10 2003-Oct-01 BTS 707 Figure 7a: Overvoltage, no shutdown: IN Vbb VON(CL) V OUT VOUT(OL) ST t Semiconductor Group 11 2003-Oct-01 BTS 707 Package and Ordering Code Standard P-DSO-20-9 BTS 707 Ordering Code Q67060-S7010-A2 Published by Infineon Technologies AG, St.-Martin-Strasse 53, D-81669 Munchen (c) Infineon Technologies AG 2001 All Rights Reserved. Attention please! The information herein is given to describe certain components and shall not be considered as a guarantee of characteristics. Terms of delivery and rights to technical change reserved. We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding circuits, descriptions and charts stated herein. Infineon Technologies is an approved CECC manufacturer. All dimensions in millimetres 1) Does not include plastic or metal protrusions of 0.15 max per side 2) Does not include dambar protrusion of 0.05 max per side Information For further information on technology, delivery terms and conditions and prices please contact your nearest Infineon Technologies Office in Germany or our Infineon Technologies Representatives worldwide (see address list). Warnings Due to technical requirements components may contain dangerous substances. For information on the types in question please contact your nearest Infineon Technologies Office. Infineon Technologies Components may only be used in lifesupport devices or systems with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that lifesupport device or system, or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. Definition of soldering point with temperature Ts: upper side of solder edge of device pin 15. Pin 15 Printed circuit board (FR4, 1.5mm thick, one layer 70m, 6cm2 active heatsink area) as a reference for max. power dissipation Ptot, nominal load current IL(NOM) and thermal resistance Rthja Semiconductor Group 12 2003-Oct-01 |
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