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APT18M100B APT18M100S 1000V, 18A, 0.70 Max N-Channel MOSFET Power MOS 8TM is a high speed, high voltage N-channel switch-mode power MOSFET. A proprietary planar stripe design yields excellent reliability and manufacturability. Low switching loss is achieved with low input capacitance and ultra low Crss "Miller" capacitance. The intrinsic gate resistance and capacitance of the poly-silicon gate structure help control slew rates during switching, resulting in low EMI and reliable paralleling, even when switching at very high frequency. Reliability in flyback, boost, forward, and other circuits is enhanced by the high avalanche energy capability. TO -2 47 D3PAK APT18M100B Single die MOSFET APT18M100S D G S FEATURES * Fast switching with low EMI/RFI * Low RDS(on) * Ultra low Crss for improved noise immunity * Low gate charge * Avalanche energy rated * RoHS compliant TYPICAL APPLICATIONS * PFC and other boost converter * Buck converter * Two switch forward (asymmetrical bridge) * Single switch forward * Flyback * Inverters Absolute Maximum Ratings Symbol ID IDM VGS EAS IAR Parameter Continuous Drain Current @ TC = 25C Continuous Drain Current @ TC = 100C Pulsed Drain Current Gate-Source Voltage Single Pulse Avalanche Energy 2 Avalanche Current, Repetitive or Non-Repetitive 1 Ratings 18 12 68 30 1070 9 Unit A V mJ A Thermal and Mechanical Characteristics Symbol PD RJC RCS TJ,TSTG TL WT Characteristic Total Power Dissipation @ TC = 25C Junction to Case Thermal Resistance Case to Sink Thermal Resistance, Flat, Greased Surface Operating and Storage Junction Temperature Range Soldering Temperature for 10 Seconds (1.6mm from case) Package Weight 0.22 6.2 10 1.1 -55 0.11 150 300 Min Typ Max 625 0.20 Unit W C/W C oz g in*lbf N*m 10-2006 050-8091 Rev A Torque Mounting Torque ( TO-247 Package), 6-32 or M3 screw Microsemi Website - http://www.microsemi.com Static Characteristics Symbol VBR(DSS) VBR(DSS)/TJ RDS(on) VGS(th) VGS(th)/TJ IDSS IGSS TJ = 25C unless otherwise specified Test Conditions VGS = 0V, ID = 250A Reference to 25C, ID = 250A VGS = 10V, ID = 9A VGS = VDS, ID = 1mA VDS = 1000V VGS = 0V TJ = 25C TJ = 125C APT18M100B_S Typ 1.15 0.60 4 -10 Max Unit V V/C V mV/C A nA Parameter Drain-Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Drain-Source On Resistance 3 Min 1000 Gate-Source Threshold Voltage Threshold Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate-Source Leakage Current 3 0.70 5 100 500 100 VGS = 30V Dynamic Characteristics Symbol gfs Ciss Crss Coss Co(cr) Co(er) Qg Qgs Qgd td(on) tr td(off) tf 4 TJ = 25C unless otherwise specified Test Conditions VDS = 50V, ID = 9A VGS = 0V, VDS = 25V f = 1MHz Parameter Forward Transconductance Input Capacitance Reverse Transfer Capacitance Output Capacitance Effective Output Capacitance, Charge Related Min Typ 19 4845 65 405 165 Max Unit S pF 5 VGS = 0V, VDS = 0V to 667V Effective Output Capacitance, Energy Related Total Gate Charge Gate-Source Charge Gate-Drain Charge Turn-On Delay Time Current Rise Time Turn-Off Delay Time Current Fall Time VGS = 0 to 10V, ID = 9A, VDS = 500V Resistive Switching VDD = 667V, ID = 9A RG = 4.7 6 , VGG = 15V 85 150 26 70 22 20 75 19 nC ns Source-Drain Diode Characteristics Symbol IS ISM VSD trr Qrr dv/dt Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) 1 Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Peak Recovery dv/dt Test Conditions MOSFET symbol showing the integral reverse p-n junction diode (body diode) Min D Typ Max 18 Unit A G S 68 1.0 1080 24 10 V ns C V/ns ISD = 9A, TJ = 25C, VGS = 0V ISD = 9A 3 diSD/dt = 100A/s, TJ = 25C ISD 9A, di/dt 1000A/s, VDD = 800V, TJ = 125C 1 Repetitive Rating: Pulse width and case temperature limited by maximum junction temperature. 2 Starting at TJ = 25C, L = 26.42mH, RG = 4.7, IAS = 9A. 3 Pulse test: Pulse Width < 380s, duty cycle < 2%. 4 Co(cr) is defined as a fixed capacitance with the same stored charge as COSS with VDS = 67% of V(BR)DSS. 5 Co(er) is defined as a fixed capacitance with the same stored energy as COSS with VDS = 67% of V(BR)DSS. To calculate Co(er) for any value of VDS less than V(BR)DSS, use this equation: Co(er) = -1.41E-8/VDS^2 + 2.48E-9/VDS + 4.81E-11. 6 RG is external gate resistance, not including internal gate resistance or gate driver impedance. (MIC4452) Microsemi reserves the right to change, without notice, the specifications and information contained herein. 050-8091 Rev A 10-2006 60 50 ID, DRAIN CURRENT (A) 40 30 V GS = 10V 20 APT18M100B_S T = 125C J V GS = 6, 7, 8 & 9V ID, DRIAN CURRENT (A) TJ = -55C 15 10 5V TJ = 25C 20 10 0 5 4.5V TJ = 125C TJ = 150C 30 25 20 15 10 5 0 VDS(ON), DRAIN-TO-SOURCE VOLTAGE (V) Figure 1, Output Characteristics NORMALIZED TO VGS = 10V @ 9A 0 0 30 25 20 15 10 5 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 2, Output Characteristics RDS(ON), DRAIN-TO-SOURCE ON RESISTANCE 3.0 2.5 2.0 1.5 1.0 0.5 60 50 ID, DRAIN CURRENT (A) 40 30 20 10 0 VDS> ID(ON) x RDS(ON) MAX. 250SEC. PULSE TEST @ <0.5 % DUTY CYCLE TJ = -55C TJ = 25C TJ = 125C 0 25 50 75 100 125 150 0 -55 -25 TJ, JUNCTION TEMPERATURE (C) Figure 3, RDS(ON) vs Junction Temperature 25 0 8 7 6 5 4 3 2 1 VGS, GATE-TO-SOURCE VOLTAGE (V) Figure 4, Transfer Characteristics Ciss 10,000 gfs, TRANSCONDUCTANCE 20 TJ = -55C TJ = 25C C, CAPACITANCE (pF) 1,000 15 TJ = 125C 10 100 Coss 5 Crss 0 0 10 8 6 4 ID, DRAIN CURRENT (A) Figure 5, Gain vs Drain Current 2 ID = 9A 12 1000 800 600 400 200 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 6, Capacitance vs Drain-to-Source Voltage 0 60 ISD, REVERSE DRAIN CURRENT (A) 50 40 30 20 10 0 TJ = 25C TJ = 150C 10 16 VGS, GATE-TO-SOURCE VOLTAGE (V) 14 12 10 8 6 4 2 VDS = 240V VDS = 600V VDS = 960V 050-8091 20 40 60 80 100 120 140 160 180 200 Qg, TOTAL GATE CHARGE (nC) Figure 7, Gate Charge vs Gate-to-Source Voltage 0 0 1.2 1.0 0.8 0.6 0.4 0.2 VSD, SOURCE-TO-DRAIN VOLTAGE (V) Figure 8, Reverse Drain Current vs Source-to-Drain Voltage 0 Rev A 10-2006 100 I 100 I APT18M100B_S DM DM ID, DRAIN CURRENT (A) ID, DRAIN CURRENT (A) 10 13s 100s 10 Rds(on) 13s 100s 1 1ms Rds(on) 10ms 100ms 1 TJ = 150C TC = 25C 1ms 10ms 100ms DC line 0.1 TJ = 125C TC = 75C DC line 1 10 100 1000 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 9, Forward Safe Operating Area 0.1 Scaling for Different Case & Junction Temperatures: ID = ID(T = 25C)*(TJ - TC)/125 C 10 100 1000 VDS, DRAIN-TO-SOURCE VOLTAGE (V) Figure 10, Maximum Forward Safe Operating Area 1 TJ (C) 0.0167 Dissipated Power (Watts) 0.00457 0.0176 0.270 0.0688 TC (C) 0.114 ZEXT are the external thermal impedances: Case to sink, sink to ambient, etc. Set to zero when modeling only the case to junction. Figure 11, Transient Thermal Impedance Model 0.25 Z JC, THERMAL IMPEDANCE (C/W) 0.20 D = 0.9 0.7 0.5 0.3 Note: 0.15 PDM 0.10 ZEXT t1 t2 0.05 0.1 0.05 SINGLE PULSE Duty Factor D = 1/t2 Peak TJ = PDM x ZJC + TC t1 = Pulse Duration t 0 10-5 10-3 10-2 10-1 RECTANGULAR PULSE DURATION (seconds) Figure 12. Maximum Effective Transient Thermal Impedance Junction-to-Case vs Pulse Duration 10-4 1.0 TO-247 (B) Package Outline e3 100% Sn Plated 15.49 (.610) 16.26 (.640) 5.38 (.212) 6.20 (.244) D3PAK Package Outline Drain (Heat Sink) 4.98 (.196) 5.08 (.200) 1.47 (.058) 1.57 (.062) 15.95 (.628) 16.05(.632) 13.41 (.528) 13.51(.532) 4.69 (.185) 5.31 (.209) 1.49 (.059) 2.49 (.098) 6.15 (.242) BSC 1.04 (.041) 1.15(.045) Drain 20.80 (.819) 21.46 (.845) 3.50 (.138) 3.81 (.150) Revised 4/18/95 13.79 (.543) 13.99(.551) Revised 8/29/97 11.51 (.453) 11.61 (.457) 0.46 (.018) 0.56 (.022) {3 Plcs} 10-2006 4.50 (.177) Max. 0.40 (.016) 0.79 (.031) 2.87 (.113) 3.12 (.123) 1.65 (.065) 2.13 (.084) 19.81 (.780) 20.32 (.800) 0.020 (.001) 0.178 (.007) 2.67 (.105) 2.84 (.112) 1.27 (.050) 1.40 (.055) 1.98 (.078) 2.08 (.082) 5.45 (.215) BSC {2 Plcs.} 1.22 (.048) 1.32 (.052) 3.81 (.150) 4.06 (.160) (Base of Lead) Rev A 1.01 (.040) 1.40 (.055) Gate Drain Source Heat Sink (Drain) and Leads are Plated 2.21 (.087) 2.59 (.102) 050-8091 5.45 (.215) BSC 2-Plcs. Dimensions in Millimeters and (Inches) Source Drain Gate Dimensions in Millimeters (Inches) Microsemi's products are covered by one or more of U.S.patents 4,895,810 5,045,903 5,089,434 5,182,234 5,019,522 5,262,336 6,503,786 5,256,583 4,748,103 5,283,202 5,231,474 5,434,095 5,528,058 and foreign patents. US and Foreign patents pending. All Rights Reserved. |
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