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Title
Engineering Prototype Report for EP-91 - 12 W Power Supply using TinySwitch(R)-III (TNY278P)
Specification 85-265 VAC Input, 12 V, 1 A Output Application Author Document Number Date Revision
TinySwitch-III Reference Design (DAK-91) Power Integrations Applications Department
EPR-91
7-February-06 1.1
Summary and Features
* EcoSmart(R) - Meets all existing and proposed harmonized energy efficiency standards including: CECP (China), CEC, EPA, AGO, European Commission * No-load consumption 140 mW at 265 VAC (no bias winding required) * > 75% active-mode efficiency (exceeds standards requirement of 71%) BP/M capacitor value selects MOSFET current limit for greater design flexibility Output overvoltage protection (OVP) using primary bias winding sensed shutdown feature Tightly toleranced I2f parameter (-10%, +12%) reduces system cost: * Increases MOSFET and magnetics power delivery * Reduces overload power, which lowers output diode and capacitor costs Integrated TinySwitch-III Safety/Reliability features: * Accurate ( 5%), auto-recovering, hysteretic thermal shutdown function maintains safe PCB temperatures under all conditions * Auto-restart protects against output short circuit and open loop fault conditions * > 3.2 mm creepage on package enables reliable operation in high humidity and high pollution environments Meets EN550022 and CISPR-22 Class B conducted EMI with >12 dBV margin Meets IEC61000-4-5 Class 3 AC line surge
Power Integrations 5245 Hellyer Avenue, San Jose, CA 95138 USA. Tel: +1 408 414 9200 Fax: +1 408 414 9201 www.powerint.com
* * * *
* *
EP-91 12 V, 1 A, Universal Input Supply
7-Feb-2006
The products and applications illustrated herein (including circuits external to the products and transformer construction) may be covered by one or more U.S. and foreign patents or potentially by pending U.S. and foreign patent applications assigned to Power Integrations. A complete list of Power Integrations' patents may be found at www.powerint.com.
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Page 2 of 36
7-Feb-2006
EP-91 12 V, 1 A, Universal Input Supply
Table Of Contents
Introduction................................................................................................................. 5 Power Supply Specification ........................................................................................ 6 Circuit Diagram........................................................................................................... 7 Circuit Description ...................................................................................................... 8 4.1 Input Rectification and Filtering ........................................................................... 8 4.2 TNY278P Operation ............................................................................................ 8 4.3 Output Rectification and Filtering ........................................................................ 9 4.4 Feedback and Output Voltage Regulation........................................................... 9 4.5 Output Overvoltage Shutdown ............................................................................ 9 4.6 EMI Design Aspects ............................................................................................ 9 4.7 Peak Primary Current Limit Selection................................................................ 10 4.8 UV Lockout........................................................................................................ 10 5 PCB Layout .............................................................................................................. 11 6 Bill Of Materials ........................................................................................................ 12 7 Transformer Specification......................................................................................... 13 7.1 Electrical Diagram ............................................................................................. 13 7.2 Electrical Specifications..................................................................................... 13 7.3 Materials............................................................................................................ 14 7.4 Transformer Build Diagram ............................................................................... 14 7.5 Transformer Construction.................................................................................. 15 8 Transformer Spreadsheet......................................................................................... 16 9 Performance Data .................................................................................................... 18 9.1 Efficiency........................................................................................................... 18 9.2 Active Mode CEC Measurement Data............................................................... 19 9.3 No-load Input Power (R8 not installed: no bias winding supplementation)........ 20 9.4 No-load Input Power (with R8 and bias winding supplementation) ................... 20 9.5 Available Standby Output Power....................................................................... 21 9.6 Regulation ......................................................................................................... 22 9.6.1 Load and Line ............................................................................................ 22 10 Thermal Performance ............................................................................................... 23 11 Waveforms............................................................................................................... 24 11.1 Drain Voltage and Current, Normal Operation .................................................. 24 11.2 Output Voltage Start-Up Profile......................................................................... 25 11.3 Drain Voltage and Current Start-Up Profile ....................................................... 25 11.4 Load Transient Response (75% to 100% Load Step) ....................................... 26 11.5 Output Ripple Measurements............................................................................ 27 11.5.1 Ripple Measurement Technique ................................................................ 27 11.5.2 Measurement Results ................................................................................ 28 11.6 Overvoltage Shutdown ...................................................................................... 28 12 Line Surge................................................................................................................ 29 13 Conducted EMI ........................................................................................................ 30 13.1 115 VAC, Full Load ........................................................................................... 30 13.2 230 VAC, Full Load ........................................................................................... 31 14 Audible Noise........................................................................................................... 32
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1 2 3 4
Page 3 of 36
EP-91 12 V, 1 A, Universal Input Supply 15 16 17 18
7-Feb-2006
Extended and Reduced Current Limit (ILIMIT) Operation ....................................... 33 TNY277 and TNY279 Operation in EP-91............................................................ 33 OVP Operation Verification .................................................................................. 34 Revision History.................................................................................................... 35
Important Note: Although this board was designed to satisfy safety isolation requirements, it has not been agency approved. Therefore, all testing should be performed using an isolation transformer to provide the AC input to the power supply.
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Page 4 of 36
7-Feb-2006
EP-91 12 V, 1 A, Universal Input Supply
1 Introduction
This report describes a universal input, 12 V, 1 A flyback power supply using a TNY278P device from the TinySwitch-III family of ICs. It contains the complete specification of the power supply, a detailed circuit diagram, the entire bill of materials required to build the supply, extensive documentation of the power transformer, along with test data and oscillographs of the most important electrical waveforms. The board provides a number of user configurable options which are designed to demonstrate the features and flexibility of the TinySwitch-III family. These include easy adjustment of the device current limit for increased output power or higher efficiency operation, and a latched output overvoltage shutdown.
AC
AC
+
-
+
Figure 1 - EP-91 Populated Circuit Board Photographs.
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EP-91 12 V, 1 A, Universal Input Supply
7-Feb-2006
2 Power Supply Specification
Description Input Voltage Frequency No-load Input Power (230 VAC) No-load Input Power (230 VAC) Output Output Voltage Output Ripple Voltage Output Current Total Output Power Continuous Output Power Overvoltage Shutdown Efficiency Full Load Required average efficiency at 25, 50, 75 and 100 % of POUT Environmental Conducted EMI Safety
Meets CISPR22B / EN55022B Designed to meet IEC950, UL1950 Class II 1.2/50 s surge, IEC 1000-4-5, Series Impedance: Differential Mode: 2 Common Mode: 12 Free convection, sea level
Symbol VIN fLINE
Min 85 47
Typ
Max 265 64 0.15 0.05 13 100
Units VAC Hz W W V mV A W V % %
Comment
2 Wire - no P.E. w/o UVLO resistor or bias winding With bias winding support 8% 20 MHz bandwidth
50/60
VOUT VRIPPLE IOUT POUT VOV CEC
11 1 12 15 75 71.3
12
18
With bias sense Measured at POUT 25 oC Per CEC / Energy Star STDs, with TNY278 & standard current limit
Surge (Differential) Surge (Common mode) Ambient Temperature TAMB
1 2 0 50
kV kV
o
C
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Page 6 of 36
7-Feb-2006
EP-91 12 V, 1 A, Universal Input Supply
3 Circuit Diagram
Figure 2 - EP-91 Circuit Diagram.
Page 7 of 36
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EP-91 12 V, 1 A, Universal Input Supply
7-Feb-2006
4 Circuit Description
This flyback power supply was designed around the TNY278P (U1 in Figure 2). The output voltage is sensed and fed back to U1 through optocoupler U2. That feedback is used by U1 to maintain constant voltage (CV) regulation of the output. 4.1 Input Rectification and Filtering Diodes D1-D4 rectify the AC input. Capacitors C1 and C2 filter the rectified DC. Inductor L1, C1 and C2 form a pi filter that attenuates differential mode conducted EMI. 4.2 TNY278P Operation The TNY278P device (U1) integrates an oscillator, a switch controller, startup and protection circuitry, and a power MOSFET, all on one monolithic IC. One side of the power transformer (T1) primary winding is connected to the positive leg of C2, and the other side is connected to the DRAIN pin of U1. At the start of a switching cycle, the controller turns the MOSFET on, and current ramps up in the primary winding, which stores energy in the core of the transformer. When that current reaches the limit threshold, the controller turns the MOSFET off. Due to the phasing of the transformer windings and the orientation of the output diode, the stored energy then induces a voltage across the secondary winding, which forward biases the output diode, and the stored energy is delivered to the output capacitor. When the MOSFET turns off, the leakage inductance of the transformer induces a voltage spike on the drain node. The amplitude of that spike is limited by an RCD clamp network that consists of D5, C4 and R2. Resistor R1 and VR1 provide hard clamping of the drain voltage, only conducting during output overload. Resistor R2 also limits the reverse current that flows through D5 when the MOSFET turns on. This allows a slow, low-cost, glass passivated diode (with a recovery time of 2 s.) to be used for D5, which improves conducted EMI and efficiency. Using ON/OFF control, U1 skips switching cycles to regulate the output voltage, based on feedback to its EN/UV pin. The EN/UV pin current is sampled, just prior to each switching cycle, to determine if that switching cycle should be enabled or disabled. If the EN/UV pin current is <115 A, the next switching cycle begins, and is terminated when the current through the MOSFET reaches the internal current limit threshold. To evenly spread switching cycles, preventing group pulsing, the EN pin threshold current is modulated between 115 A and 60 A based on the state during the previous cycle. A state-machine within the controller adjusts the MOSFET current limit threshold to one of four levels, depending on the load being demanded from the supply. As the load on the supply drops, the current limit threshold is reduced. This ensures that the effective switching frequency stays above the audible range until the transformer flux density is low. When the standard production technique of dip varnishing is used for the transformer, audible noise is practically eliminated.
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Page 8 of 36
7-Feb-2006
EP-91 12 V, 1 A, Universal Input Supply
4.3 Output Rectification and Filtering Diode D7 rectifies the output of T1. Output voltage ripple was minimized by using a low ESR capacitor for C10 (see Section 6 for component part numbers and values). A post filter (ferrite bead L2 and C11) attenuates the high frequency switching noise. 4.4 Feedback and Output Voltage Regulation The supply's output voltage regulation set point is set by the voltage that develops across Zener diode VR3, R6 and the LED in opto-coupler U2. The value of R4 was calculated to bias VR3 to about 0.5 mA when it goes into reverse avalanche conduction. This ensures that it is operating close to its rated knee current. Resistor R6 limits the maximum current during load transients. The values of R4 and R6 can both be varied slightly to fine-tune the output regulation set point. When the output voltage rises above the set point, the LED in U2 becomes forward biased. On the primary side, the photo-transistor of U2 turns on and draws current out of the EN/UV pin of U1. Just before the start of each switching cycle, the controller checks the EN/UV pin current. If the current flowing out of the EN/UV pin is greater than 115 A, that switching cycle will be disabled. As switching cycles are enabled and disabled, the output voltage is kept very close to the regulation set point. For greater output voltage regulation accuracy, a reference IC such as a TL431 can be used in place of VR3. 4.5 Output Overvoltage Shutdown The TinySwitch-III family of ICs can detect overvoltage on the output of the supply and latch off. This protects the load in an open feedback loop fault condition, such as the failure of the optocoupler. Overvoltage on the output is detected through the BP/M pin and the bias winding on the transformer. The bias winding voltage is determined by the reflection of the output voltage through the turns ratio of the transformer. Therefore, an overvoltage on the output will be reflected onto the bias winding. The overvoltage threshold is the sum of the breakdown voltage of Zener diode VR2 and the BP/M pin voltage (28 V + 5.8 V). If the output voltage becomes abnormally high, the voltage on the bias winding will exceed the threshold voltage and excess current will flow into the BP/M pin. The latching shutdown circuit is activated when current into the BP/M pin exceeds 5 mA. Resetting a latched shutdown requires removing the AC input from the supply long enough to allow the input capacitors (C1 and C2) to discharge, and the BP/M pin voltage to drop below 2 V. Resistors R7 and R3 provide additional filtering of the bias voltage, with R3 also limiting the maximum current into the BYPASS pin in an OV condition 4.6 EMI Design Aspects An input pi filter (C1, L1 and C2) attenuates conducted, differential mode EMI noise. Shielding techniques (E-ShieldTM) were used in the construction of T1 to reduce common mode EMI displacement currents. Resistor R2 and capacitor C4 dampen out some of the high frequency ringing that occurs when the MOSFET turns off. When combined with the IC's frequency jitter function, these techniques produce excellent conducted and radiated EMI performance (see Section 12 of this report).
Page 9 of 36
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EP-91 12 V, 1 A, Universal Input Supply
7-Feb-2006
4.7 Peak Primary Current Limit Selection The value of the capacitor installed on the BP/M pin allows the current limit of U1 to be selected. The power supply designer can change the current limit of the MOSFET by simply changing the capacitance value connected to the BP/M pin (see the TinySwitch-III data sheet for more details). Installing a 0.1 F capacitor on the BP/M pin selects the standard current limit of the IC, and is the normal choice for enclosed adapter applications. Installing a 1 F capacitor on the BP/M pin reduces the MOSFET current limit, which lowers conduction losses and improves efficiency (at the expense of reducing the maximum power capability of the IC). A 10 F capacitor on the BP/M pin will raise the MOSFET current limit and extend the power capability of the IC (for higher power applications that do not have the thermal constraints of an enclosed adapter, or to supply short-duration, peak load demands). The EP91 demonstration board comes with a 0.1 F capacitor installed as C7, which causes U1 to select the standard current limit specified in the TinySwitch-III data sheet. If C7 were replaced by a 1 F capacitor (C8 in the BOM, section 6), the current limit of U1 will be the same as the standard current limit for a TNY277 device. If a 10 F capacitor is installed, the current limit of U1 will be the same as the standard current limit for a TNY279 device. The flexibility of this option enables the designer to do three things. First, it allows the designer to measure the effect of switching to an adjacent device without actually removing and replacing the IC. Second, it allows a larger device to be used with a lower current limit, for higher efficiency. Third, it allows a smaller device to be used with a higher current limit in a design when higher power is not required on a continual basis, which effectively lowers the cost of the supply. 4.8 UV Lockout The EP91 circuit board has a location where an optional under-voltage (UV) lockout detection resistor (R5) can be installed. When installed, MOSFET switching is disabled at startup until current into the EN/UV pin exceeds 25 A. This allows the designer to set the input voltage at which MOSFET switching will be enabled by choosing the value of R5. For example, a value of 3.6 M requires an input voltage of 65 VAC (92 VDC across C2) before the current into the EN/UV pin exceeds 25 A. The UV detect function also prevents the output of the power supply from glitching (trying to restart) after output regulation is lost (during shutdown), by disabling MOSFET switching until the input voltage rises above the under-voltage lockout threshold.
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Page 10 of 36
7-Feb-2006
EP-91 12 V, 1 A, Universal Input Supply
5 PCB Layout
Figure 3 - Printed Circuit Board Layout (3.2 x 1.8 inches).
Page 11 of 36
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EP-91 12 V, 1 A, Universal Input Supply
7-Feb-2006
6 Bill Of Materials
Item 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 Qty 1 1 1 1 1 2 1 1 1 4 1 1 1 1 2 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 Part Ref C1 C2 C4 C5 C7 C6, C8* C9* C10 C11 D1 D2 D3 D4 D5 D6 D7 F1 J1 J4 J2 J3 JP1 L1 L2 R1 R2 R3 R4 R5* R6 R7 R8* RV1 T1 Value 6.8 F 22 F 10 nF 2.2 nF 100 nF 1 F 10 F 1000 F 100 F 1N4007 1N4007GP UF4003 BYV28-200 3.15 A Description 6.8 F, 400 V, Electrolytic, (10 x 16) 22 F, 400 V, Electrolytic, Low ESR, 901 m, (16 x 20) 10 nF, 1 kV, Disc Ceramic 2.2 nF, Ceramic, Y1 100 nF, 50 V, Ceramic, X7R 1 F, 50 V, Electrolytic, Gen. Purpose, (5 x 11) 10 F, 50 V, Electrolytic, Gen. Purpose, (5 x 11) 1000 F, 25 V, Electrolytic, Very Low ESR, 21 m, (12.5 x 20) 100 F, 25 V, Electrolytic, Very Low ESR, 130 m, (6.3 x 11) 1000 V, 1 A, Rectifier, DO-41 1000 V, 1 A, Rectifier, Glass Passivated, 2 us, DO-41 200 V, 1 A, Ultrafast Recovery, 50 ns, DO-41 200 V, 3.5 A, Ultrafast Recovery, 25 ns, SOD64 3.15 A, 250V,Fast, TR5 Test Point, Black, Thru-hole mount Test Point, White, Thru-hole mount Test Point, Red, Thru-hole mount Wire Jumper, Insulated, 24 AWG 1mH, 350 mA 3.5 mm x 7.6 mm, 75 at 25 MHz, 22 AWG hole, Ferrite Bead 1 k, 5%, 1/4 W, Carbon Film 100 , 5%, 1/4 W, Carbon Film 47 , 5%, 1/8 W, Carbon Film 2 k, 5%, 1/8 W, Carbon Film 3.6 M, 5%, 1/2 W, Carbon Film 390 , 5%, 1/8 W, Carbon Film 20 , 5%, 1/4 W, Carbon Film 21 k, 1%, 1/4 W, Metal Film 275 V, 45 J, 10 mm, Radial Bobbin, EE25, Vertical, 10 pins Complete Assembly Mfg Part Number EKXG401ELL6R8MJ16S EKMX401ELL220ML20S 5HKMS10 440LD22 B37987F5104K000 / ECUS1H104KBB EKMG500ELL1R0ME11D EKMG500ELL100ME11D EKZE250ELL102MK20S EKZE250ELL101MF11D 1N4007 1N4007GP UF4003 BYV28-200 3701315041 5011 5012 5010 KSW24W-0100 HTB2-102-281 2743004112 CFR-25JB-1K0 CFR-25JB-100R CFR-12JB-47R CFR-12JB-2K0 CFR-50JB-3M6 CFR-12JB-390R CFR-25JB-20R MFR-25FBF-21K0 V275LA10 YW-360-02B SNX-1380 LSPA20544 CWS-T1-EP91 SIL6038 TNY278P ISP817A, PC817X1 P6KE150A 1N5255B BZX79-B11 Mfg United Chemi-Con United Chemi-Con Vishay Vishay Epcos/ Panasonic United Chemi-Con United Chemi-Con United Chemi-Con United Chemi-Con Vishay Vishay Vishay Vishay Wickman Keystone Keystone Keystone OK Indust. CUI Fair-Rite Yageo Yageo Yageo Yageo Yageo Yageo Yageo Yageo Littlefuse Yih-Hwa Enterprises Santronics LiShin CWS Hical Power Integrations Isocom, Sharp Vishay Microsemi Vishay
1 mH Ferrite Bead 1 k 100 47 2 k 3.6 M 390 20 21 k 275 VAC EE25 Core
31 32 33 34 35
1 1 1 1 1
U1 U2 VR1 VR2 VR3
TNY278P PC817A P6KE150A 1N5255B BZX79-B11
TinySwitch-III, TNY278P, DIP-8C Optocoupler, 35 V, CTR 80-160%, 4-DIP 150 V, 5 W, 5%, TVS, DO204AC (DO-15) 28 V, 500 mW, 5%, DO-35 11 V, 500 mW, 2%, DO-35
* Optional components
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Page 12 of 36
7-Feb-2006
EP-91 12 V, 1 A, Universal Input Supply
7 Transformer Specification
7.1 Electrical Diagram NC WDG # 1 Cancellation 14T # 30 AWG X2 Primary WDG # 2 56T # 30 AWG 8 3 Bias WDG # 3 6T # 26 AWG X3 Bias 6T # 26 AWG X3 5 4 6 2 Secondary WDG # 5 7T # 26 T.I.W 1
WDG # 4
Figure 4 - Transformer Electrical Diagram.
7.2
Electrical Specifications
1 second, 60 Hz, from Pins 1-5 to Pins 6-10 Pins 1-3, all other windings open, measured at 100 kHz, 0.4 V RMS Pins 1-3, all other windings open Pins 1-3, with Pins 6-8 shorted, measured at 100 kHz, 0.4 V RMS 3000 VAC 1050 H, 10% 500 kHz (Min.) 50 H (Max.)
Electrical Strength Primary Inductance Resonant Frequency Primary Leakage Inductance
Page 13 of 36
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EP-91 12 V, 1 A, Universal Input Supply
7-Feb-2006
7.3
Materials
Item [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] Description 2 Core: PC40EE25-Z, TDK or equivalent Gapped for AL of 335 nH/T Bobbin: EE25, Vertical, 10 pin - Yih-Hwa part # YW-360-02B Magnet Wire: #30 AWG Magnet Wire: #26 AWG Triple Insulated Wire: #26 AWG. Tape: 3M # 44 Polyester web. 2.0 mm wide Tape: 3M 1298 Polyester Film, 2.0 mils thick, 8.6 mm wide Tape: 3M 1298 Polyester Film, 2.0 mils thick, 10.7 mm wide Tape: 3M 1298 Polyester Film, 2.0 mils thick, 4.0 mm wide Varnish (applied by dipping only, not vacuum impregnation)
7.4
Transformer Build Diagram
6 8 5 2 4 1 3 1
Figure 5 - Transformer Build Diagram. 2 mm 2 mm
1 layer of tape
Bias Winding Primary Winding
1 layer of tape
Margin
Tape
Cancellation Winding
No Connect
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Page 14 of 36
7-Feb-2006 7.5 Transformer Construction
EP-91 12 V, 1 A, Universal Input Supply
Bobbin Set Up Orientation Margin Tape WD1 Cancellation Winding Insulation WD#2 Primary winding Insulation WD #3 Bias Winding Insulation WD #4 Bias Winding Insulation Margin Tape WD #5 Secondary Winding Outer Insulation Core Assembly Varnish
Set up the bobbin with its pins oriented to the left hand side. Apply 2.0 mm margin at the pin side of bobbin using item [6]. Match combined height of shield, primary, and bias windings. Start at Pin 1. Wind 14 bifilar turns of item [3] from left to right. Wind with tight tension across entire bobbin evenly. Cut the ends of the bifilar and leave floating. 1 Layer of tape [7] for insulation. Start at pin 3. Wind 28 turns of item [3] from left to right. Apply 1 Layer of tape [7] for insulation. Wind another 28 turns from right to left. Wind with tight tension across entire bobbin evenly. Finish at Pin 1. 1 Layer of tape [7] for insulation. Start at Pin 4, wind 6 trifilar turns of item [5]. Wind from left to right with tight tension. Wind uniformly, in a single layer across entire width of bobbin. Finish on Pin 2. 1 Layer of tape [7] for insulation. Start at Pin 2, wind 6 trifilar turns of item [5] from left to right with tight tension. Wind uniformly, in a single layer across entire width of bobbin. Finish on Pin 5. 1 Layer of tape [8] for insulation. Apply 2.0 mm margin at the pin side of bobbin using item [6]. Match combined height of secondary windings. Start at Pin 8, wind 7 turns of item [5] from left to right. Wind uniformly, in a single layer across entire bobbin evenly. Finish on Pin 6. 3 Layers of tape [8] for insulation. Assemble and secure core halves using item [1] and item [9] Dip varnish using item [10] (do not vacuum impregnate)
Page 15 of 36
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EP-91 12 V, 1 A, Universal Input Supply
7-Feb-2006
8 Transformer Spreadsheet
ACDC_TinySwitch-III INPUT _011906; Rev.0.27; Copyright Power Integrations 2006 ENTER APPLICATION VARIABLES VACMIN 85 VACMAX 265 fL 50 VO 12.00 IO 1.00 Power n Z INFO OUTPUT UNIT ACDC_TinySwitch-III_011906_Rev0-27.xls; TinySwitch-III Continuous/Discontinuous Flyback Transformer Design Spreadsheet
0.71 0.50
tC CIN
3.00 28.80
EP91 - 12 V, 1 A, Universal Input Minimum AC Input Voltage Maximum AC Input Voltage AC Mains Frequency Output Voltage (at continuous power) Power Supply Output Current (corresponding to peak power) 12 Watts Continuous Output Power Efficiency Estimate at output terminals. Unter 0.7 if no better data available Z Factor. Ratio of secondary side losses to the total losses in the power supply. Use 0.5 if no better data available mSeconds Bridge Rectifier Conduction Time Estimate 28.8 uFarads Input Capacitance Volts Volts Hertz Volts Amps
ENTER TinySwitch-III VARIABLES TinySwitch-III TNY278 Chosen Device STD Chose Configuration
TNY278 TNY278 Standard Current Limit
User defined TinySwitch-III Enter "RED" for reduced current limit (sealed adapters), "STD" for standard current limt or "INC" for increased current limit (peak or higher power applications) Minimum Current Limit Maximum Current Limit Minimum Device Switching Frequency I^2f (product of current limit squared and frequency is trimmed for tighter tolerance) Reflected Output Voltage (VOR < 135 V Recommended) TinySwitch-III on-state Drain to Source Voltage Output Winding Diode Forward Voltage Drop Ripple to Peak Current Ratio (KP < 6) Transient Ripple to Peak Current Ratio. Ensure KP_TRANSIENT > 0.25
ILIMITMIN ILIMITTYP ILIMITMAX fSmin I^2fmin VOR VDS VD KP KP_TRANSIENT 101.00
0.512 0.550 0.588 124000 35.937
Amps Amps Amps Hertz A^2kHz
101 Volts 10 Volts 0.7 Volts 0.60 0.38
ENTER BIAS WINDING VARIABLES VB NB VZOV UVLO VARIABLES V_UV_TARGET V_UV_ACTUAL RUV_IDEAL RUV_ACTUAL
22.00 Volts 12.13 28.00 Volts
Bias Winding Voltage Bias Winding Number of Turns Over Voltage Protection zener diode.
92
92.00 Volts 92.20 Volts 3.59 Mohms 3.60 Mohms
Target under-voltage threshold, above which the power supply with start Typical start-up voltage based on standard value of RUV_ACTUAL Calculated value for UV Lockout resistor Closest standard value of resistor to RUV_IDEAL
ENTER TRANSFORMER CORE/CONSTRUCTION VARIABLES Core Type EE25 EE25 Core EE25 Bobbin EE25_BOBBIN AE 0.404 LE 7.34 AL 1420 Power Integrations Tel: +1 408 414 9200 Fax: +1 408 414 9201 www.powerint.com
P/N: P/N: cm^2 cm nH/T^2
User-Selected transformer core PC40EE25-Z EE25_BOBBIN Core Effective Cross Sectional Area Core Effective Path Length Ungapped Core Effective Inductance
Page 16 of 36
7-Feb-2006
BW M L NS 10.2 mm 1 mm 2 7
EP-91 12 V, 1 A, Universal Input Supply
Bobbin Physical Winding Width Safety Margin Width (Half the Primary to Secondary Creepage Distance) Number of Primary Layers Number of Secondary Turns
1.00 2.00 7 DC INPUT VOLTAGE PARAMETERS
VMIN VMAX CURRENT WAVEFORM SHAPE PARAMETERS DMAX IAVG IP IR IRMS TRANSFORMER PRIMARY DESIGN PARAMETERS LP LP_TOLERANCE NP ALG BM BAC ur LG BWE OD INS DIA AWG CM CMA 10.00
79 Volts 375 Volts
Minimum DC Input Voltage Maximum DC Input Voltage
0.59 0.24 0.5120 0.3075 0.33 Amps Amps Amps Amps
Duty Ratio at full load, minimum primary inductance and minimum input voltage Average Primary Current Minimum Peak Primary Current Primary Ripple Current Primary RMS Current
1050 uHenries 10 56 339 2745 824 2053 0.11 16.4 0.295 0.05 0.243 31 81 247
Typical Primary Inductance. +/- 10% to ensure a minimum primary inductance of 954 uH % Primary inductance tolerance Primary Winding Number of Turns nH/T^2 Gapped Core Effective Inductance Gauss Maximum Operating Flux Density, BM<3000 is recommended Gauss AC Flux Density for Core Loss Curves (0.5 X Peak to Peak) Relative Permeability of Ungapped Core mm Gap Length (Lg > 0.1 mm) mm Effective Bobbin Width mm Maximum Primary Wire Diameter including insulation mm Estimated Total Insulation Thickness (= 2 * film thickness) mm Bare conductor diameter AWG Primary Wire Gauge (Rounded to next smaller standard AWG value) Cmils Bare conductor effective area in circular mils Cmils/Amp Primary Winding Current Capacity (200 < CMA < 500)
TRANSFORMER SECONDARY DESIGN PARAMETERS Lumped parameters ISP ISRMS IRIPPLE CMS AWGS
4.07 2.15 1.90 430 23
Amps Amps Amps Cmils AWG
Peak Secondary Current Secondary RMS Current Output Capacitor RMS Ripple Current Secondary Bare Conductor minimum circular mils Secondary Wire Gauge (Rounded up to next larger standard AWG value)
VOLTAGE STRESS PARAMETERS VDRAIN
607 Volts
PIVS
59 Volts
Maximum Drain Voltage Estimate (Assumes 20% zener clamp tolerance and an additional 10% temperature tolerance) Output Rectifier Maximum Peak Inverse Voltage
Page 17 of 36
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EP-91 12 V, 1 A, Universal Input Supply
7-Feb-2006
9 Performance Data
The ON/OFF control scheme employed by TinySwitch-III yields virtually constant efficiency across the 25% to 100% load range required for compliance with EPA, CEC, CECP and AGO energy efficiency standards for external power supplies (EPS). Even at loads below 10% of the supply's full rated output power, efficiency remains above 65%, providing excellent standby performance for applications that require it. This performance is automatic with ON/OFF control. There are no special burst modes that require the designer to consider specific thresholds within the load range in order to achieve compliance with global energy efficiency standards. All measurements performed at room temperature, 60 Hz input frequency. 9.1 Efficiency
90% 85% 80%
Efficiency (%)
75%
CEC/ENERGY STAR EPS Requirement
70%
85 VAC
65% 60% 55% 50% 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
115 VAC 230 VAC 265 VAC
Output Current (A)
Figure 6 - Efficiency vs. Output Current, Room Temperature, 60 Hz.
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7-Feb-2006
EP-91 12 V, 1 A, Universal Input Supply
9.2 Active Mode CEC Measurement Data In the state of California, after July 1, 2006, all single-output EPS adapters - including those sold with the products they power - must meet the California Energy Commission (CEC) requirement for minimum active-mode efficiency and no-load input power consumption. Minimum active-mode efficiency is defined as the average efficiency at 25, 50, 75 and 100% of rated output power printed on the nameplate of the supply:
Nameplate Output (PO) <1W 1 W to 49 W > 49 W Minimum Efficiency in Active Mode of Operation 0.49 x PO 0.09 x ln (PO) + 0.49 [ln = natural log] 0.84 W
For adapters that are single input voltage only, the measurements are to be made at the nominal rated input voltage (115 VAC or 230 VAC). For universal input adapters, the measurements are to be made at both nominal input voltages (115 VAC and 230 VAC). To comply with the standard, the average of the four efficiency measurements must be greater than or equal to the efficiency specified by the standard.
Percent of Full Load 25 50 75 100 Average Required CEC minimum average efficiency (%) Efficiency (%) 115 VAC 75 78.5 78.8 78 77.6 230 VAC 74.5 78.8 78.5 79.1 77.7
71.3
From these results it is apparent that the efficiency of this design easily exceeds the required 71.3 %. More states within the USA, and many other countries around the world are adopting similar energy efficiency standards (based on the original Energy Star standard). For the latest, up-to-date information on energy efficiency regulations, please visit the PI Green Room, at: http://www.powerint.com/greenroom/regulations.htm
Page 19 of 36
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EP-91 12 V, 1 A, Universal Input Supply
7-Feb-2006
9.3
No-load Input Power (R8 not installed: no bias winding supplementation)
0.14
0.12
Input Power (Watts)
0.1
0.08
0.06
0.04
0.02
0 85 105 125 145 165 185 205 225 245 265
Input VAC
Figure 7 - No-load Input Power vs. Input Line Voltage, Room Temperature, 60 Hz.
9.4
No-load Input Power (with R8 and bias winding supplementation)
0.045 0.04 0.035
Input Power (Watts)
0.03 0.025 0.02 0.015 0.01 0.005 0 85 105 125 145 165 185 205 225 245 265
Input Voltage (VAC)
Figure 8 - No-load Input Power vs. Input Line Voltage, Room Temperature, 60 Hz, with Bias Winding.
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7-Feb-2006
EP-91 12 V, 1 A, Universal Input Supply
9.5 Available Standby Output Power The chart below shows the available output power versus line voltage at input power consumption levels of 1, 2 and 3 watts (respectively). Again, this performance illustrates the value of ON/OFF control, as it automatically maintains a high efficiency, even during very light loading. This simplifies complying with standby requirements that specify that a fair amount of power be available to the load at low input power consumption levels. The TinySwitch-III ON/OFF control scheme maximizes the amount of output power available to the load in standby operation when the allowable input power is fixed at a low value. This simplifies the design of products such as printers, set-top boxes, DVD players, etc. that must meet stringent standby power consumption requirements.
3
Pin=1 W Pin=2 W
2.5
2.2 W for 3 W input at 230 VAC
Pin=3 W
Output Power (W)
2
1.4 W for 2 W input at 230 VAC
1.5
1
0.65 W for 1 W input at 230 VAC
0.5
0 85 105 125 145 165 185 205 225 245 265 285
Input Voltage (VAC)
Figure 9 - Available Output Power for 1, 2 and 3 Watts of Input Power.
Page 21 of 36
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EP-91 12 V, 1 A, Universal Input Supply 9.6 Regulation
7-Feb-2006
9.6.1 Load and Line
13 12.8 12.6
85 VAC 115 VAC 230 VAC 265 VAC
Output Voltage (V)
12.4 12.2 12 11.8 11.6 11.4 11.2 11 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8
0.9
1
Output Current (A)
Figure 10 - Load and Line Regulation, Room Temperature.
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Page 22 of 36
7-Feb-2006
EP-91 12 V, 1 A, Universal Input Supply
10 Thermal Performance
Temperature measurements of key components were taken using T-type thermocouples. The thermocouples were soldered directly to a SOURCE pin of the TNY278P device and to the cathode of the output rectifier. The thermocouples were glued to the output capacitor and to the external core and winding surfaces of transformer T1. The unit was sealed inside a large box to eliminate any air currents. The box was placed inside a thermal chamber. The ambient temperature within the large box was raised to 50 C. The unit was then operated at full load and the temperature measurements were taken after they stabilized for 1 hour at 50 C.
Temperature (C) Item Ambient TNY278P (U1) Transformer (T1) Output Rectifier (D7) Output Capacitor (C10) 85 VAC 50
*
265 VAC 50
*
96.1 77.8 101 68.2
92.8 80 100 66.8
*To simulate operation inside sealed enclosure at 40 C external ambient.
These results show that all key components have an acceptable rise in temperature.
85 VAC, 12 W Load, 22 C Ambient
Figure 11 - Infrared Thermograph of Open Frame Operation, at Room Temperature.
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EP-91 12 V, 1 A, Universal Input Supply
7-Feb-2006
11 Waveforms
11.1 Drain Voltage and Current, Normal Operation
Figure 12 - 115 VAC, Full Load. Upper: IDRAIN, 0.1 A / div. Lower: VDRAIN, 50 V, 500 ns / div.
Figure 13 - 230 VAC, Full Load. Upper: IDRAIN, 0.1 A / div. Lower: VDRAIN, 100 V / div.
Figure 14 - 115 VAC, Full Load. VDRAIN, 50 V, 20 s / div.
Figure 15 - 230 VAC, Full Load. VDRAIN, 100 V, 20 s / div.
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7-Feb-2006
EP-91 12 V, 1 A, Universal Input Supply
11.2 Output Voltage Start-Up Profile Start-up into full resistive load and no-load were both verified. A 12 resistor was used for the load, to maintain 1 A under steady-state conditions.
Figure 16 - Start-Up Profile, 115 VAC. Fast trace is no-load rise time Slower trace is maximum load (12 ) 2 V, 5 ms / div.
Figure 17 - Start-Up Profile, 230 VAC. Fast trace is no-load rise time Slower trace is maximum load (12 ) 2 V, 5 ms / div.
11.3 Drain Voltage and Current Start-Up Profile
Figure 18 - 90 VAC Input and Maximum Load. Upper: VDRAIN, 100 V & 100 s / div. Lower: IDRAIN, 0.5 A / div.
Figure 19 - 265 VAC Input and Maximum Load. Upper: VDRAIN, 200 V & 100 s / div. Lower: IDRAIN, 0.5 A / div.
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EP-91 12 V, 1 A, Universal Input Supply
7-Feb-2006
11.4 Load Transient Response (75% to 100% Load Step)
Figure 20 - Transient Response, 115 VAC, 50-100-50% Load Step. Upper: VOUT 50 mV/div. Lower: IOUT 0.5 A, 1 ms / div.
Figure 21 - Transient Response, 230 VAC, 50-100-50% Load Step. Upper: VOUT 50 mV/div. Lower: IOUT 0.5 A, 1 ms / div.
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7-Feb-2006
EP-91 12 V, 1 A, Universal Input Supply
11.5 Output Ripple Measurements 11.5.1 Ripple Measurement Technique A modified oscilloscope test probe was used to take output ripple measurements, in order to reduce the pickup of spurious signals. Using the probe adapter pictured in Figure 22, the output ripple was measured with a 1 F electrolytic, and a 0.1 F ceramic capacitor connected as shown.
Probe Ground
Probe Tip
Figure 22 - Oscilloscope Probe Prepared for Ripple Measurement (End Cap and Ground Lead Removed).
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EP-91 12 V, 1 A, Universal Input Supply
7-Feb-2006
11.5.2 Measurement Results
Figure 23 - Ripple, 85 VAC, Full Load. 20 s, 50 mV / div.
Figure 24 - Ripple, 115 VAC, Full Load. 20 s, 50 mV / div.
11.6 Overvoltage Shutdown
Figure 25 - Overvoltage Shutdown. 265 VAC, No Load. 50 ms, 5 V / div.
Figure 26 - Overvoltage Shutdown. 265 VAC, Full Load. 50 ms, 5 V / div.
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7-Feb-2006
EP-91 12 V, 1 A, Universal Input Supply
12 Line Surge
Differential input line surge (1.2/50 s) testing was completed on a single test unit to IEC61000-4-5. Input voltage was set at 230 VAC / 60 Hz. Output was loaded at full load and operation was verified following each surge event.
Surge Voltage 1 kV Differential 2 kV Common Mode Phase Angle 90 90 Generator Impedance 2 12 Number of Strikes 10 10 Test Result PASS PASS
Unit passed under all test conditions.
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EP-91 12 V, 1 A, Universal Input Supply
7-Feb-2006
13 Conducted EMI
Conducted emissions tests were performed at 115 VAC and 230 VAC at full load (12 V, 1 A). Measurements were taken with an Artificial Hand connected and a floating DC output load resistor. A DC output cable was included. Composite EN55022B / CISPR22B conducted limits are shown. In all cases there was excellent (>10 dB) margin. 13.1 115 VAC, Full Load
Line Neutral
Artificial Hand Connected to Output Return
Artificial Hand Connected to Output Return
Output Floating Figure 27
Output Floating
- Conducted EMI at 115 VAC.
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7-Feb-2006
EP-91 12 V, 1 A, Universal Input Supply
13.2 230 VAC, Full Load
Line Neutral
Artificial Hand Connected to Output Return
Artificial Hand Connected to Output Return
Output Floating Figure 28
Output Floating
- Conducted EMI at 230 VAC.
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EP-91 12 V, 1 A, Universal Input Supply
7-Feb-2006
14 Audible Noise
An open-frame (no enclosure) unit was tested with an Audio Precision Analyzer, using a microphone positioned one inch from the core of transformer T1. The test was done with the unit in an acoustically isolated and dampened chamber. The load was adjusted until a maximum reading was obtained. 35 dBrA is considered the acceptable limit for frequencies below 18 kHz. An enclosure will typically further reduce measurable acoustic noise levels by an additional 10 dBrA.
Audio Precision
+80 +70 +60 +50 +40 d B r A +10 +0 -10 -20 -30 0 +30 +20
08/17/05 15:04:17
Audio Precision
+80 +70 +60 +50 +40 d B r A +10 +0 -10 -20 -30 0 +30 +20
08/17/05 15:11:39
2k
4k
6k
8k
10k Hz
12k
14k
16k
18k
20k
22k
2k
4k
6k
8k
10k Hz
12k
14k
16k
18k
20k
22k
Color Green
Line Style Solid
Thick 1
Data Fft.Ch.1 Ampl
Axis Left Arts_audionoise1.at2
Color Green
Line Style Solid
Thick 1
Data Fft.Ch.1 Am pl
Axis Left Arts_audionoise1.at2
Figure 29 - Audible Noise VIN = 120 VAC; IOUT = 350 mA.
Audio
+80 +70 +60 +50 +40 d B r A +10 +0 -10 -20 -30 0 +30 +20
Figure 30 - Audible Noise VIN = 120 VAC; IOUT = 1 A.
Audio Precision
+80 +70 +60 +50 +40 d B r A +10 +0 -10 -20 -30 0 +30 +20
08/17/05
08/17/05 15:09:38
2k
4k
6k
8k
10k Hz
12k
14k
16k
18k
20k
22k
2k
4k
6k
8k
10k Hz
12k
14k
16k
18k
20k
22k
Color Green
Line Style Solid
Thick 1
Data Fft.Ch.1 Ampl
Axis Left Arts_audionoise1.at2
Color Green
Line Style Solid
Thick 1
Data Fft.Ch.1 Am pl
Axis Left Arts _audionoise1.at2
Figure 31 - Audible Noise VIN = 230 VAC; IOUT =1 A.
Figure 32 - Audible Noise VIN = 230 VAC; IOUT =1.2 A.
Note: Shaded area obscured due to ambient noise.
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7-Feb-2006
EP-91 12 V, 1 A, Universal Input Supply
15 Extended and Reduced Current Limit (ILIMIT) Operation
Additional capacitors (C8 and C9 on the BOM in Section 6) have been included in the DAK-91 kit for the convenience of trying out the ILIMIT+1 and ILIMIT-1 operation of TNY278 in the EP-91 reference board. When C7 (0.1 F) is replaced with a 10 F capacitor (C9), the TNY278 will operate in the ILIMIT+1 mode, which increases the maximum primary current limit from the standard maximum limit of 0.55 A to 0.65 A (equal to that of a TNY279). This allows a TNY278 to deliver from 15% to 25% more output power (depending on the output voltage and current). CAUTION: Because EP-91 was designed for standard ILIMIT operation, It should not be loaded with more than 1.25 A at an elevated temperature for very long (a few minutes) when verifying the performance of TNY278 in the ILIMIT+1 mode, since the other power components (transformer, input bulk capacitors, output diode, output capacitors and primary clamp network) are not sized for sustained operation at more than 12 W. When C7 is replaced with a 1 F capacitor (C8), the TNY278 will operate in the ILIMIT-1 mode, which reduces the maximum current limit from the standard maximum limit of 0.55 A to 0.45 A (equal to that of a TNY277). Although this reduces the maximum output power that the supply can deliver, it typically will increase the efficiency, especially at lower output power levels. To take the fullest advantage of the increase in efficiency that can be obtained from ILIMIT-1 operation, the power transformer would need to be redesigned slightly.
16 TNY277 and TNY279 Operation in EP-91
A TNY277 device used in the ILIMIT+1 mode (a 10 F installed in place of C7) will work in the EP-91 reference board, and deliver output power equal to that of a TNY278 device. This flexibility allows a design engineer the option of using a lower cost part in applications with less demanding thermal requirements. A TNY279 device used in the ILIMIT-1 mode (a 1 F installed in place of C7) will deliver the same output power as a TNY278 in the standard ILIMIT configuration. This can improve efficiency and lower the temperature rise of the device, which can give greater thermal margin to a design that must operate in high ambient temperature environments.
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EP-91 12 V, 1 A, Universal Input Supply
7-Feb-2006
17 OVP Operation Verification
While the EP-91 is in normal operation, monitor the output with a storage oscilloscope. To cause an overvoltage condition to occur, short circuit the optocoupler LED (as shown below) to open the feedback control loop. The oscilloscope will capture the output voltage rising until the increasing voltage across VR2 causes it to conduct, and the TNY278 device latches off. To reset the OVP latch, the AC input power must be removed long enough to allow the input bulk capacitors to fully discharge.
Short these points to test OVP functionality
Figure 33
- Point on PCB to Apply Short Circuit to Trigger OV Shutdown.
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7-Feb-2006
EP-91 12 V, 1 A, Universal Input Supply
18 Revision History
Date 25-Jan-06 07-Feb-06 Author JAJ JAJ Revision 1.0 1.1 Description & changes Formatted for Final Release Formatted and corrected measurement scales / div.
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EP-91 12 V, 1 A, Universal Input Supply
7-Feb-2006
For the latest updates, visit our website: www.powerint.com
Power Integrations reserves the right to make changes to its products at any time to improve reliability or manufacturability. Power Integrations does not assume any liability arising from the use of any device or circuit described herein. POWER INTEGRATIONS MAKES NO WARRANTY HEREIN AND SPECIFICALLY DISCLAIMS ALL WARRANTIES INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NON-INFRINGEMENT OF THIRD PARTY RIGHTS. PATENT INFORMATION The products and applications illustrated herein (including transformer construction and circuits external to the products) may be covered by one or more U.S. and foreign patents, or potentially by pending U.S. and foreign patent applications assigned to Power Integrations. A complete list of Power Integrations' patents may be found at www.powerint.com. Power Integrations grants its customers a license under certain patent rights as set forth at http://www.powerint.com/ip.htm. The PI Logo, TOPSwitch, TinySwitch, LinkSwitch, DPA-Switch, EcoSmart, Clampless, E-Shield, Filterfuse, PI Expert and PI FACTS are trademarks of Power Integrations, Inc. Other trademarks are property of their respective companies. (c)Copyright 2006 Power Integrations, Inc.
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