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| Future Communications Integrated circuit Inc. FC1703 Receiver RFIC for Dual-Band Triple Mode DESCRIPTION The FC1703 is designed primarily for use in a receiver front-end of the dual-band, triple-mode system, operating in the Advanced Mobile Phone System (AMPS), Cellular Code-Division Multiple-Access (CDMA), and PCS CDMA. The IC contains low-noise amplifiers (LNA), and mixers with a balanced IF outputs. The unit operates at 2.7V single power and is designed to use with RF SAW filter. It is possible to adjust current level, gain, and IIP3 by changing resistors. The IC is manufactured on a SiGe BiCMOS process, and is packaged in a leadless small package, named MLF-24 FEATURES l Complete Receiver Front-end of the dual-band Cellular/PCS Mobile-phone System, (AMPS and CDMA) l Integrated LNA, and Down-converting mixers l Triple-mode of LNA l Low Single voltage operation (2.7V) l High Linearity l Low power consumption l Adjustable IIP3, Gain and Current l 4mm x 4mm Small leadless package PMIX_IN PIN CONFIGURATION SEL3 AMPS-mode Cellular mobile phone. CDMA-mode Cellular mobile phone. Japan CDMA-mode Cellular mobile phone. CDMA-mode US -PCS mobile phone. CDMA-mode Korean-PCS mobile phone. Cellular CDMA/AMPS/US -PCS Dual-band Triple-mode mobile phone. Japan-CDMA/Korea-PCS Dual-band mobile phone General Purpose Down-Converter. 1 PLNA_IN RLNA 2 SEL1 3 RCMIX 4 CLNA_GND 5 CLNA_IN 6 CLNA_OUT 7 8 /2 CMIX_GND CMIX_IN SEL2 VDD PLNA_OUT APPLICATIONS 24 23 22 21 20 19 18 FM_IF 17 FM_IFB 16 BufferEn 15 CDMA_IF 14 CDMA_IFB 13 LO_OUT For latest specifications, technical questions and additional product information, visit our website or e-mail us. Web: http://www.fci.co.kr FCI Inc. E-mail : info@fci.co.kr 2nd Fl. Korea First Bank B/D, 6-8 Sunae - Dong Pundang- Gu, Sungnam City, Kyunggi-do, Tel : 82-31-711-6444 463-020, KOREA Fax: 82-31- 714-6576 1 / 17 Last Update 03/28/03 LO_IN LO/2 9 10 VDD_LO 11 12 RPMIX Future Communications Integrated circuit Inc. FC1703 Receiver RFIC for Dual-Band Triple Mode PIN DESCRIPTIONS Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 Function PLNA_IN RLNA SEL1 RCMIX CLNA_GND CLNA_IN CLNA_OUT LO/2 CMIX_GND CMIX_IN VDD_LO LO_IN LO_OUT CDMA_IFB CDMA_IF BufferEn FM_IFB FM_IF RPMIX SEL2 PMIX_IN VDD SEL3 PLNA_OUT Description High-Band RF Input. Requires a blocking capacitor which may be used as part of the input matching network LNA Bias-Setting Resistor Connection Control Pin. See Truth Table for Mode Select Pin. Cellular Mixer Bias-Setting Resistor Connection Ground Reference for Cellular LNA. This pin should be connected to GND through 0 ohm. Low -Band RF Input. Requires a blocking capacitor which may be used as part of the input matching network Low -Band LNA Output Port. Connect a pull-up inductor to Vcc and an external series blocking capacitor which may be used as a part of the output matching network LO Divider-Select Input. LOW disables LO divider, HIGH selects divider in cellular and FM modes. See Truth Table for Mode Select Pin. Ground Reference for Cellular Mixer. This pin should be connected to GND through 0 ohm. Low -Band Mixer Input. Requires a blocking capacitor which may be used as part of the input matching network. Power Supply Pin for LO. LO Input Port. Requires an external DC blocking capacitor. LO Buffer Output Port. Mixer IFB Output. Mixer IF Output. Pin14 and 15 are matched at 50 ohm in EV Board. But they can be matched at differential 1000ohm. LO Output Buffer Enable. Drive BufferEn HIGH to power up the LO output buffer associated with the selected band. See Truth Table for Mode Select Pin. FM IFB Output FM IF Output . Pin17 and 18 are matched at 50 ohm in EV Board. But they can be matched at single-ended 850ohm PCS Mixer Bias Setting Resistor Connection Control Pin. See Truth Table for Mode Select Pin. High-Band Mixer Input. Requires a blocking capacitor which may be used as part of the input matching network. Power Supply Pin. Control Pin. See Truth Table for Mode Select Pin. High-Band LNA Output Port. Connect a pull-up inductor to Vcc and an external series blocking capacitor which may be used as a part of the output matching network Note 2 / 17 Last Update 03/28/03 Future Communications Integrated circuit Inc. FC1703 Receiver RFIC for Dual-Band Triple Mode APPLICATIONS 1. Cellular CDMA/AMPS & US-PCS ABSOLUTE MAXIMUM RATINGS Parameter Supply Voltage Digital Input Voltage to GND Input Power Level Storage Temperature Operating Temperature Junction Temperature Lead Temperature(Soldering, 10sec) Unit V V dBm E E E E Rating -0.5~ 3.6 -0.3 ~ Vcc+0.3 +6 -40 ~ +150 -40 ~ +85 +150 +240 Note DC ELECTRICAL CHARACTERISTICS (Vcc = 2.6 to 3.1V, T = -40 to +80E, Typical values are at T = +25E and Vcc = 2.7V) Parameter Supply Voltage Unit V mA mA mA uA mA mA Specification Min Typ 2.7 27 27 20 <50 7 2 9 3 BufferEn = High Cellular and FM mode; LO/2=High 34 34 24 Max Note Cellular CDMA Mode FM Mode US-PCS CDMA Mode Shutdown Mode LO Buffer Supply Current Additional Operational Current Divider Active AC ELECTRICAL CHARACTERISTICS Specification Parameter OVERALL CONDITION Low-Band RF Frequency Range High-Band RF Frequency Range Low-Band LO Frequency Range High-Band LO Frequency Range IF Frequency Range LO Input Level Unit Min Typ Max Note MHz MHz MHz MHz MHz dBm 869 1930 950 1750 80 -15 -5 894 1990 1100 2210 220 3 / 17 Last Update 03/28/03 Future Communications Integrated circuit Inc. FC1703 Receiver RFIC for Dual-Band Triple Mode Specification Parameter Unit Typ Max Note CELLULAR LNA PERFORMANCE HIGH-GAIN MODE Gain Noise Figure IIP3 MID-GAIN MODE Gain Noise Figure IIP3 BYPASS MODE Gain Noise Figure IIP3 US-PCS LNA PERFORMANCE HIGH-GAIN MODE Gain Noise Figure IIP3 BYPASS MODE Gain Noise Figure IIP3 CELLULAR MIXER PERFORMANCE CDMA MODE Gain Noise Figure IIP3 dB dB dBm 5 11 13 7 8 9 dB dB dBm 18.5 -3.5 -3 4 20 6 dB dB dBm 6.5 15.5 16.5 1.8 8 2.2 dB dB dBm dB dB dBm dBm dB dBm 18.5 8.5 -3 8 4 14.5 15.5 1.5 9.5 5 4 10 -2 3 20 3.5 4.5 2.0 FM MODE Gain Noise Figure IIP3 US-PCS MIXER PERFORMANCE Gain Noise Figure IIP3 ALL MODES BufferEn = HIGH PLO = -5dBm *note : Gain, IIP3, NF and Current are adjustable by changing resistor R1,R2 and R8 LO Output Level dBm -7 -6 dB dB dBm 5 11 13 7 8 9 dB dB dBm 9.5 3 11 6 5 8 4 / 17 Last Update 03/28/03 US-PCS Rx 1930 to 1990 MHz 242322212019 183.6MHz AMPS IF IADC US-PCS Duplexer FC1703 /2 7 8 9 10 1112 Cellular Rx 869 to 894 MHz LO Input from PLL 2104 to 2173MHz 263MHz US-PCS IF 0 90 228MHz CDMA/AMPS IF LO to 1077MHz for Cellular 1052Output from FC1703 2113 to 2173MHz for US-PCS Future Communications Integrated circuit Inc. SYSTEM BLOCK CONFIGURATION demodulator FMIADC QADC FMQADC Cellular Duplexer Diplexer 1 2 3 4 5 6 18 Rx I 17 0 90 16 183.6MHz US-PCS/CDMA IF Rx Q 15 14 13 Tx Q FC1703 Receiver RFIC for Dual-Band Triple Mode Last Update 03/28/03 Cellular Tx 824 to 849MHz QDAC modulator Tx I IDAC 5 / 17 US-PCS Tx 1850 to 1910MHz Future Communications Integrated circuit Inc. FC1703 Receiver RFIC for Dual-Band Triple Mode TYPICAL APPLICATION SCHEMATIC (Cellular CDMA/AMPS & US-PCS) J9 PMIX_IN *0.15dB Line Loss* C20 2.7pF L10 3.9nH SEL3 L11 4.7nH SEL2 L7 27nH C19 100nF C14 3pF VCC R7 3k ohm C15 9pF L8 27nH C17 10nF L9 56nH J8 FM_IF *0.05dB Line Loss* VCC C18 1.8pF VCC J10 PLNA_OUT *0.15dB Line Loss* C21 10nF C13 3pF C16 10nF R8 20k ohm(1%) 24 23 22 21 20 19 SEL3 BufferEN PMIX_IN VDD SEL2 RPMIX PLNA_OUT J1 PLNA_IN *0.15dB Line Loss* L1 6.8nH SEL1 C1 10nF R1 30k ohm(1%) 1 PLNA_IN 18 FM_IF 2 RLNA FM_IFB 17 16 SEL1 3 4 RCMIX C9 3pF FC1703 CLNA_OUT CMIX_GND CMIX_IN BufferEn L6 27nH C12 10nF TX1 J7 CDMA_IF *0.05dB Line Loss* *1.5dB Transformer Loss* 15 CDMA_IF 5 CLNA_GND CDMA_IFB 14 13 CLNA_IN LO_OUT VDD_LO R6 3k ohm C10 8pF VCC L5 27nH R2 10k ohm(1%) 6 11 0 ohm J2 CLNA_IN *0.1dB Line Loss* C2 10nF L2 3.9nH R4 0 ohm C7 10nF 10 12 7 8 9 R3 LO_IN LO/2 C8 3pF C11 10nF N1:N2=16:1 J6 LO_OUT *0.2dB Line Loss for Cellular* *0.3dB Line Loss for PCS* VCC J3 CLNA_OUT *0.15dB Line Loss* C3 3.3pF L3 8.2nH LO/2 C6 10nF J5 LO_IN R5 100 ohm *0.2dB Line Loss for Cellular* *0.3dB Line Loss for PCS* VCC *R3 & R4 is necessary component. (The distances between FC1703 and R3 and FC1703 and R4 are as short as possible.) **CDMA_IF and AMPS_IF tuned to 180MHz 1 23 4 56 J4 CMIX_IN C4 100nF L4 12nH C5 1.8pF *0.2dB Line Loss* VCC 2.7V S1 LO/2 BUF NC S3 S2 C 100pF C 100nF NOTE: RF and IF matching component values are dependent on board layout, RF and IF SAW filter and the IF frequency selected. Please contact FCI application engineering for assistance. - Measurement Condition VDD : 2.7V Low-Band LNA RF Frequency : 869 ~ 894 MHz (Center : 880 MHz) RF input Power : -30 ~ -25 dBm Low-Band Mixer RF Frequency : 869 ~ 894 MHz (Center : 880 MHz) RF input Power : -30 ~ -25 dBm Low-Band Mixer LO Frequency : 2098 ~ 2148 MHz (Center : 2120 MHz) LO input Power : -5 dBm High-Band LNA RF Frequency : 1930 ~ 1990 MHz (Center : 1960 MHz) RF input Power : -30 ~ -25 dBm High-Band Mixer RF Frequency :1930 ~ 1990 MHz (Center : 1960 MHz) RF input Power : -30 ~ -25 dBm High-Band Mixer LO Frequency :2110 ~ 2170 MHz (Center : 2140 MHz) LO input Power : -5 dBm Mixer IF Frequency : 180 MHz 6 / 17 Last Update 03/28/03 Future Communications Integrated circuit Inc. FC1703 Receiver RFIC for Dual-Band Triple Mode 2. J-CDMA & K-PCS ABSOLUTE MAXIMUM RATINGS Parameter Supply Voltage Digital Input Voltage to GND Input Power Level Storage Temperature Operating Temperature Junction Temperature Lead Temperature(Soldering, 10sec) Unit V V dBm E E E E Rating -0.5~ 3.6 -0.3 ~ Vcc+0.3 +6 -40 ~ +150 -40 ~ +85 +150 +240 Note DC ELECTRICAL CHARACTERISTICS (Vcc = 2.6 to 3.1V, T = -40 to +80E, Typical values are at T = +25E and Vcc = 2.7V) Specification Parameter Unit Min Typ Max Supply Voltage V mA mA uA mA mA 2.7 27 20 <50 7 2 9 3 BufferEn = High J-CDMA mode; LO/2=High 34 24 Note J-CDMA Mode K-PCS CDMA Mode Shutdown Mode LO Buffer Supply Current Additional Operational Current Divider Active AC ELECTRICAL CHARACTERISTICS Specification Parameter OVERALL CONDITION J-CDMA RF Frequency Range K-PCS RF Frequency Range LO Frequency Range IF Frequency Range LO Input Level Unit Min Typ Max Note MHz MHz MHz MHz dBm 831 1840 2000 183.6 -15 -5 871 1870 2110 7 / 17 Last Update 03/28/03 Future Communications Integrated circuit Inc. FC1703 Receiver RFIC for Dual-Band Triple Mode Specification Parameter Unit Min J-CDMA LNA PERFORMANCE HIGH-GAIN MODE Gain Noise Figure IIP3 MID-GAIN MODE Gain Noise Figure IIP3 BYPASS MODE Gain Noise Figure IIP3 K-PCS LNA PERFORMANCE HIGH-GAIN MODE Gain Noise Figure IIP3 BYPASS MODE Gain Noise Figure IIP3 J-CDMA MIXER PERFORMANCE Gain Noise Figure IIP3 K-PCS MIXER PERFORMANCE Gain Noise Figure IIP3 ALL MODES BufferEn = HIGH PLO = -5dBm *note : Gain, IIP3, NF and Current are adjustable by changing resistor R1,R2 and R8 LO Output Level dBm -7 -6 dB dB dBm 18.5 -3.5 -3 4 20 6 dB dB dBm 6.5 15.5 16.5 1.8 8 2.2 *note *note *note dB dB dBm dB dB dBm dBm dB dBm 18.5 8.5 -3 8 4 14.5 15.5 1.5 9.5 5 4 10 -2 3 20 3.5 4.5 2.0 *note *note *note Typ Max Note dB dB dBm 11 5 13 7 8 9 *note *note *note dB dB dBm 9 3 10.5 6 5 8 *note *note *note 8 / 17 Last Update 03/28/03 K-PCS Rx 1840 to 1870 MHz 242322212019 IADC K-PCS Duplexer FC1703 /2 7 8 9 10 1112 Future Communications Integrated circuit Inc. SYSTEM BLOCK CONFIGURATION demodulator FMIADC QADC FMQADC J-CDMA Duplexer Diplexer 1 2 3 4 5 6 18 183.6MHz Rx I 17J-CDMA/K-PCS IF 0 90 16 Rx Q 15 14 13 Tx Q FC1703 Receiver RFIC for Dual-Band Triple Mode Last Update 03/28/03 J-CDMA Tx 886.85 to 925.35 MHz 128.6 MHz J-CDMA IF QDAC modulator Tx I 0 90 IDAC 9 / 17 LO Output from FC1704 J-CDMA to 1053.95MHz for J-CDMA Rx MHz 1015.45 to 2053.6 MHz for K-PCS 2023.6 831.85 to 870.35 LO to 2107.9 MHz 2030.9 Input from PLLfor J-CDMA 2023.6 to 2053.6 MHz for K-PCS 273.6 MHz K-PCS IF K-PCS Tx 1750 to 1780 MHz Future Communications Integrated circuit Inc. FC1703 Receiver RFIC for Dual-Band Triple Mode TYPICAL APPLICATION SCHEMATIC J8 PMIX_IN *0.15dB Line Loss* L7 2.7nH C14 4pF C13 100nF (J-CDMA & K-PCS) VCC SEL3 SEL2 L8 4.7nH C15 10nF VCC J9 PLNA_OUT *0.15dB Line Loss* R7 20k ohm(1%) 24 23 22 21 20 19 PMIX_IN PLNA_OUT RPMIX SEL3 SEL2 VDD BufferEN 18 FM_IF NC J1 PLNA_IN *0.15dB Line Loss* L1 6.8nH SEL1 C1 10nF R1 30k ohm(1%) 1 PLNA_IN 2 RLNA FM_IFB 17 NC C9 3pF L6 27nH C12 10nF TX1 3 SEL1 16 4 RCMIX FC1703 CLNA_OUT CMIX_GND CMIX_IN BufferEn J7 IF *0.05dB Line Loss* *1.5dB Transformer Loss* 15 CDMA_IF R6 14 3k ohm 5 CLNA_GND CDMA_IFB C10 9pF VCC L5 27nH R2 9.1k ohm(1%) 6 CLNA_IN LO_OUT VDD_LO LO_IN 13 LO/2 10 11 0 ohm J2 CLNA_IN *0.1dB Line Loss* C2 10nF 12 7 8 9 R3 C7 3pF C11 10nF N1:N2=16:1 L2 5.6nH R4 0 ohm J6 LO_OUT C6 10nF *0.2dB Line Loss for Cellular* *0.3dB Line Loss for PCS* VCC J3 CLNA_OUT *0.15dB Line Loss* C3 3.3pF LO/2 R5 L3 6.8nH 100 ohm J5 LO_IN *0.2dB Line Loss for Cellular* *0.25dB Line Loss for PCS* VCC *R3 & R4 is necessary component. (The distances between FC1703 and R3 and FC1704 and R4 are as short as possible.) **IF tuned 180MHz 1 23 4 56 C4 100nF L4 12nH C5 1.8pF J4 CMIX_IN *0.2dB Line Loss* VCC NC S3 S2 S1 LO/2 BUF 2.7V C 100pF C 100nF NOTE: RF and IF matching component values are dependent on board layout, RF and IF SAW filter and the IF frequency selected. Please contact FCI application engineering for assistance. - Measurement Condition VDD : 2.7V Low-Band LNA RF Frequency : 869 ~ 894 MHz (Center : 880 MHz) RF input Power : -30 ~ -25 dBm Low-Band Mixer RF Frequency : 869 ~ 894 MHz (Center : 880 MHz) RF input Power : -30 ~ -25 dBm Low-Band Mixer LO Frequency : 2098 ~ 2148 MHz (Center : 2120 MHz) LO input Power : -5 dBm High-Band LNA RF Frequency : 1930 ~ 1990 MHz (Center : 1960 MHz) RF input Power : -30 ~ -25 dBm High-Band Mixer RF Frequency :1930 ~ 1990 MHz (Center : 1960 MHz) RF input Power : -30 ~ -25 dBm High-Band Mixer LO Frequency :2110 ~ 2170 MHz (Center : 2140 MHz) LO input Power : -5 dBm Mixer IF Frequency : 180 MHz 10 / 17 Last Update 03/28/03 Future Communications Integrated circuit Inc. FC1703 Receiver RFIC for Dual-Band Triple Mode TRUTH TABLE FOR MODE SELECT PIN 1. Mode Selection & Gain Control MODE Cellular CDMA with High-Gain LNA Cellular CDMA with Mid-Gain LNA Cellular CDMA with bypass LNA Cellular FM PCS CDMA with High-Gain LNA PCS CDMA with bypass LNA Power Down SEL1 0 0 0 0 1 1 1 SEL2 0 0 1 1 0 1 1 SEL3 0 1 0 1 0 0 1 2. LO Divider Control Band Cellular AMPS / CDMA Mode LO (Use 1GHz band) LO/2 (User 2.1GHz band) LO/2 0 1 3. LO Output Buffer Control Band Cellular AMPS / CDMA PCS Mode LO Output Buffer for Tx OFF LO Output Buffer for Tx ON LO Output Buffer for Tx OFF LO Output Buffer for Tx ON BufferEN 0 1 0 1 11 / 17 Last Update 03/28/03 Future Communications Integrated circuit Inc. FC1703 Receiver RFIC for Dual-Band Triple Mode EVALUATION BOARD INFORMATIONS Board Size 6cm x 6cm, Board Thickness 0.8mm, Board Material FR-4, Multi-Layer Assembly Top Back 12 / 17 Last Update 03/28/03 Future Communications Integrated circuit Inc. FC1703 Receiver RFIC for Dual-Band Triple Mode PACKAGE INFORMATION 4.00 2.00 3.75 0.50 DIA 1.875 Line 1 2 Device Marking Description FCI's Company Name 1703 = Product Name YMDX LOT Code Y = Year code M = Month code D = Day code X = Manufacture code Pin 1 Identifier 3.75 1703 1.875 YMDX 2.00 4.00 3 Top View 0.42 0.23 2.34 0.65 1.17 PIN1 ID 0.20 R 0.42 0.45 2.34 2.50 1.17 0.25 MIN 0.40 0.25 MIN 0.50 2.50 Bottom View . Side View 12AE 0.20 0.85 0.01 13 / 17 Last Update 03/28/03 Future Communications Integrated circuit Inc. FC1703 Receiver RFIC for Dual-Band Triple Mode RECOMMENDED BOARD LAND PATTERN DIMENSIONS Z Size 4.36 G 2.98 A 2.78 D 2.68 W 0.22 X 0.28 Y 0.69 All Dimensions in mm - The solder mask opening should be 120 to 150 microns larger than the pad size resulting in 60 to 75 micron clearance between the copper pad and solder mask. - Typically each pad on the PCB should have its own solder mask opening with a web of solder mask between two adjacent pads. - It should be noted that the inner e dge of the solder mask should be rounded, especially for corner leads to allow for enough solder mask web in the corner area. - It is recommended that an array of thermal vias should be incorporated at 1.0 to 1.2mm pitch with via diameter of 0.3 to 0.33mm. - The mask opening should be 100 microns smaller than the thermal land size on all four sides. The solder mask diameter should be 100 microns larger than the via diameter. 14 / 17 Last Update 03/28/03 Future Communications Integrated circuit Inc. FC1703 Receiver RFIC for Dual-Band Triple Mode TAPE / REEL FORMS AND DIMENSIONS 7" Reel Dimension ORDERING INFORMATION FC1203_BLK FC1203_TR1 FC1203_TR2 FC1203_EVB No of Device 10 1,500 2,500 1 Container Bulk (Anti-static bag) 7" tape and reel 13" tape and reel Anti-static bag 15 / 17 Last Update 03/28/03 Future Communications Integrated circuit Inc. FC1703 Receiver RFIC for Dual-Band Triple Mode RECOMMENDED CONDITION FOR REFLOW SOLDERING Figure 1 shows the typical process flow for mounting surface mount packages to printed circuit boards. The same process can be used for mounting the MLFs without any modifications. It is important to include post print and post reflow inspection, especially during process development. The volume of paste printed should be measured either by 2D or 3D techniques. The paste volume should be around 80 to 90% of stencil aperture volume to indicate good paste release. After reflow, the mounted package should be inspected in transmission xray for the presence of voids, solder balling, or other defects. Cross-sectioning may also be required to determine the fillet shape and size and joint standoff height. A typical reflow profile for No Clean solder paste is shown in Figure 2. Since the actual reflow profile depends on the solder paste being used and the board density, a specific profile is not recommended. However, the temperature should not exceed 240E and the time above liquidus temperature should be less than 75 seconds. The maximum temperature can be increased for Pb free solder if the package has been qualified for higher temperature moisture sensitivity level. The ramp rate during preheat should be 3E/second or lower. Figure 1. Typical PCB Mounting Process Flow. Figure 2. Typical Solder Reflow Profile (from Application Notes for Amkor' MLF Package) s 16 / 17 Last Update 03/28/03 Future Communications Integrated circuit Inc. FC1703 Receiver RFIC for Dual-Band Triple Mode REWORK GUIDELINES Since solder joints are not fully exposed in the case of MLFs, any retouch is limited to the side fillet. For defects underneath the package, the whole package has to be removed. Rework of MLF packages can be a challenge due to their small size. In most applications, MLFs will be mounted on smaller, thinner, and denser PCBs that introduces further challenges due to handling and heating issues. Since reflow of adjacent parts is not desirable during rework, the proximity of other components may further complicate this process. Because of the product dependent complexities, the following only provides a guideline and a starting point for the development of a successful rework process for these packages. The rework process involves the following steps: Component Removal Site Redress Solder Paste Application, Component Placement, and Component Attachment. These steps are discussed in the following in more detail. Prior to any rework, it is strongly recommended that the PCB assembly be baked for at least 4 hours at 125E to remove any residual moisture from the assembly. 4.1. Component Removal The first step in removal of component is the reflow of solder joints attaching component to the board. Ideally the reflow profile for part removal should be the same as the one used for part attachment. However, the time above liquidus can be reduced as long as the reflow is complete. In the removal process, it is recommended that the board should be heated from the bottom side using convective heaters and hot gas or air should be used on the top side of he component. Special nozzles should be used to direct the heating in the component area and heating of adjacent components should be minimized. Excessive airflow should also be avoided since this may cause CSP to skew. Air velocity of 15 - 20 liters per minute is a good starting point. Once the joints have reflowed, the Vacuum lift-off should be automatically engaged during the transition from reflow to cooldown. Because of their small size the vacuum pressure should be kept below 15" of Hg. This will allow the component not to be lifted out if all joints have not been reflowed and avoid the pad liftoff. 4.2. Site Redress After the component has been removed, the site needs to be cleaned properly. It is best to use a combination of a blade-style conductive tool and desoldering braid. The width of he blade should be matched to the maximum width of the footprint and the blade temperature should be low enough not to cause any damage o the circuit board. Once the t residual solder has been removed, the lands should be cleaned with a solvent. The solvent is usually specific to the type of paste used in the original assembly and paste manufacturer' recommendations s should be followed. 4.3. Solder Paste Printing Because of their small size and finer pitches, solder paste deposition for MLFs requires extra care. However, a uniform and precise deposition can be achieved if miniature stencil specific to the component is used. The stencil aperture should be aligned with the pads under 50 to 100X magnification. The stencil should then be lowered onto the PCB and the paste should be deposited with a small metal squeegee blade. The blade width should be the same as the package width to ensure single pass paste deposition thus avoiding any overprinting. The stencil thickness and aperture size and shape should be the same as used for the original assembly. Also, no-clean flux should be used, as small standoff of MLFs does not leave much room for cleaning. 4.4. Component Placement MLF packages are expected to have superior selfcentering ability due to their small mass and the placement of this package should be similar to that of BGAs. As the leads are on the underside of the package, split-beam optical system should be used to align the component on the motherboard. This will form an image of solder balls overlaid on the mating footprint and aid in proper alignment. Again, the alignment should be done at 50 to 100X magnification. The placement machine should have the capability of allowing fine adjustments in X, Y, and rotational axes. 4.5. Component Attachment The reflow profile developed during original attachment or removal should be used to attach the new component. Since all reflow profile parameters have already been optimized, using the same profile will eliminate the need for thermocouple feedback and will reduce operator dependencies. (from Application Notes for Amkor' MLF Package) s Preliminary 17 / 17 Last Update 10/16/02 |
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