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HA13631T
CD-ROM Combo Driver
ADE-207-320 (Z) 1st Edition Feb. 2000 Description
The HA13631T is combination of Spindle, Forcus, Tracking, Slide, Tray designed for CD-ROM and have following functions and features.
Functions
* * * * * * 1.5 A spindle driver 0.75 A focus driver 0.75 A tracking driver 1.0 A slide driver 0.75 A tray driver Over temperature shut down (OTSD)
Features
* * * * * Corresponds to both of sensor motor and sensorless motor All direct PWM drive Low on resistance Low power dissipation Small thin surface mount package
HA13631T
Pin Arrangement
ASGND SLDIN OP3IN OP4IN VSLD TRYIN SLDP SLDN SLDGND VTRY TRYP TRYN BSTGND BP1 BP2 VBST U RNF V W EXTCOM FGOUT COMM BRKSEL CE HB HU+ ASGND 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 (Top view) 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 ASGND NC NC OP1IN FCSIN FCSN FCSP VFCS FCSGND TRKP TRKN TRKIN OP2IN VSS SGND PWMDC CT2 CT1 RT REFIN VCTL HWHW+ HVHV+ HUVSPN ASGND
2
HA13631T
Pin Description
Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 Pin Name ASGND SLDIN OP3IN OP4IN VSLD TRYIN SLDP SLDN SLDGND VTRY TRYP TRYN BSTGND BP1 BP2 VBST U RNF V W EXTCOM FGOUT COMM BRKSEL CE HB HU+ ASGND ASGND VSPN HU- HV+ HV- Function Actuator small signal GND SLD driver control input Inverted input of OP amp. 3 for SLD driver control Inverted input of OP amp. 4 for TRY driver control SLD driver power supply TRY driver control input SLD driver P output SLD driver N output SLD and TRY driver GND TRY driver power supply TRY driver P output TRY driver N output Booster GND Booster pumping capacitor connection Booster pumping capacitor connection Booster output pin. This circuit generates a voltage about two times of the VSPN pin. U phase output SPN driver current detection V phase output W phase output COMM signal on/off control and FGOUT switching. (Refer to the Timing Chart) FG output (Refer to the Timing Chart) open drain Start-up clock input pin for sensorless (Refer to the Timing Chart) To select the brake mode (Refer to the Truth Table) Chip enable (Refer to the Truth Table) Hall bias switch U-phase Hall +input, and U-phase B-EMF connection pin for sensorless Actuator small signal GND Actuator small signal GND SPN driver power supply U-phase Hall -input, and center tap connection pin for sensorless V-phase Hall +input, and V-phase B-EMF connection pin for sensorless V-phase Hall -input, and center tap connection pin for sensorless
3
HA13631T
Pin Description (cont)
Pin No. 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 Pin Name HW+ HW- VCTL REFIN RT CT1 CT2 PWMDC SGND VSS OP2IN TRKIN TRKN TRKP FCSGND VFCS FCSP FCSN FCSN OP1IN NC NC ASGND Function W-phase Hall +input, and W-phase B-EMF connection pin for sensorless W-phase Hall -input, and center tap connection pin for sensorless SPN driver control input Reference voltage for control inputs. Common to all drivers. Reference voltage. The IC's internal reference current is determined by this voltage and the external resistor Rt. Time constant for clock oscillation. The oscillator frequency is determined by the external capacitor and resistor Ct1 and Rt. Time constant for PWM carrier. The amplitude is determined by the value of the external capacitor Ct1. Phase compensation connection pin for matching PWM carrier DC level with REFIN SPN small signal GND Control block power supply. 5 V Inverted input of OP amp. 2 for TRK driver control TRK driver control input TRK driver N output TRK driver P output FCS and TRK driver GND FCS driver power supply FCS driver P output FCS driver N output FCS driver control input Inverted input of OP amp. 1 for FCS driver control No connection No connection Actuator small signal GND
4
HA13631T
Block Diagram
U V W CT VSS FGOUT EXTCOM VSPN
43 27 31 32 33 34 35
Zero cross detection
22
21
30
U Logic CLK 1.5 A V SPN output W
17 19 20
Rnf
26
COMM 23 VCTL 36 SPN FCS TRK SLD TRY PWM control Vref
18
C104 PWM carrier OTSD Vbst
BRKSEL 24 CE 25
ENABLE
41 40
Ct2
16
Bias
Rt
38 39
Ct1
CLK OSC
15 14 13
C103 BP2 C103 BP1
CLK
REFIN 37 + OP1IN 53 FCSIN 52 + OP2IN 44 TRKIN 45 - OP2 PWM control Vbst TRK N P - OP1 PWM control Vbst FCS N P
49 VFCS 50 51
47 46 48 5 VSLD
+ OP3IN 3 SLDIN 2 - OP3
PWM control
Vbst SLD
P N
7 8 54 55 10 VTRY
M
+ OP4IN 4 TRYIN 6 5k - OP4
PWM control
Vbst TRY
P N
11 12
M
42
SGND
1
28
29
56
9
5
HA13631T
Timing Chart
1. Start-up
EN H L H L
T2 T4 T1 T3 T5 T6 T7 T8 T9 Tmext T10
EXTCOM
COMM
H L Vspn
Output voltage (U phase) 0 Vspn Output voltage (V phase) 0 Vspn Output voltage (W phase) 0 + Output current (U phase) 0 - + Output current (V phase) 0 - + Output current (W phase) 0 - H L
PWM
PWM
PWM
PWM
PWM
FGOUT
Mute (B-EMF detection) Notes: 1. T1 to T10, and Tmext are set by CPU. 2. B-EMF sensing is masked while COMM = H. Also, when EXTCOM = H, B-EMF sensing is masked during the period from T1 to T6.
6
HA13631T
2. Acceleration
EXTCOM H L U V W
+ Reverse start-up 0 voltage B-EMF - FGOUT H L
Tmint
Tmext
COMM
H L Vspn
Output voltage (U phase) 0 Vspn Output voltage (V phase) 0 Vspn Output voltage (W phase) 0 + Output current (U phase) 0 - + Output current (V phase) 0 - + Output current (W phase) 0 - PWM PWM
PWM
PWM
PWM
PWM
PWM
Note: 1. B-EMF sensing is masked while COMM = H (= Tmext) or FGOUT = H (= Tmint). Tmext is set by the CPU.
7
HA13631T
3. Running
EXTCOM H L U V W
+ Reverse start-up 0 voltage B-EMF -
Td
Zero cross detection input
+ 0 - H L Vspn
U
V
W
FGOUT
Output voltage (U phase) 0 Vspn Output voltage (V phase) 0 Vspn Output voltage (W phase) 0 + Output current (U phase) 0 - + Output current (V phase) 0 - + Output current (W phase) 0 - PWM PWM
PWM
PWM
PWM
PWM
Notes: 1. Delay time Td is determined by C105 to C107, and R109 to R116. Refer to the section of External Components. 2. B-EMF sensing is masked while FGOUT = H (= Tmint). The Tmint time is set internally. Refer to the Electrical Characteristics.
8
HA13631T
Truth Table
Table 1
CE L
CE and BRKSEL
BRKSEL L H SPN Driver Z Enable * Enable * Enable *
2 3 2
FCS Driver Z Enable Enable Enable
TRK Driver Z Enable Enable Enable
SLD Driver Z Z Enable Enable
TRY Driver Z Enable Z Z
H
L H
Notes: 1. Z: Hi impedance 2. Short brake mode 3. Reverse brake mode
Table 2
EXTCOM L
EXTCOM and COMM
COMM L H T1~T6 Mask OFF OFF ON ON T7~ Mask Internal Internal Internal External 36 pulse/rotation FGOUT (@P = 12) 6 cycle/rotation Logic Corresponds to sensor Corresponds to sensorless
H
L H
9
HA13631T
Application
+5 V R101a~d C105a~d HUP HUN HVP HVN HWP HWN PWMDC CT2 R102a~d HB VBST COMM EXTCOM FGOUT MPU VCTL REFIN BRKSEL Rt CE RT CT1 Ct1 R104 OP1IN FCSIN R106 OP2IN TRKIN R108 OP3IN SLDIN R110 OP4IN TRYIN SGND VFCS FCSP FCSN FCSGND TRKP TRKN VSLD SLDP SLDN P54 P55 SLDGND VTRY TRYP TRYN ASGND M TRY M SLD TRK FCS B1 B2 BSTGND C102 Ct2 C103 VSS VSPN U V W RNF C104 Rnf C101
+5 V or +12 V
+5 V or +12 V
R103 DSP
+5 V or +12 V
R105
R107
R109
+5 V or +12 V
10
HA13631T
External Components
Parts No. R101a~d R102a~d R103, R104 R105, R106 R107, R108 R109, R110 Rnf Rt C101 C102 C103 C104 C105a~d Ct1 Ct2 Reccomended Value 2.4 k 7.5 k -- -- -- -- 0.25 6.8 k -- 0.1 F 0.47 F 2200 pF 0.1 F 100 pF 400 pF Reccomended Range 22 k 22 k 220 k 220 k 220 k 220 k 0.25 5 k 0.1 F -- -- -- -- -- -- Purpose Filter resistor and atenuation for B-EMF Filter resistor and atenuation for B-EMF for FCS driver gain setting for TRK driver gain setting for SLD driver gain setting for TRY driver gain setting SPN driver current detection resistor Reference current setting for Power supply by passing for Booster pumping for Booster output smoothing for PWM carrier oscillation DC level adjustment for B-EMF filter Time constant for CLK oscillation PWM carrier generation time constant 1 3, 4 3, 4 5 2 Note 1 1
Notes: 1. The values of R101a~d, R102a~d, and C105a~d are determined by the following equation. Where, Nomax : Maximum rotation speed (rpm) P : Number of spindle motor poles (Total number of S poles and N poles) R101 1 (at Vspn = 5 V) R102 4 C105x = 11 Nomax P 1 1 + R101x R102x
2. The output current maximum value Iospnmax of SPN driver is controlled according to the following equation. However, Vspncl is the current limiter reference voltage. (See the electrical characteristics) Vspncl Iospnmax = Rnf 3. The CLK oscillation frequency fclk and Rt1 Ct1 are related by the following equation. fclk = Vrt 2 Ct1 Rt (Vct1h - Vct1l)
Where, Vrt : RT pin voltage (See the electrical characteristics) Vct1h : CT1 pin high voltage (See the electrical characteristics) Vct1l : CT1 pin low voltage (See the electrical characteristics)
11
HA13631T
4. The PWM carrier frequency fpwm and the amplitude Apwm are determined by the following equation. Vrt fpwm = 8 Ct1 Rt (Vct1h - Vct1l) 4 Ct1 Apwm = (Vct1h - Vct1l) Ct2 However, Ct2 = 4 Ct1 5. As 5 k appears as an internal resistance at TRYIN (pin 6), caution is required when marking the gain setting.
12
HA13631T
Absolute Maximum Ratings (Ta = 25C)
Item Control block supply voltage SPN supply voltage FCS & TRK supply voltage SLD supply voltage TRY supply voltage Input voltage SPN output current FCS output current TRK output current SLD output current TRY output current Power dissipation Junction temperature Storage temperature range Note: Symbol Vss Vspn Vfcs Vsld Vtry Vin Iospn Iofcs Iotrk Iosld Iotry Pt Tj Tstg Rating 7 7 9.5 7 9.5 0 to Vss 1.5 (2.5) 0.75 (1.5) 0.75 (1.5) 1.0 (1.5) 0.75 (1.5) 2.5 150 -55 to +125 Unit V V V V V V A A A A A W C C Note 1 1 1 1 1 2 3 3 3 3 3 4 1
1. Operating range is shown below. Vss = 4.5 to 5.5 V, Vspn = 4.25 to 5.75 V, Vfcs = 4.25 to 8.5 V, Vsld = 4.25 to 5.75 V, Vtry = 4.25 to 8.5 V, Tjopr = -20 to +135C When operating with Vfcs > Vss, it is necessary to set Vtry = Vfcs. Also, settings must be made that satisfy the following condition: Vtry + Vss - Vsld 8.5 V 2. Applied to analog and logic input. 3. Values in parentheses are peak values. ASO (Area of Safety Operation) is shown below.
ASO of SPN Driver t = 0.1 ms
t= 1
ASO of SLD Driver 3 2 1.5 Drain Current Id (A) 1
D
3 2.5 2 1.5 Drain Current Id (A) 1
3 t = 0.1 ms Drain Current Id (A) 2 1.5 1
ASO of FCS TRK TRY Driver
t = 0.1 ms
t= 10
m s
s m
t=
t= 10
t=
1 m s
1 s m
t= 10
ut D y
s m
s m
D
0.5 0.3 0.2
0.5 0.3 0.2
0.5 0.3 0.2
ut
0.1 1 2 3 5 10 15 20 The voltage between Drain and Source Vds (V)
4. Thermal resistance is shown below. j-tab 6C/W (back side tab soldering area is 70% or more) j-a1 30C/W (mounted on 4 layer glass-epoxy board, back side tab soldering area is 70% or more)
= 3 1/
y ut
0.1 1 2 3 5 10 15 20 The voltage between Drain and Source Vds (V)
y = 1/ 2
0.1 1 2 3 5 10 15 20 The voltage between Drain and Source Vds (V)
= 1/ 2
13
HA13631T
Electrical Characteristics (Ta = 25C, Vss = 5 V, Vspn = 12 V, Vfcs = 5 V, Vsld = 12 V)
Item Quiescent current Symbol Iss0 Ispn0 Ifcs0 Isld0 Itry0 Iss1 Ispn1 Ifcs1 Isld1 Itry1 Logic input Input current Low level voltage High level voltage Logic output 1 Logic output 2 SPN driver Low level voltage Leakage current Low level voltage Leakage current Output on resistance Leakage current Slew rate Current limiter voltage FCS/ TRK driver Output on resistance Leakage current Slew rate SLD driver Output on resistance Leakage current Slew rate Iin Vil Vih Vol ICER1 Vol ICER1 Ronspn Ioffspn SRspn Vspncl Ronfcs Iofffcs SRfcs Ronsld Ioffsld SRsld Min -- -- -- -- -- -- -- -- -- -- -- -- 2.0 -- -- -- -- -- -- -- -- -- -- -- -- -- -- Typ 0.2 0.1 -- -- -- 25 -- -- -- 4.0 -- -- -- 0.2 -- 0.3 1.2 1.2 -- 60 0.25 3.0 -- 60 2.0 -- 60 Max 0.5 0.2 0.1 0.1 0.1 35 1.0 1.0 1.0 6.0 10 0.8 -- 0.4 10 0.6 1.5 1.5 100 -- 10% 3.75 100 -- 2.5 100 -- Unit mA mA mA mA mA mA mA mA mA mA A V V V A V A A V/s V A V/s A V/s Io = 1 mA VCE = 5.5 V Io = 15 mA VCE = 5.5 V Io = 1.0 A Vspn = 15 V Load open Rnf = 0.25 Io = 0.5 A Vfcs = 15 V Load open Io = 1.0 A Vsld = 15 V Load open 5 SLDP/N 5 1 RNF FCSP/N, TRKP/N 1 5 U, V, W 1 HB Vin = 0 to Vss CE = H All load open Test Conditions CE = L Applicable Pins VSS VSPN VFCS VSLD VTRY VSS VSPN VFCS VSLD VTRY EXTCOM, COMM, BRKSEL, CE FGOUT Note
14
HA13631T
Electrical Characteristics (Ta = 25C, Vss = 5 V, Vspn = 12 V, Vfcs = 5 V, Vsld = 12 V) (cont)
Item TRY driver Output on resistance Leakage current Slew rate CLK OSC RT voltage CT1 charge current CT1 discharge current CT1 high voltage CT1 low voltage CLK oscillation frequency Bias Drive frequency Output voltage Symbol Rontry Iofftry SRtry Vrt Ict1p Ict1n Vct1h Vct1l fclk fbst Vbst Min -- -- -- -- -- -- -- -- -- -- 16.0 9.0 PWM carrier PWM frequency CT2 charge current CT2 discharge current DC feedback resistance Offset voltage Zero cross
detection
Typ 3.0 -- 125 1.37 180 -180 2.7 1.47 460 fclk/2 16.5 9.5 fclk/4 180 -180 20 -- -- -- 16 64/ fclk -- -- -- 139
Max 3.75 100 -- 5% 10% 10% 0.1 0.1 10% -- -- -- -- 10% 10% 20% 30 4.0 -- 21 4/ fclk 3.0 200 2.65 159
Unit A V/s V A A V V kHz kHz V V kHz A A k mV V mVpp mVpp s A mV V %/V
Test Conditions Io = 0.5 A Vtry = 15 V Load open
Applicable Pins TRYP/N
Note 1
5 RT
Rt = 6.8 k Rt = 6.8 k
CT1
Ct1 = 100 pF BP1 Vspn = 12 V Vspn = 5 V CT2 Rt = 6.8 k Rt = 6.8 k PWMDC VBST
fpwm Ict2p Ict2n Rdc Vospwm Vczd Vinzd Vhyszd Tmint Ictl Vdzctl Vref Dspn
-- -- -- -- -- 0 50 11 -- -- 50 1.0 119
Common mode input voltage range Input voltage range Hysteresis FGOUT pulse width
HU+/-, HV+/-, HW+/-
FGOUT Vctl = 0.5 to 4.5 V VCTL 2 REFIN Ct2 = 680 pF, Ct1 = 100 pF U, V, W 4 2
SPN control
Input current Dead zone voltage REFIN voltage range Control gain
15
HA13631T
Electrical Characteristics (Ta = 25C, Vss = 5 V, Vspn = 12 V, Vfcs = 5 V, Vsld = 12 V) (cont)
Item OP1~ OP4 Input current Offset voltage Open loop gain Gain bandwidth OP1~ OP3 Output low voltage Output high voltage OP4 Output low voltage Output high voltage FCS/ TRK/ SLD/ TRY control OTSD Quiescent offset duty Control gain Symbol Iinop Vosop Gvolop Bop Voopl Vooph Voopl Vooph Dqfcs Dfcs Min -- -- -- -- -- Vss -1.0 -- Vss -1.7 -- 63 Typ -- -- 64 1.6 -- -- -- -- -- 68 Max 0.1 60 -- -- 0.5 -- 0.5 -- 2 73 Unit A mV dB MHz V V V V % %/V Io = -0.2 mA Io = 0.2 mA Io = -0.03 mA Io = 0.03 mA FCS/TRK/SLD/ TRYIN = REFIN Ct2 = 680 pF, Ct1 = 100 pF FCSP/N, TRKP/N, SLDP/N, TRYP/N 3 f = 1kHz Test Conditions Vin = 0 to Vss Applicable Pins OP1~4IN FCSIN, TRKIN, SLDIN, TRYIN FCSIN, TRKIN, SLDIN 5 5 Note
TRYIN
Operating temperature Hysteresis
Tsd Thys
135 --
180 80
-- --
C C
5
16
HA13631T
Note: 1. Specified by sum of the upper and lower saturation voltages. 2. See figure 1. Where, Dspn = D Vctl
Duty (%)
Reverse torque
Vdzctl
Forward torque
100 D Vctl 0 Vref Vctl(V)
Figure 1
3. See figure 2. Where, x = fcs, trk, sld, try. Dx = D Vxin
Duty (%) 100
X = fcs, trk, sld, try D
50
Vxin
0
Vref
P
Figure 2
4. If Vref < 1.5 V, 100% PWM duty control may not be possible. 5. Design guide only.
N
Vxin
17
HA13631T
Reference Data
SPN Driver Output Saturation Voltage vs. Output Current 3 FCS Driver Output Saturation Voltage vs. Output Current 3
ar m
Output Saturation Voltage Vsatspn (V)
Output Saturation Voltage Vsatfcs (V)
2
rm ra
2
r pe ar m +
Lo
r we
1
pe Up
ra
rm
ow +L
e
Up
1
0 0
Up 0.5 1.0 Output Current Iospn (A)
rm, per a
Lowe
r arm
pe Up
ra
rm
w , Lo
er
arm
1.5
0 0
0.2 0.4 0.6 0.8 Output Current Iofcs (A)
1.0
Output Saturation Voltage Vsatsld (V)
Output Saturation Voltage Vsattrr (V)
3
SLD Driver Output Saturation Voltage vs. Output Current
3
TRK Driver Output Saturation Voltage vs. Output Current
2
er a rm +
Lo
r we
ar
m
2
er a rm +
Lo
r we
ar
m
p Up
1
pe Up
ra
rm
, Lo
r we
arm
p Up
1
pe Up
ra
rm
w , Lo
er
arm
0 0
0.5 1.0 Output Current Iosld (A)
1.5
0 0
0.2 0.4 0.6 0.8 Output Current Iotrk (A)
1.0
Output Saturation Voltage Vsattry (V)
3
TRY Driver Output Saturation Voltage vs. Output Current
RT Voltage vs. Junction Temperature 1.6
2
er a rm +
Lo
RT Voltage Vrt (V) 1.0
r we
ar
m
1.4
p Up
1
pe Up
ra
rm
w , Lo
er
arm
1.2
0 0
0.2 0.4 0.6 0.8 Output Current Iotry (A)
1.0 -20
0 25 50 75 100 135 Junction Temperature Tj (C)
18
HA13631T
Package Dimensions
14.0 14.2 Max 56 29 6.10
Unit: mm
1 *0.21 +0.04 -0.05 0.19 +0.03 -0.05
0.50 0.08 M 0.65 Max
28 1.0 0 - 8 *0.17 0.05 0.15 0.04 0.05 0.05 0.50 0.1
8.10 0.20
1.20 Max
0.10 (9.30) (7.20) 1 28
(2.50) (3.50)
56
29
*Dimension including the plating thickness Base material dimension
Hitachi Code JEDEC EIAJ Weight (reference value)
TTP-56DT -- -- 0.32 g
19
HA13631T
Cautions
1. Hitachi neither warrants nor grants licenses of any rights of Hitachi's or any third party's patent, copyright, trademark, or other intellectual property rights for information contained in this document. Hitachi bears no responsibility for problems that may arise with third party's rights, including intellectual property rights, in connection with use of the information contained in this document. 2. Products and product specifications may be subject to change without notice. Confirm that you have received the latest product standards or specifications before final design, purchase or use. 3. Hitachi makes every attempt to ensure that its products are of high quality and reliability. However, contact Hitachi's sales office before using the product in an application that demands especially high quality and reliability or where its failure or malfunction may directly threaten human life or cause risk of bodily injury, such as aerospace, aeronautics, nuclear power, combustion control, transportation, traffic, safety equipment or medical equipment for life support. 4. Design your application so that the product is used within the ranges guaranteed by Hitachi particularly for maximum rating, operating supply voltage range, heat radiation characteristics, installation conditions and other characteristics. Hitachi bears no responsibility for failure or damage when used beyond the guaranteed ranges. Even within the guaranteed ranges, consider normally foreseeable failure rates or failure modes in semiconductor devices and employ systemic measures such as failsafes, so that the equipment incorporating Hitachi product does not cause bodily injury, fire or other consequential damage due to operation of the Hitachi product. 5. This product is not designed to be radiation resistant. 6. No one is permitted to reproduce or duplicate, in any form, the whole or part of this document without written approval from Hitachi. 7. Contact Hitachi's sales office for any questions regarding this document or Hitachi semiconductor products.
Hitachi, Ltd.
Semiconductor & Integrated Circuits. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Tel: Tokyo (03) 3270-2111 Fax: (03) 3270-5109
URL
NorthAmerica : http:semiconductor.hitachi.com/ Europe : http://www.hitachi-eu.com/hel/ecg Asia (Singapore) : http://www.has.hitachi.com.sg/grp3/sicd/index.htm Asia (Taiwan) : http://www.hitachi.com.tw/E/Product/SICD_Frame.htm Asia (HongKong) : http://www.hitachi.com.hk/eng/bo/grp3/index.htm Japan : http://www.hitachi.co.jp/Sicd/indx.htm For further information write to:
Hitachi Semiconductor (America) Inc. 179 East Tasman Drive, San Jose,CA 95134 Tel: <1> (408) 433-1990 Fax: <1>(408) 433-0223 Hitachi Europe GmbH Electronic components Group Dornacher Strae 3 D-85622 Feldkirchen, Munich Germany Tel: <49> (89) 9 9180-0 Fax: <49> (89) 9 29 30 00 Hitachi Europe Ltd. Electronic Components Group. Whitebrook Park Lower Cookham Road Maidenhead Berkshire SL6 8YA, United Kingdom Tel: <44> (1628) 585000 Fax: <44> (1628) 778322 Hitachi Asia Pte. Ltd. 16 Collyer Quay #20-00 Hitachi Tower Singapore 049318 Tel: 535-2100 Fax: 535-1533 Hitachi Asia Ltd. Taipei Branch Office 3F, Hung Kuo Building. No.167, Tun-Hwa North Road, Taipei (105) Tel: <886> (2) 2718-3666 Fax: <886> (2) 2718-8180 Hitachi Asia (Hong Kong) Ltd. Group III (Electronic Components) 7/F., North Tower, World Finance Centre, Harbour City, Canton Road, Tsim Sha Tsui, Kowloon, Hong Kong Tel: <852> (2) 735 9218 Fax: <852> (2) 730 0281 Telex: 40815 HITEC HX
Copyright ' Hitachi, Ltd., 2000. All rights reserved. Printed in Japan.
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