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 HCS164MS
September 1995
Radiation Hardened 8-Bit Serial-In/Parallel-Out Register
Pinouts
14 LEAD CERAMIC DUAL-IN-LINE METAL SEAL PACKAGE (SBDIP) MIL-STD-1835 CDIP2-T14, LEAD FINISH C TOP VIEW
DS1 1 DS2 2 Q0 3 Q1 4 Q2 5 Q3 6 GND 7 14 VCC 13 Q7 12 Q6 11 Q5 10 Q4 9 MR 8 CP
Features
* 3 Micron Radiation Hardened CMOS SOS * Total Dose 200K RAD (Si) * SEP Effective LET No Upsets: >100 MEV-cm2/mg * Single Event Upset (SEU) Immunity < 2 x 10-9 Errors/ Bit-Day (Typ) * Dose Rate Survivability: >1 x * Dose Rate Upset >10
10
1012
RAD (Si)/s
RAD (Si)/s 20ns Pulse
* Latch-Up-Free Under Any Conditions * Fanout (Over Temperature Range) - Standard Outputs - 10 LSTTL Loads * Military Temperature Range: -55oC to +125oC
* Significant Power Reduction Compared to LSTTL ICs * DC Operating Voltage Range: 4.5V to 5.5V * Input Logic Levels - VIL = 0.3 VCC Max - VIH = 0.7 VCC Min * Input Current Levels Ii 5A at VOL, VOH
14 LEAD CERAMIC METAL SEAL FLATPACK PACKAGE (FLATPACK) MIL-STD-1835 CDFP3-F14, LEAD FINISH C TOP VIEW
DS1 DS2 Q0 Q1 Q2 Q3 GND 1 2 3 4 5 6 7 14 13 12 11 10 9 8 VCC Q7 Q6 Q5 Q4 MR CP
Description
The Intersil HCS164MS is a Radiation Hardened 8-bit Serial-In/Parallel-Out Shift Register that has fully synchronous serial data entry and an asynchronous master reset. The HCS164MS utilizes advanced CMOS/SOS technology to achieve high-speed operation. This device is a member of radiation hardened, high-speed, CMOS/SOS Logic Family. The HCS164MS is supplied in a 14 lead Ceramic flatpack (K suffix) or a SBDIP Package (D suffix).
Ordering Information
PART NUMBER HCS164DMSR HCS164KMSR HCS164D/Sample HCS164K/Sample HCS164HMSR TEMPERATURE RANGE -55oC to +125oC -55oC to +125oC +25oC +25oC +25oC SCREENING LEVEL Intersil Class S Equivalent Intersil Class S Equivalent Sample Sample Die PACKAGE 14 Lead SBDIP 14 Lead Ceramic Flatpack 14 Lead SBDIP 14 Lead Ceramic Flatpack Die
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Copyright (c) Intersil Corporation 1999
Spec Number File Number
230
518756 2465.2
HCS164MS Functional Diagram
9 MR
8 CP
CL D
R Q
CL D
R Q
CL D
R Q
CL D
R Q
CL D
R Q
CL D
R Q
CL D
R Q
CL D
R Q
1 D1 2 D2 3 Q0 Q1 4 Q2 5 6 Q3 Q4 10 Q5 11 12 Q6 13 Q7
TRUTH TABLE INPUTS OPERATING MODE Reset (Clear) Shift MR L H H H H H= h= L= l= CP X DS1 X l l h h DS2 X l h l h Q0 L L L L H OUTPUTS Q1-Q7 L-L q0 -q6 q0 - q6 q0 - q6 q0 - q6
High Voltage Level HIGH voltage level one setup time prior to the LOW-to-HIGH clock transistion Low VoltageLevel LOW voltage level one setup time prior to the LOW-to-HIGH clock transition. = LOW-to-HIGH clock transition q = Lower case letters indicate the state of the referenced input (or output) one setup time prior to the LOW-to-HIGH clock transition
Spec Number 231
518756
Specifications HCS164MS
Absolute Maximum Ratings
Supply Voltage (VCC). . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to +7.0V Input Voltage Range, All Inputs . . . . . . . . . . . . .-0.5V to VCC +0.5V DC Input Current, Any One Input . . . . . . . . . . . . . . . . . . . . . . . .10mA DC Drain Current, Any One Output. . . . . . . . . . . . . . . . . . . . . . .25mA (All Voltage Reference to the VSS Terminal) Storage Temperature Range (TSTG) . . . . . . . . . . . -65oC to +150oC Lead Temperature (Soldering 10sec) . . . . . . . . . . . . . . . . . . +265oC Junction Temperature (TJ) . . . . . . . . . . . . . . . . . . . . . . . . . . +175oC ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1
Reliability Information
Thermal Resistance JA JC SBDIP Package. . . . . . . . . . . . . . . . . . . . 74oC/W 24oC/W Ceramic Flatpack Package . . . . . . . . . . . 116oC/W 30oC/W Maximum Package Power Dissipation at +125oC Ambient SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.68W Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . . . . 0.43W If device power exceeds package dissipation capability, provide heat sinking or derate linearly at the following rate: SBDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13.5mW/oC Ceramic Flatpack Package . . . . . . . . . . . . . . . . . . . . . . 8.6mW/oC
CAUTION: As with all semiconductors, stress listed under "Absolute Maximum Ratings" may be applied to devices (one at a time) without resulting in permanent damage. This is a stress rating only. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. The conditions listed under "Electrical Performance Characteristics" are the only conditions recommended for satisfactory device operation..
Operating Conditions
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +4.5V to +5.5V Input Rise and Fall Times at 4.5 VCC (TR, TF) . . . . . . . .500ns Max Operating Temperature Range (TA) . . . . . . . . . . . . -55oC to +125oC Input Low Voltage (VIL). . . . . . . . . . . . . . . . . . . 0.0V to 30% of VCC Input High Voltage (VIH) . . . . . . . . . . . . . . . . . . 70% of VCC to VCC
TABLE 1. DC ELECTRICAL PERFORMANCE CHARACTERISTICS GROUP A SUBGROUPS 1 2, 3 Output Current (Sink) IOL VCC = 4.5V, VIH = 4.5V, VOUT = 0.4V, VIL = 0V 1 2, 3 Output Current (Source) IOH VCC = 4.5V, VIH = 4.5V, VOUT = VCC -0.4V, VIL = 0V VCC = 4.5V, VIH = 3.15V, IOL = 50A, VIL = 1.35V VCC = 5.5V, VIH = 3.85V, IOL = 50A, VIL = 1.65V Output Voltage High VOH VCC = 4.5V, VIH = 3.15V, IOH = -50A, VIL = 1.35V VCC = 5.5V, VIH = 3.85V, IOH = -50A, VIL = 1.65V Input Leakage Current IIN VCC = 5.5V, VIN = VCC or GND 1 2, 3 1, 2, 3 LIMITS TEMPERATURE +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC +125oC, -55oC +25oC, +125oC, -55oC MIN 4.8 4.0 -4.8 -4.0 MAX 40 750 0.1 UNITS A A mA mA mA mA V
PARAMETER Quiescent Current
SYMBOL ICC
(NOTE 1) CONDITIONS VCC = 5.5V, VIN = VCC or GND
Output Voltage Low
VOL
1, 2, 3
+25oC, +125oC, -55oC
-
0.1
V
1, 2, 3
+25oC, +125oC, -55oC
VCC -0.1 VCC -0.1 -
-
V
1, 2, 3
+25oC, +125oC, -55oC
-
V
1 2, 3
+25oC +125oC, -55oC +25oC, +125oC, -55oC
0.5 5.0 -
A A -
Noise Immunity Functional Test
FN
VCC = 4.5V, VIH = 0.70(VCC), VIL = 0.30(VCC) (Note 2)
7, 8A, 8B
NOTES: 1. All voltages reference to device GND. 2. For functional tests, VO 4.0V is recognized as a logic "1", and VO 0.5V is recognized as a logic "0".
Spec Number 232
518756
Specifications HCS164MS
TABLE 2. AC ELECTRICAL PERFORMANCE CHARACTERISTICS GROUP A SUBGROUPS 9 10, 11 9 10, 11 LIMITS TEMPERATURE +25oC +125oC, -55oC +25oC +125oC, -55oC MIN 2 2 2 2 MAX 32 37 32 37 UNITS ns ns ns ns
PARAMETER CP to Qn
SYMBOL TPLH TPHL
(NOTES 1, 2) CONDITIONS VCC = 4.5V VCC = 4.5V
MR to Qn
TPHL
VCC = 4.5V VCC = 4.5V
NOTES: 1. All voltages referenced to device GND. 2. AC measurements assume RL = 500, CL = 50pF, Input TR = TF = 3ns, VIL = GND, VIH = VCC.
TABLE 3. ELECTRICAL PERFORMANCE CHARACTERISTICS LIMITS PARAMETER Capacitance Power Dissipation SYMBOL CPD (NOTE 1) CONDITIONS VCC = 5.0V, f = 1MHz TEMPERATURE +25oC +125oC, -55oC Input Capacitance CIN VCC = 5.0V, f = 1MHz +25oC +125oC, -55oC Output Transition Time TTHL TTLH VCC = 4.5V +25oC +125oC, -55oC NOTE: 1. The parameters listed in Table 3 are controlled via design or process parameters. Min and Max Limits are guaranteed but not directly tested. These parameters are characterized upon initial design release and upon design changes which affect these characteristics. MIN MAX 135 165 10 10 15 22 UNITS pF pF pF pF ns ns
TABLE 4. DC POST RADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS 200K RAD LIMITS PARAMETER Quiescent Current Output Current (Sink) SYMBOL ICC IOL (NOTES 1, 2) CONDITIONS VCC = 5.5V, VIN = VCC or GND VCC = 4.5V, VIN = VCC or GND, VOUT = 0.4V VCC = 4.5V, VIN = VCC or GND, VOUT = VCC -0.4V VCC = 4.5V and 5.5V, VIH = 0.70(VCC), VIL = 0.30(VCC), IOL = 50A VCC = 4.5V and 5.5V, VIH = 0.70(VCC), VIL = 0.30(VCC), IOH = -50A VCC = 5.5V, VIN = VCC or GND TEMPERATURE +25oC +25oC MIN 4.0 MAX 0.75 UNITS mA mA
Output Current (Source) Output Voltage Low
IOH
+25oC
-4.0
-
mA
VOL
+25oC
-
0.1
V
Output Voltage High
VOH
+25oC
VCC -0.1 -
-
V
Input Leakage Current
IIN
+25oC
5
A
Spec Number 233
518756
Specifications HCS164MS
TABLE 4. DC POST RADIATION ELECTRICAL PERFORMANCE CHARACTERISTICS (Continued) 200K RAD LIMITS PARAMETER Noise Immunity Functional Test CP to Qn SYMBOL FN (NOTES 1, 2) CONDITIONS VCC = 4.5V, VIH = 0.70(VCC), VIL = 0.30(VCC), (Note 3) VCC = 4.5V TEMPERATURE +25oC MIN MAX UNITS -
TPHL TPLH TPHL
+25oC
2
37
ns
MR to Qn NOTES:
VCC = 4.5V
+25oC
2
37
ns
1. All voltages referenced to device GND. 2. AC measurements assume RL = 500, CL = 50pF, Input TR = TF = 3ns, VIL = GND, VIH = VCC. 3. For functional tests VO 4.0V is recognized as a logic "1", and VO 0.5V is recognized as a logic "0".
TABLE 5. BURN-IN AND OPERATING LIFE TEST, DELTA PARAMETERS (+25oC) GROUP B SUBGROUP 5 5
PARAMETER ICC IOL/IOH
DELTA LIMIT 12A -15% of 0 Hour
TABLE 6. APPLICABLE SUBGROUPS CONFORMANCE GROUPS Initial Test (Preburn-In) Interim Test I (Postburn-In) Interim Test II (Postburn-In) PDA Interim Test III (Postburn-In) PDA Final Test Group A (Note 1) Group B Subgroup B-5 METHOD 100%/5004 100%/5004 100%/5004 100%/5004 100%/5004 100%/5004 100%/5004 Sample/5005 Sample/5005 GROUP A SUBGROUPS 1, 7, 9 1, 7, 9 1, 7, 9 1, 7, 9, Deltas 1, 7, 9 1, 7, 9, Deltas 2, 3, 8A, 8B, 10, 11 1, 2, 3, 7, 8A, 8B, 9, 10, 11 1, 2, 3, 7, 8A, 8B, 9, 10, 11, Deltas Subgroups 1, 2, 3, 9, 10, 11, (Note 2) ICC, IOL/H READ AND RECORD ICC, IOL/H ICC, IOL/H ICC, IOL/H
Subgroup B-6 Group D NOTES:
Sample/5005 Sample/5005
1, 7, 9 1, 7, 9
1. Alternate group A testing in accordance with method 5005 of MIL-STD-883 may be exercised. 2. Table 5 parameters only.
Spec Number 234
518756
Specifications HCS164MS1
TABLE 7. TOTAL DOSE IRRADIATION TEST CONFORMANCE GROUPS Group E Subgroup 2 NOTE: 1. Except FN test which will be performed 100% Go/No-Go. METHOD 5005 PRE RAD 1, 7, 9 POST RAD Table 4 READ AND RECORD PRE RAD 1, 9 POST RAD Table 4 (Note 1)
TABLE 8. STATIC AND DYNAMIC BURN-IN TEST CONNECTIONS OSCILLATOR OPEN GROUND 1/2 VCC = 3V 0.5V VCC = 6V 0.5V 50kHz 25kHz
STATIC BURN-IN I TEST CONNECTIONS (Note 1) 3 - 6, 10 - 13 1, 2, 7 - 9 14 -
STATIC BURN-IN II TEST CONNECTIONS (Note 1) 3 - 6, 10 - 13 7 1, 2, 8, 9, 14 -
DYNAMIC BURN-IN TEST CONNECTIONS (Note 2) NOTES: 1. Each pin except VCC and GND will have a resistor of 10K 5% for static burn-in 2. Each pin except VCC and GND will have a resistor of 1K 5% for dynamic burn-in 7 3 - 6, 10 - 13 9, 14 8 1, 2
TABLE 9. IRRADIATION TEST CONNECTIONS OPEN 3 - 6, 10 - 13 GROUND 7 VCC = 5V 0.5V 1, 2, 8, 9, 14
NOTE: Each pin except VCC and GND will have a resistor of 47K 5% for irradiation testing. Group E, Subgroup 2, sample size is 4 dice/wafer 0 failures.
Spec Number 235
518756
HCS164MS Intersil Space Level Product Flow - `MS'
Wafer Lot Acceptance (All Lots) Method 5007 (Includes SEM) GAMMA Radiation Verification (Each Wafer) Method 1019, 4 Samples/Wafer, 0 Rejects 100% Nondestructive Bond Pull, Method 2023 Sample - Wire Bond Pull Monitor, Method 2011 Sample - Die Shear Monitor, Method 2019 or 2027 100% Internal Visual Inspection, Method 2010, Condition A 100% Temperature Cycle, Method 1010, Condition C, 10 Cycles 100% Constant Acceleration, Method 2001, Condition per Method 5004 100% PIND, Method 2020, Condition A 100% External Visual 100% Serialization 100% Initial Electrical Test (T0) 100% Static Burn-In 1, Condition A or B, 24 hrs. min., +125oC min., Method 1015 100% Interim Electrical Test 1 (T1) 100% Delta Calculation (T0-T1) 100% Static Burn-In 2, Condition A or B, 24 hrs. min., +125oC min., Method 1015 100% Interim Electrical Test 2 (T2) 100% Delta Calculation (T0-T2) 100% PDA 1, Method 5004 (Notes 1and 2) 100% Dynamic Burn-In, Condition D, 240 hrs., +125oC or Equivalent, Method 1015 100% Interim Electrical Test 3 (T3) 100% Delta Calculation (T0-T3) 100% PDA 2, Method 5004 (Note 2) 100% Final Electrical Test 100% Fine/Gross Leak, Method 1014 100% Radiographic, Method 2012 (Note 3) 100% External Visual, Method 2009 Sample - Group A, Method 5005 (Note 4) 100% Data Package Generation (Note 5)
NOTES: 1. Failures from Interim electrical test 1 and 2 are combined for determining PDA 1. 2. Failures from subgroup 1, 7, 9 and deltas are used for calculating PDA. The maximum allowable PDA = 5% with no more than 3% of the failures from subgroup 7. 3. Radiographic (X-Ray) inspection may be performed at any point after serialization as allowed by Method 5004. 4. Alternate Group A testing may be performed as allowed by MIL-STD-883, Method 5005. 5. Data Package Contents: * Cover Sheet (Intersil Name and/or Logo, P.O. Number, Customer Part Number, Lot Date Code, Intersil Part Number, Lot Number, Quantity). * Wafer Lot Acceptance Report (Method 5007). Includes reproductions of SEM photos with percent of step coverage. * GAMMA Radiation Report. Contains Cover page, disposition, Rad Dose, Lot Number, Test Package used, Specification Numbers, Test equipment, etc. Radiation Read and Record data on file at Intersil. * X-Ray report and film. Includes penetrometer measurements. * Screening, Electrical, and Group A attributes (Screening attributes begin after package seal). * Lot Serial Number Sheet (Good units serial number and lot number). * Variables Data (All Delta operations). Data is identified by serial number. Data header includes lot number and date of test. * The Certificate of Conformance is a part of the shipping invoice and is not part of the Data Book. The Certificate of Conformance is signed by an authorized Quality Representative.
Spec Number 236
518756
HCS164MS AC Timing Diagrams
VIH VS VIL TPLH TPHL VOH VS VOL TTLH 80% VOL 20% 80% 20% TTHL OUTPUT CL = 50pF RL = 500 CL RL INPUT DUT TEST POINT
AC Load Circuit
VOH
OUTPUT
AC VOLTAGE LEVELS PARAMETER VCC VIH VS VIL GND HCS 4.50 4.50 2.25 0 0 UNITS V V V V V
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
Sales Office Headquarters
NORTH AMERICA Intersil Corporation P. O. Box 883, Mail Stop 53-204 Melbourne, FL 32902 TEL: (321) 724-7000 FAX: (321) 724-7240 EUROPE Intersil SA Mercure Center 100, Rue de la Fusee 1130 Brussels, Belgium TEL: (32) 2.724.2111 FAX: (32) 2.724.22.05 ASIA Intersil (Taiwan) Ltd. Taiwan Limited 7F-6, No. 101 Fu Hsing North Road Taipei, Taiwan Republic of China TEL: (886) 2 2716 9310 FAX: (886) 2 2715 3029
Spec Number 237
518756
HCS164MS Die Characteristics
DIE DIMENSIONS: 95 x 94mils METALLIZATION: Type: AlSi Metal Thickness: 11kA 1kA GLASSIVATION: Type: SiO2 Thickness: 13kA 2.6kA WORST CASE CURRENT DENSITY: < 2.0 x 105A/cm2 BOND PAD SIZE: 100m x 100m 4 mils x 4 mils
Metallization Mask Layout
HCS164MS
DS2 (2) DS1 (1) VCC (14) Q7 (13) Q6 (12)
Q0 (3) (11) Q5
Q1 (4) NC
NC (10) Q4
(5) Q2
(6) Q3
(7) GND
(8) CP
(9) (MR)
Spec Number 238
518756


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