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PD - 96908C
IRF6644
DirectFET Power MOSFET
l l l l l l l l l
Lead and Bromide Free Low Profile (<0.7 mm) Dual Sided Cooling Compatible Ultra Low Package Inductance Optimized for High Frequency Switching Ideal for High Performance Isolated Converter Primary Switch Socket Optimized for Synchronous Rectification Low Conduction Losses Compatible with existing Surface Mount Techniques
Typical values (unless otherwise specified)
VDSS Qg
tot
VGS Qgd
11.5nC
RDS(on) Vgs(th)
3.7V
100V max 20V max 10.7m@ 10V
35nC
MN
Applicable DirectFET Outline and Substrate Outline (see p.7,8 for details)
SQ SX ST MQ MX MT MN
DirectFET ISOMETRIC
Description
The IRF6644 combines the latest HEXFET(R) Power MOSFET Silicon technology with the advanced DirectFETTM packaging to achieve the lowest on-state resistance in a package that has the footprint of an SO-8 and only 0.7 mm profile. The DirectFET package is compatible with existing layout geometries used in power applications, PCB assembly equipment and vapor phase, infra-red or convection soldering techniques, when application note AN-1035 is followed regarding the manufacturing methods and processes. The DirectFET package allows dual sided cooling to maximize thermal transfer in power systems, improving previous best thermal resistance by 80%. The IRF6644 is optimized for primary side bridge topologies in isolated DC-DC applications, for wide range universal input Telecom applications (36V - 75V), and for secondary side synchronous rectification in regulated DC-DC topologies. The reduced total losses in the device coupled with the high level of thermal performance enables high efficiency and low temperatures, which are key for system reliability improvements, and makes this device ideal for high performance isolated DC-DC converters.
Absolute Maximum Ratings
Parameter
VDS VGS ID @ TA = 25C ID @ TA = 70C ID @ TC = 25C IDM EAS IAR
0.12
Typical R DS (on), () (m)
Max.
100 20 10.3 8.3 60 82 220 6.2
14 TA= 25C 13
Units
V
Drain-to-Source Voltage Gate-to-Source Voltage Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS @ 10V Continuous Drain Current, VGS Pulsed Drain Current
g
e e @ 10V f h
A
Single Pulse Avalanche Energy Avalanche CurrentAg
ID = 6.2A 0.08
mJ A
VGS = 7.0V VGS = 8.0V
DS(on)
12
0.04 TJ = 125C 0.00 4.0 TJ = 25C 6.0 8.0 10.0 12.0 14.0 VGS, Gate-to-Source Voltage (V) 16.0
Typical R
VGS = 10V VGS = 15V
11
10 0 4 8 12 16 20
ID, Drain Current (A)
Fig 2. Typical On-Resistance Vs. Drain Current
Fig 1. Typical On-Resistance Vs. Gate Voltage
Notes: Click on this section to link to the appropriate technical paper. Click on this section to link to the DirectFET Website. Surface mounted on 1 in. square Cu board, steady state.
TC measured with thermocouple mounted to top (Drain) of part. Repetitive rating; pulse width limited by max. junction temperature. Starting TJ = 25C, L = 12mH, RG = 25, IAS = 6.2A.
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11/23/04
IRF6644
Static @ TJ = 25C (unless otherwise specified)
Parameter
BVDSS VDSS/TJ RDS(on) VGS(th) VGS(th)/TJ IDSS IGSS gfs Qg Qgs1 Qgs2 Qgd Qgodr Qsw Qoss RG td(on) tr td(off) tf Ciss Coss Crss Coss Coss Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Gate Threshold Voltage Coefficient Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Forward Transconductance Total Gate Charge Pre-Vth Gate-to-Source Charge Post-Vth Gate-to-Source Charge Gate-to-Drain Charge Gate Charge Overdrive Switch Charge (Qgs2 + Qgd) Output Charge Gate Resistance Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Input Capacitance Output Capacitance Reverse Transfer Capacitance Output Capacitance Output Capacitance
Min.
100 --- --- 2.8 --- --- --- --- --- 15 --- --- --- --- --- --- ---
---
Typ. Max. Units
--- 0.11 10.7 --- -10 --- --- --- --- --- 35 8.0 1.6 11.5 13 13.1 17 1.0 17 26 34 16 2210 420 100 2120 240 --- --- 13 4.8 --- 20 250 100 -100 --- 47 --- --- 17.3 --- --- --- 2.0 --- --- --- --- --- --- --- --- --- pF VGS = 0V VDS = 25V = 1.0MHz ns nC
Conditions
VGS = 0V, ID = 250A VGS = 10V, ID = 10.3A c VDS = VGS, ID = 150A VDS = 100V, VGS = 0V VDS = 80V, VGS = 0V, TJ = 125C VGS = 20V VGS = -20V VDS = 10V, ID = 6.2A VDS = 50V
V m V mV/C A nA S
V/C Reference to 25C, ID = 1mA
nC
VGS = 10V ID = 6.2A See Fig. 17 VDS = 16V, VGS = 0V VDD = 50V, VGS = 10V ID = 6.2A RG=6.2 c
--- --- --- --- --- --- --- --- ---
VGS = 0V, VDS = 1.0V, f=1.0MHz VGS = 0V, VDS = 80V, f=1.0MHz
Diode Characteristics
Parameter
IS ISM VSD trr Qrr Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) d --- --- --- --- 42 69 1.3 63 100 V ns nC Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge --- --- 82
Min.
---
Typ. Max. Units
--- 10 A
Conditions
MOSFET symbol showing the integral reverse p-n junction diode. TJ = 25C, IS = 6.2A, VGS = 0V c TJ = 25C, IF = 6.2A, VDD = 50V di/dt = 100A/s c
Notes:
Pulse width 400s; duty cycle 2%. Repetitive rating; pulse width limited by max. junction temperature.
2
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IRF6644
Absolute Maximum Ratings
PD @TA = 25C PD @TA = 70C PD @TC = 25C TP TJ TSTG
c Power Dissipation c Power Dissipation f
Power Dissipation Operating Junction and
Parameter
Max.
2.8 1.8 89 270 -40 to + 150
Units
W
Peak Soldering Temperature Storage Temperature Range
C
Thermal Resistance
RJA RJA RJA RJC RJ-PCB
100
cg dg Junction-to-Ambient eg Junction-to-Case fg
Junction-to-Ambient Junction-to-Ambient
Parameter
Typ.
--- 12.5 20 --- 1.0
Max.
45 --- --- 1.4 ---
Units
C/W
Junction-to-PCB Mounted
10
Thermal Response ( Z thJA )
1
D = 0.50 0.20 0.10 0.05 0.02 0.01
J R1 R1 J 1 2 R2 R2 R3 R3 3 R4 R4 C 2 3 4 4
0.1
Ri (C/W)
0.6784 17.299 17.566 9.4701
i (sec)
0.00086 0.57756 8.94 106
0.01
1
0.001
SINGLE PULSE ( THERMAL RESPONSE )
Ci= i/Ri Ci i/Ri
Notes: 1. Duty Factor D = t1/t2 2. Peak Tj = P dm x Zthja + Tc
0.01 0.1 1 10 100
0.0001 1E-006 1E-005 0.0001 0.001
t1 , Rectangular Pulse Duration (sec)
Notes: Surface mounted on 1 in. square Cu board, steady state. Used double sided cooling , mounting pad. Mounted on minimum footprint full size board with metalized back and with small clip heatsink.
Fig 3. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient
TC measured with thermocouple incontact with top (Drain) of part. R is measured at TJ of approximately 90C.
Surface mounted on 1 in. square Cu board (still air).
Mounted to a PCB with small clip heatsink (still air)
Mounted on minimum footprint full size board with metalized back and with small clip heatsink (still air)
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IRF6644
100
100
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
6.0V
TOP VGS 15V 10V 8.0V 7.0V 6.0V
6.0V
10
TOP
BOTTOM
VGS 15V 10V 8.0V 7.0V 6.0V
10
BOTTOM
60s PULSE WIDTH Tj = 25C
1 0.1 1 10 100
60s PULSE WIDTH Tj = 150C
1 0.1 1 10 100
VDS , Drain-to-Source Voltage (V)
VDS , Drain-to-Source Voltage (V)
Fig 4. Typical Output Characteristics
100.00
Fig 5. Typical Output Characteristics
2.0
ID, Drain-to-Source Current()
10.00
TJ = -40C
Typical R DS(on), (Normalized)
TJ = 150C TJ = 25C
ID = 10.3A
VGS = 10V
1.5
1.00
0.10
1.0
VDS = 10V
0.01 3.0 4.0 5.0
60s PULSE WIDTH
6.0 7.0
0.5 -60 -40 -20 0 20 40 60 80 100 120 140 160
VGS, Gate-to-Source Voltage (V)
Fig 6. Typical Transfer Characteristics
100000
TJ , Junction Temperature (C)
Fig 7. Normalized On-Resistance vs. Temperature
20 ID= 6.2A VGS, Gate-to-Source Voltage (V) 16 VDS = 50V VDS= 20V
VGS = 0V, f = 1 MHZ Ciss = Cgs + Cgd, Cds SHORTED Crss = Cgd Coss = Cds + Cgd
10000
C, Capacitance (pF)
Ciss
1000
12
Coss
8
100
Crss
4
10 1 10 100
0 0 20 40 60 QG Total Gate Charge (nC)
VDS , Drain-to-Source Voltage (V)
Fig 8. Typical Capacitance vs.Drain-to-Source Voltage
4
Fig 9. Typical Total Gate Charge vs Gate-to-Source Voltage
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IRF6644
1000.0
1000
ID, Drain-to-Source Current (A)
OPERATION IN THIS AREA LIMITED BY R DS (on)
ISD , Reverse Drain Current (A)
100.0
100 100sec 10 1msec 100msec 1 TA = 25C Tj = 150C Single Pulse 0.01 0.10 1.00 10msec
10.0
TJ = 150C TJ = 25C TJ = -40C
1.0
VGS = 0V
0.1 0.0 1.0 2.0 3.0 4.0 5.0
0.1 10.00 100.00 1000.00
VSD , Source-to-Drain Voltage (V)
VDS , Drain-toSource Voltage (V)
Fig 10. Typical Source-Drain Diode Forward Voltage
12
5.0
Fig11. Maximum Safe Operating Area
Typical VGS(th) Gate threshold Voltage (V)
ID = 1.0A
10
4.5
ID = 1.0mA ID = 250A ID = 150A
ID , Drain Current (A)
8
4.0
6
3.5
4
3.0
2
2.5
0 25 50 75 100 125 150
2.0 -50 -25 0 25 50 75 100 125 150
TA , Ambient Temperature (C)
TJ , Junction Temperature ( C )
Fig 12. Maximum Drain Current vs. Ambient Temperature
1000
Fig 13. Typical Threshold Voltage vs. Junction Temperature
ID 2.8A 3.3A BOTTOM 6.2A
TOP
EAS, Single Pulse Avalanche Energy (mJ)
800
600
400
200
0 25 50 75 100 125 150
Starting TJ, Junction Temperature (C)
Fig 14. Maximum Avalanche Energy Vs. Drain Current
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IRF6644
Current Regulator Same Type as D.U.T.
Id Vds
50K 12V .2F .3F
Vgs
D.U.T. VGS
3mA
+ V - DS
Vgs(th)
IG
ID
Current Sampling Resistors
Qgs1 Qgs2
Qgd
Qgodr
Fig 15a. Gate Charge Test Circuit
Fig 15b. Gate Charge Waveform
V(BR)DSS
15V
tp
DRIVER
VDS
L
RG
VGS 20V
D.U.T
IAS tp
+ V - DD
A
0.01
I AS
Fig 16c. Unclamped Inductive Waveforms
Fig 16b. Unclamped Inductive Test Circuit
VDS VGS RG
RD
90%
D.U.T.
+
VDS
- VDD
10%
VGS
td(on) tr td(off) tf
10V
Pulse Width 1 s Duty Factor 0.1 %
Fig 17a. Switching Time Test Circuit
Fig 17b. Switching Time Waveforms
6
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IRF6644
D.U.T
Driver Gate Drive
+
P.W.
Period
D=
P.W. Period VGS=10V
+
Circuit Layout Considerations * Low Stray Inductance * Ground Plane * Low Leakage Inductance Current Transformer
*
D.U.T. ISD Waveform Reverse Recovery Current Body Diode Forward Current di/dt D.U.T. VDS Waveform Diode Recovery dv/dt
-
-
+
RG
* * * * di/dt controlled by RG Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test
VDD
VDD
+ -
Re-Applied Voltage
Body Diode
Forward Drop
Inductor Curent Inductor Current
Ripple 5% ISD
* VGS = 5V for Logic Level Devices Fig 18. Diode Reverse Recovery Test Circuit for N-Channel HEXFET(R) Power MOSFETs
DirectFET Substrate and PCB Layout, MN Outline (Medium Size Can, N-Designation).
Please see DirectFET application note AN-1035 for all details regarding the assembly of DirectFET. This includes all recommendations for stencil and substrate designs.
6 5 7
3 4
1
1- Drain 2- Drain 3- Source 4- Source 5- Gate 6- Drain 7- Drain
2
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IRF6644
DirectFET Outline Dimension, MN Outline (Medium Size Can, N-Designation).
Please see DirectFET application note AN-1035 for all details regarding the assembly of DirectFET. This includes all recommendations for stencil and substrate designs.
DIMENSIONS NOTE: CONTROLLING DIMENSIONS ARE IN MM
METRIC MAX CODE MIN 6.35 A 6.25 5.05 B 4.80 3.95 C 3.85 0.45 D 0.35 0.92 E 0.88 0.82 F 0.78 1.42 G 1.38 0.92 H 0.88 0.52 J 0.48 1.29 K 1.16 2.91 L 2.74 0.70 M 0.59 0.08 N 0.03 0.17 P 0.08 IMPERIAL MIN 0.246 0.189 0.152 0.014 0.034 0.031 0.054 0.034 0.019 0.046 0.109 0.023 0.001 0.003 MAX 0.250 0.201 0.156 0.018 0.036 0.032 0.056 0.036 0.020 0.051 0.115 0.028 0.003 0.007
DirectFET Part Marking
8
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IRF6644
DirectFET Tape & Reel Dimension (Showing component orientation).
NOTE: Controlling dimensions in mm Std reel quantity is 4800 parts. (ordered as IRF6644). For 1000 parts on 7" reel, order IRF6644TR1 REEL DIMENSIONS TR1 OPTION (QTY 1000) STANDARD OPTION (QTY 4800) IMPERIAL IMPERIAL METRIC METRIC MIN CODE MIN MAX MAX MIN MIN MAX MAX 12.992 6.9 A N.C N.C 330.0 177.77 N.C N.C 0.795 B 0.75 N.C 20.2 19.06 N.C N.C N.C 0.504 0.53 C 0.50 0.520 12.8 13.5 12.8 13.2 0.059 D 0.059 1.5 1.5 N.C N.C N.C N.C 3.937 E 2.31 100.0 58.72 N.C N.C N.C N.C N.C F N.C 0.53 N.C N.C 0.724 13.50 18.4 G 0.488 0.47 N.C 12.4 11.9 0.567 12.01 14.4 H 0.469 0.47 11.9 11.9 0.606 N.C 12.01 15.4
Data and specifications subject to change without notice. This product has been designed and qualified for the Consumer market. Qualification Standards can be found on IR's Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105 TAC Fax: (310) 252-7903 Visit us at www.irf.com for sales contact information.12/04
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