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MITSUBISHI PM15CNJ060 PM15CNJ060 FLAT-BASE TYPE FLAT-BASE TYPE INSULATED PACKAGE INSULATED PACKAGE PM15CNJ060 * 3 phase IGBT (15A/600V) inverter output * Monolithic gate drive & protection logic circuit * Protection logic * Over circuit (OC) * Short circuit (SC) * Over temperature (OT) * Under voltage lock-out (UV) * UL Recognized File No. E80271 Yellow Card No. E80276 APPLICATION General purpose inverter, servo drives and other motor controlers PACKAGE OUTLINES Dimensions in mm 94.5 1 76 2.54!23=58.42 0.5 (13.04) 2.54 0.25 7.62 7.62 7.62 1234 5678 9 10 11 12 13 14 15 16 17 18 5.5 Terminal code 1. 2. 3. 4. 5. 6. 7. 8. 9. 10. 11. 12. VUPC NC UP VUP1 VVPC NC VP VVP1 VWPC NC WP VWP1 13. 14. 15. 16. 17. 18. 19. 20. 21. 22. 23. VNC VN1 UN VN WN FO P N U V W 1.5 0.5 33.6 0.8 0.5 2-4.5 19 P 20 N 21 U 22 V 23 W 2-R5 (14.25) 14 0.25 56 0.5 71 84.5 0.5 B A 3.5 0.5 5.5 5.5 2.5 44 1 25.7 19 10.5 NC : No Connect 2 0.1 0.6 0.1 LABEL 8 0.5 3.5 18 1 (t = 0.5) (t = 0.4) A:Detail B:Detail Jan. 2000 MITSUBISHI PM15CNJ060 FLAT-BASE TYPE INSULATED PACKAGE INTERNAL FUNCTIONS BLOCK DIAGRAM WP VNC VN1 Fo WN VN UN VWPC VWP1 NC VVPC VP NC VVP1 VUPC UP NC VUP1 Rfo GND Vcc Fo WN VN UN Tb Tc SWN OWN SVN OVN SUN OUN GND GND Si OUT GND Si OUT GND Si OUT GND In Vcc GND In Vcc GND In Vcc Rfo=1.5k N W V U P MAXIMUM RATINGS (Tj = 25C, unless otherwise noted) INVERTER PART Symbol VCES IC ICP PC Tj Parameter Collector-Emitter Voltage Collector Current Collector Current (Peak) Collector Dissipation Junction Temperature Condition VD = 15V, VCIN = 15V TC = 25C TC = 25C TC = 25C Ratings 600 15 30 43 -20 ~ +125 Unit V A A W C The item defines the maximum junction temperature for the power elements (IGBT/Diode) of the IPM to ensure safe operation. However, these power elements can endure junction temperature as high as 150C instantaneously. To make use of this additional temperature allowance, a detailed study of the exact application conditions is required and, accordingly, necessary information is requested to be provided before use. CONTROL PART Symbol VD VCIN VFO IFO Parameter Supply Voltage Input Voltage Fault Output Supply Voltage Fault Output Current Condition Applied between : VUP1-VUPC VVP1-VVPC, VWP1-VWPC, VN1-VNC Applied between : UP-VUPC, VP-VVPC WP-VWPC, UN * VN * WN-VNC Applied between : FO-VNC Sink current at FO terminals Ratings 20 20 20 20 Unit V V V mA Jan. 2000 MITSUBISHI PM15CNJ060 FLAT-BASE TYPE INSULATED PACKAGE TOTAL SYSTEM Parameter Supply Voltage Protected VCC(PROT) by SC VCC(surge) Supply Voltage Module Case Operating TC Temperature Tstg Storage Temperature Viso Isolation Voltage Symbol Condition VD = 13.5 ~ 16.5V, Inverter Part, Tj = 125C Start Applied between : P-N, Surge value (Note-1) Ratings 400 500 -20 ~ +100 -40 ~ +125 60Hz, Sinusoidal Charged part to Base, AC 1 min. 2500 Unit V V C C Vrms (Note-1) Tc measurement point Tc ELECTRICAL CHARACTERISTICS (Tj = 25C, unless otherwise noted) INVERTER PART Symbol VCE(sat) VEC ton trr tc(on) toff tc(off) ICES Parameter Collector-Emitter Saturation Voltage FWDi Forward Voltage Test Condition VD = 15V, IC = 15A (Fig. 1) VCIN = 0V, Pulsed -IC = 15A, VD = 15V, VCIN = 15V VD = 15V, VCIN = 0V15V VCC = 300V, IC = 15A Tj = 125C, Inductive Load (Upper-Lower Arm) VCE = VCES, VD = 15V (Fig. 4) Tj = 25C Tj = 125C (Fig. 2) Min. -- -- -- 0.3 -- -- -- -- -- -- Limits Typ. 1.8 1.9 2.0 0.7 0.15 0.35 1.5 0.4 -- -- Max. 2.5 2.6 3.0 1.6 0.5 1.0 2.3 1.2 1 10 Unit V V s s s s s mA Switching Time (Fig. 3) Tj = 25C Tj = 125C Collector-Emitter Cutoff Current Jan. 2000 MITSUBISHI PM15CNJ060 FLAT-BASE TYPE INSULATED PACKAGE CONTROL PART Symbol ID Vth(ON) Vth(OFF) OC SC toff(OC) OT OTr UV UVr IFO(H) IFO(L) tFO Parameter Circuit Current Input ON Voltage Input OFF Voltage Over Current Trip Level Short Circuit Trip Level Over Current Delay Time Over Temperature protection Supply Circuit Under-Voltage Protection Fault Output Current Minimum Fault Output Pulse Width Test Condition VN1-VNC VXP1-VXPC Applied between : UP-VUPC, VP-VVPC, WP-VWPC UN * VN * WN-VNC -20 Tj 125C, VD = 15V (Fig. 5,6) (Fig. 5,6) -20 Tj 125C, VD = 15V (Fig. 5,6) VD = 15V Trip level VD = 15V Reset level Trip level -20 Tj 125C Reset level VD = 15V, VCIN = 15V VD = 15V, VCIN = 15V VD = 15V (Note-2) (Note-2) Min. -- -- 1.2 1.7 18 -- -- 100 -- 11.5 -- -- -- 1.0 Limits Typ. 18 7 1.5 2.0 26 39 10 110 90 12.0 12.5 -- 10 1.8 Max. 25 10 1.8 2.3 -- -- -- 120 -- 12.5 -- 0.01 15 -- Unit mA V V A A s C C V V mA mA ms (Note-2) Fault output is given only when the internal SC, OT & UV protections schemes of either upper or lower arm device operate to protect it. THERMAL RESISTANCES Symbol Rth(j-c)Q Rth(j-c)F Rth(c-f) Parameter Junction to case Thermal Resistances Contact Thermal Resistance Test Condition Inverter IGBT part (per 1/6 module) Inverter FWDi part (per 1/6 module) Case to fin, (per 1 module) Thermal grease applied Min. -- -- -- Limits Typ. -- -- -- Max. 2.9 4.5 0.5 Unit C/W C/W C/W MECHANICAL RATINGS AND CHARACTERISTICS Symbol -- -- Parameter Mounting torque Weight Mounting part -- Test Condition screw : M4 Min. 0.98 10 -- Limits Typ. 1.18 12 60 Max. 1.47 15 -- Unit N*m kg * cm g RECOMMENDED CONDITIONS FOR USE Symbol VCC VD VCIN(ON) VCIN(OFF) fPWM tdead Parameter Supply Voltage Control Supply Voltage Input ON Voltage Input OFF Voltage PWM Input Frequency Arm Shoot-through Blocking Time Test Condition Applied across P-N terminals Applied between : VUP1-VUPC, VVP1-VVPC VWP1-VWPC, VN1-VNC (Fig. 3) (Note-3) Recommended value 400 15 1.5 0.8 4.0 15 2 Unit V V V kHz s Applied between : UP-VUPC, VP-VVPC, WP-VWPC UN * VN * WN-VNC Using Application Circuit of Fig. 8 For IPM's each input signals (Fig. 7) (Note-3) With ripple satisfying the following conditions dv/dt swing 5V/s, Variation 2V peak to peak Jan. 2000 MITSUBISHI PM15CNJ060 FLAT-BASE TYPE INSULATED PACKAGE PRECAUTIONS FOR TESTING 1. Before appling any control supply voltage (VD), the input signals should be low level. After this, each input signal should be set to the specified ON and OFF level. 2. When performing "SC" tests, the turn-off surge voltage spike at the corresponding protection operation should not be allowed to rise above VCC(surge) rating of the device. (These test should not be done by using a curve tracer or its equivalent.) P, (U,V,W) P, (U,V,W) VCIN (0V) V Ic VCIN (15V) V -Ic VD (all) U,V,W, (N) VD (all) U,V,W, (N) Fig. 1 VCE(sat) Test a) Lower Arm Switching Signal input (Upper Arm) VCIN Signal input (Lower Arm) N P Fig. 2 VEC Test trr U,V,W Irr Vcc 90% Vce Ic 90% b) Upper Arm Switching VCIN Signal input (Upper Arm) Signal input (Lower Arm) VD (all) P Ic VCIN U,V,W 10% tc (on) tc (off) 10% Vcc td (on) tr td (off) tf ton= td (on) + tr N toff= td (off) + tf VD (all) Ic Fig. 3 Switching time Test circuit and waveform P, (U,V,W) A Signal Input VCIN (15V) Pulse VCE VCIN Over Current (oc) VD (all) U,V,W, (N) IC toff (OC) Constant Current OC Fig. 4 ICES Test P, (U,V,W) Signal Input VCIN VCC Short Over Current (sc) SC IC VD (all) U,V,W, (N) IC Constant Current toff (OC) Fig. 5 OC and SC Test Fig. 6 OC and SC Test waveform P VD VCINP U,V,W Vcc VD VCINN N Ic VCINP 0V VCINN 0V t t tdead tdead Fig. 7 Dead time measurement point example Jan. 2000 MITSUBISHI PM15CNJ060 FLAT-BASE TYPE INSULATED PACKAGE P + VD1 4 2 3 1 8 6 7 5 12 10 11 9 VUP1 NC UP VUPC VVP1 NC VP VVPC VWP1 NC WP VWPC Vcc OUT Si 19 + - In GND GND U 21 + Vcc OUT Si VD2 In GND GND V 22 M + Vcc OUT Si VD3 In GND GND W 23 + UN UN VN VN OUN SUN GND Tb Tc N 20 + WN WN OVN SVN Fo Fo VN1 OWN SWN VD4 + VNC Vcc GND Fig. 8 Application Example Circuit NOTES FOR STABLE AND SAFE OPERATION ; Design the PCB pattern to minimize wiring length between opto-coupler and IPM's input terminal, and also to minimize the stray capacity between the input and output wirings of opto-coupler. Connect low impedance capacitor between the Vcc and GND terminal of each fast switching opto-coupler. Fast switching opto-couplers : tPLH, tPHL 0.8s, Use High CMR type. Slow switching opto-coupler : CTR > 100% Use 4 isolated control power supplies (VD). Also, care should be taken to minimize the instantaneous voltage charge of the power supply. Make inductance of DC bus line as small as possible, and minimize surge voltage using snubber capacitor between P and N terminal. Use line noise filter capacitor (ex. 4.7nF) between each input AC line and ground to reject common-mode noise from AC line and improve noise immunity of the system. * * * * * * * Jan. 2000 |
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