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SSTX4915 Preliminary Description The SSTX4915 is a low power ASK transmitter IC intended for applications in the North American and European VHF/UHF bands. The integrated voltage-controlled oscillator (VCO), phase/frequency detector, prescaler, and reference oscillator require only the addition of an external crystal to provide a complete phase-locked loop (PLL). In addition to the standard power-down mode, the chip also includes an automatic lock-detect feature that disables the transmitter output when the PLL is out-of-lock. Features Output frequency range: 100 - 960 MHz Supply voltage range: 2.2 - 3.6 V Low current consumption with power down capability On-chip VCO with integrated PLL (/ 64/128) dual modulus prescaler Out-of-lock inhibit circuit SSOP-16 package (0.64 mm pitch) Applications Wireless mouse Car alarm and home security systems Remote control systems Block Diagram SW 16 LD 15 DO 14 RES 13 RES 12 NC 11 VSS2 10 VCC2 9 LD VCO PFD and CP Prescaler / 64/128 OSC BIAS 2 3 AMP 1 OSC IN 4 5 6 7 8 OSC OUT TXEN VSS TXOUT VSS1 VCC1 MODIN Rev.2.02 8/06/2003 www.SiliconStandard.com 1 of 9 SSTX4915 Pin Descriptions Number 1 2 3 4 5 6 7 8 9 10 11 12 13 14 Name OSCIN OSCOUT TXEN VSS TXOUT VSS1 VCC1 MODIN VCC2 VSS2 NC RES Differential open collector VCO outputs. RES DO Output of the charge pump. An R-C network from this pin to ground is used to establish the PLL bandwidth. Lock detector output. This pin is used to set the threshold of the lock detect circuitry which enables or disables the transmit amplifier. A shunt capacitor should be used to set an R-C time constant with the on-chip series 1k resistor. The time constant should be set to approximately 15 times the reference period. Prescaler modulus control input (SW = high = / 64; SW = low = / 128). Description This pin is connected directly to the base of the reference oscillator transistor. The reference oscillator uses a modified Colpitts configuration. This pin is connected directly to the emitter of the reference oscillator transistor. Transmitter enable control (TXEN = low = power down mode; TXEN = high = normal operation mode). Ground connection for the transmit output amplifier. Transmitter output. This pin is an open collector and requires a pull-up inductor for bias/matching and a tapped capacitor for matching. Ground connection for the transmit driver amplifier. Nominal supply voltage for the transmit driver amplifier. ASK modulation input. An external resistor RMODIN to supply voltage is used to bias the entire transmit amplifier chain through this pin. Nominal supply voltage for the VCO and PLL circuitry. Ground connection for the PLL circuitry. No connection. 15 LD 16 SW OSCIN 1 OSCOUT 2 TXEN 3 VSS 4 TXOUT 5 VSS1 6 VCC1 7 MODIN 8 16 SW 15 LD 14 DO 13 RES 12 RESB 11 VREFP 10 VSS2 9 Rev.2.02 8/06/2003 www.SiliconStandard.com SSTX4915 VCC2 2 of 9 SSTX4915 Absolute Maximum Ratings VSS, VSS1, VSS2 = 0V Parameter Supply voltage range Power-down voltage MODIN voltage Operating ambient temperature Storage temperature Rating -0.3 to +3.6 -0.3 to VCC -0.3 to +1.1 -40 to +85 -40 to +150 Unit V V V C C Recommended Operating Conditions VSS, VSS1, VSS2 = 0V Value Parameter Supply voltage range Operating temperature Symbol min. VCC TA 2.2 -10 typ. 3.0 +25 max. 3.6 +60 V o Unit C Rev.2.02 8/06/2003 www.SiliconStandard.com 3 of 9 SSTX4915 Electrical Characteristics (VCC = 3V, VSS, VSS1, VSS2 = 0V, TXEN = high, TA = 25C, and fRF = 433.92MHz unless otherwise noted) Value Parameter Power supply Supply voltage Total DC current (normal operation) Total DC current (power-down mode) VCC ICC 50% duty cycle, 10kHz data applied to the MODIN pin (RMODIN = 10k) TXEN = low 2.2 3.0 10.5 3.6 V mA A Symbol Condition min. typ. max. Unit Istandby 1 Overall RF input frequency range Modulation Modulation frequency Output power ON/OFF ratio PLL Prescaler divide ratio SW = high = /64 SW = low = /128 KVCO Frequency and board layout dependent 10 KHz offset, 50 KHz loop BW Phase noise 100 KHz offset, 50 KHz loop BW 2nd harmonic 3rd harmonic Reference frequency Crystal frequency spurs Charge pump current ICP 50 KHz PLL loop BW -100 -90 -30 -40 7 -50 100 dBc/Hz dBc dBc MHz dBc A 64 20 -80 128 MHz/V dBc/Hz fMOD POUT 50 load 1 8 70 fRF 100 ASK 100 kHz dBm dB 960 MHz VCO gain Stand-by mode control Transmitter enable/disable voltage Turn-on time Turn-off time TXEN = high = normal operation TXEN = low = power-down mode 1 1 Vcc - 0.3 V 0.3 2 2 V V ms ms Rev.2.02 8/06/2003 www.SiliconStandard.com 4 of 9 SSTX4915 Functional Description The SSTX4915 is a low-power ASK transmitter IC designed for applications operating within the frequency range of 100 to 960 MHz. In particular, it is intended for transmitter applications in 315/433 MHz band remote keyless entry and 868/915 MHz ISM-band systems. In addition, the SSTX4915 possesses a PLL-only mode which allows it to be simply used as a local oscillator source. The integrated voltage-controlled oscillator (VCO), phase/frequency detector, prescaler, and reference oscillator require only the addition of an external crystal to provide a complete phase-locked loop. In addition to the normal operation mode, the chip also includes an automatic lock-detect feature that disables the transmitter output when the PLL is outof-lock. Reference crystal oscillator The OSCIN and OSCOUT inputs (pins 1 and 2) provide connections to an on-chip transistor which may be used to implement a Colpitts crystal oscillator. The Colpitts oscillator configuration is a low parts count topology which achieves reasonable phase noise performance. Optionally, an external signal may be accoupled into the OSCIN pin to provide a reference source. The OSCIN input drive level should be near 500 mVpk-pk to prevent overdriving the on-chip transistor in order to keep the phase noise and reference spurs to a minimum. Voltage controlled oscillator The VCO uses a tuned differential amplifier topology with the bases and collectors cross-coupled to provide positive feedback and the necessary 360 phase shift. A tuned circuit is connected to the open collector outputs and is comprised of both on-chip varactors and user-selectable off-chip inductors. The choice of inductor values determines the frequency band of operation. Dual-modulus prescaler A series of flip-flops divides the VCO frequency by either 64 or 128, depending upon the logic level of the SW input (pin 16). SW = high will select the / 64 mode and SW = low will select the / 128 mode. The divided-down signal is then applied to the phase/frequency detector where its phase/frequency is compared with the phase/frequency of the crystal reference. Phase/frequency detector and charge pump The phase/frequency detector (PFD) is implemented using the "tri-state comparator" topology while the charge pump (CP) consists of a current source and sink for charging and discharging the off-chip loop filter. When the VCO and reference inputs to the PFD are both phase- and frequency-locked, the CP output enters a high impedance state. Otherwise, the CP will either charge or discharge the loop filter. Out-of-lock inhibit circuitry The out-of-lock inhibit circuitry is used to disable the transmitter output when the VCO is not locked to the reference oscillator and comply with regulatory limits during the unlocked condition. An off-chip shunt capacitor connected to the LD output (pin 15) is used to set an R-C time constant (together with an on-chip series 1 K. resistor.) This time constant should be set to be approximately 15 times the reference period. Rev.2.02 8/06/2003 www.SiliconStandard.com 5 of 9 SSTX4915 Transmit amplifier chain A transmit amplifier chain consists of a driver amplifier followed by an open collector output stage. The open collector TXOUT output (pin 5) requires an external pull-up inductor for bias. This inductor may be used as part of an L-C matching circuit for transforming the amplifier output impedance to that of an external loop antenna. To achieve optimum power-added efficiency, the peak-to-peak RF voltage swing at the TXOUT pin should be twice the supply voltage. Also, the output amplifier has its own ground pin (VSS) in order to improve isolation. The transmitter chain is designed for amplitude-shift-keying/on-off keying (ASK/OOK), with the modulation data provided at the MODIN input (pin 8). When V MODIN > 0.7 V, an output signal is transmitted, and when V MODIN <0.7 V, no output signal is transmitted. Operation modes The table below summarizes the TX4915's three operating modes -- power-down, PLL-only and transmit, which are controlled by the TXEN and MODIN inputs. TXEN L H H MODIN L L > 0.7 V Operation Mode Power-down PLL-only Transmit Rev.2.02 8/06/2003 www.SiliconStandard.com 6 of 9 SSTX4915 Application Circuits fRF = 315 MHz A B C D E 4 VCC 4 X1 4.921 C4 100P C3 100P ANT1 ANTENNA C9 L3 82nH 3 C5 100P VCC 1 OSC1 64/128 16 C10 220P 2 OSC2 LD 15 C2 2.2N R3 10K R5 R1 L1 12 120nH R2 1K8 10 R6 1K8 C12 100P 10n 3.3uF C13 C1 10 VCC_3V 3 3 47P C11 6P8 TXEN DO 14 U1 C7 3P3 R9 L2 330nH C18 10n C6 220P 4 VSS RESB 13 5 10 PA OUT SSTX4915 RES NC 6 VSS1 11 7 VCC VSS2 DATA R4 18K C8 220P R7 C16 100P C17 10n 10 8 MOD IN VCC2 9 C14 100P C15 10n 10 2 2 1 1 Title SSTX4915-Z ASK 315MHz Size B Date: A B C D Document Number {Doc} Thursday, June 12, 2003 Sheet E Rev {RevCode} 1 of 1 fRF = 434 MHz A B C D E VCC X1 4 4 6.78 C4 100P C3 100P ANT1 ANTENNA C9 L3 56nH 47P C11 5P6 C7 2P2 R9 L2 330nH C18 10n C5 100P VCC 1 OSC1 64/128 16 C10 4P7 2 OSC2 LD 15 C2 56P R3 100K R5 VCC_3V 3 TXEN DO 14 U1 4 VSS RESB 13 L1 12 5 10 C6 220P PA OUT SSTX4915 RES NC 33nH R8 100 C13 C12 100P 10n 3.3uF C1 10 6 VSS1 11 L4 33nH 3 3 7 VCC VSS2 10 DATA R4 10K C8 220P R7 C16 100P C17 10n 10 8 MOD IN R6 VCC2 9 C14 100P C15 10n 10 2 2 1 1 Title SSTX4915-Z ASK 434MHz Size B Date: A B C D Document Number {Doc} Thursday, June 19, 2003 Sheet E Rev {RevCode} 1 of 1 Rev.2.02 8/06/2003 www.SiliconStandard.com 7 of 9 SSTX4915 Application Circuits (cont.) fRF = 868 MHz A B C D E VCC 4 4 X1 13.577 C4 100P C3 100P ANT1 ANTENNA C9 L3 27nH 22P C11 0.82P C7 R9 2.2P L2 180nH C18 10n C5 100P VCC 1 OSC1 64/128 16 C10 220P 2 OSC2 LD 15 C2 2.2N R3 10K R5 VCC_3V 3 TXEN DO 14 U1 4 VSS RESB 13 L1 12 5 10 C6 220P PA OUT 3 SSTX4915 RES NC 6.8nH R8 100 C13 C12 100P 10n 3.3uF C1 10 3 6 VSS1 11 L4 6.8nH 7 VCC VSS2 10 DATA R4 3K3 C8 220P R7 C16 100P C17 10n 10 8 MOD IN R6 VCC2 9 C14 100P C15 10n 10 2 2 1 1 Title {Title} Size B Date: A B C D Document Number {Doc} Wednesday, June 25, 2003 Sheet E Rev {RevCode} 1 of 1 Rev.2.02 8/06/2003 www.SiliconStandard.com 8 of 9 SSTX4915 Package Dimensions Dimensions in mm Symbol min. A A1 A2 b C D E E1 e L y Dimensions in inches max. 1.75 0.25 -- 0.30 0.25 5.00 6.20 4.00 -- 1.27 0.10 8 min. 0.053 0.004 -- 0.008 0.007 0.189 0.228 0.150 -- 0.016 -- 0 nom. 0.064 -- 0.057 0.010 -- -- -- -- 0.025 -- -- -- max. 0.069 0.010 -- 0.012 0.010 0.197 0.244 0.157 -- 0.050 0.004 8 nom. 1.60 -- 1.45 0.25 -- -- -- -- 0.64 -- -- -- 1.35 0.10 -- 0.20 0.19 4.80 5.80 3.80 -- 0.40 -- 0 Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no guarantee or warranty, express or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of Silicon Standard Corporation or any third parties. Rev.2.02 8/06/2003 www.SiliconStandard.com 9 of 9 |
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