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| STP16CP596 Table 2: Typical Current Accuracy Output Voltage 0.1V 0.15V 0.25V 0.5V 1.2V 1.4V Output Current 3 mA/VCC = 5V 5 mA/VCC = 5V 10 mA/VCC = 5V 20 mA/VCC = 5V 40 mA/VCC = 5V 50 mA/VCC = 5V Between Bits 3% 2% 2% 1% 1% 1% Between ICs 6% 6% 6% 6% 6% 6% Figure 1: Pin Connection (Note 1) Note 1: The exposed Pad is electrically not connected. Table 3: Pin Description PIN N 1 2 3 4 5-20 21 22 23 24 Symbol GND SDI CLK /LE OUT 0-15 /OE SDO R-EXT VDD Name and Function Ground Terminal Serial data input terminal Clock input terminal Latch input terminal Output terminal Input terminal of output enable (active low) Serial data out terminal Input terminal of an external resistor for constant current programing Supply voltage terminal 2/18 STP16CP596 Table 4: Absolute Maximum Ratings Symbol VDD VO IO VI IGND fCLK TOPR TSTG Supply Voltage Output Voltage Output Current Input Voltage GND Terminal Current Clock Frequency Operating Temperature Range Storage Temperature Range Parameter Value 0 to 7 -0.5 to 16 50 -0.4 to VDD+0.4 800 25 -40 to +125 -65 to +150 Unit V V mA V mA MHz C C Absolute Maximum Ratings are those values beyond which damage to the device may occur. Under these conditions, functional operation is not implied. Table 5: Thermal Data Symbol Parameter DIP-24 60 SO-24 75 TSSOP24 85 TSSOP24 (*) (exposed pad) 37.5 Unit C/W Rthj-amb Thermal Resistance Junction-ambient (*) The exposed pad should be soldered directly to the PCB to realize the thermal benefits. Table 6: Recommended Operating Conditions Symbol VDD VO IO IOH IOL VIH VIL twLAT twCLK twEN tHOLD(D) tREM(L) fCLK Parameter Supply Voltage Output Voltage Output Current Output Current Output Current Input Voltage Input Voltage /LE Pulse Width CLK Pulse Width /OE Pulse Width Hold Time for DATA Removal Time for LATCH Clock Frequency Cascade Operation VDD = 3.0 to 3.6V OUTn SERIAL-OUT SERIAL-OUT 0.7VDD -0.3 20 20 400 20 15 15 25 3 Test Conditions Min. 3.0 Typ. Max. 5.5 16.0 50 +1 -1 VDD+0.3 0.3VDD Unit V V mA mA mA V V ns ns ns ns ns ns MHz tSETUP(D) Setup Time for DATA 3/18 STP16CP596 Table 7: Electrical Characteristics (VDD=3.3V to 5V, T = 25C, unless otherwise specified.) Symbol VIH VIL IOH VOL VOH IOL1A IOL2A IOL1A IOL2A IOL1B IOL2B IOL1B IOL2B RSIN(up) Output Current Error between bit (All Output ON) Pull-up Resistor REXT = OPEN OUT 0 to 15 = OFF REXT = 6.2K OUT 0 to 15 = OFF REXT = 1K Supply Current (ON) REXT = 1K OUT 0 to 15 = OFF OUT 0 to 15 = ON REXT = 6.2K OUT 0 to 15 = ON Output Current Error between bit (All Output ON) Output Current Parameter Input Voltage High Level Input Voltage Low Level Output Leakage Current VOH = 16 V VDD-0.4V 2.85 19.6 3 20 4 2 2.9 19.6 3 20 2 1 150 100 300 200 0.3 1 3 1 3 3.15 20.4 6 3 3.1 20.4 3.5 2 600 400 Output Voltage (Serial-OUT) IOL = 1mA Output Voltage (Serial-OUT) IOH = -1mA Output Current VO = 0.2V, REXT=6.2K, VDD=3.3V VO = 0.5V, REXT=1K, VDD = 3.3V VO = 0.2V, REXT=6.2K, VDD=3.3V VO = 0.5V, REXT=1K, VDD = 3.3V VO = 0.2V, REXT=6.2K, VDD=5V VO = 0.5V, REXT=1K, VDD = 5V VO = 0.2V, REXT=6.2K, VDD=5V VO = 0.5V, REXT=1K, VDD = 5V Test Conditions Min. 0.7VDD GND Typ. Max. VDD 0.3VDD 10 0.4 Unit V V A V V mA mA % % mA mA % % K K mA RSIN(down) Pull-down Resistor IDD(OFF1) Supply Current (OFF) IDD(OFF2) IDD(OFF3) IDD(ON1) IDD(ON2) Table 8: Switching Characteristics (VDD=3V, T = 25C, unless otherwise specified.) Symbol tPLH1 tPLH2 tPLH3 tPLH tPHL1 tPHL2 tPHL3 tPHL tON tOFF Parameter Test Conditions Min. Typ. 250 220 200 25 25 25 50 25 260 50 Max. 280 250 250 50 50 50 70 50 400 80 Unit ns ns ns ns ns ns ns ns ns ns VDD = 3 V Propagation Delay Time, VIH = VDD CLK-OUTn, /LE = H, /OE = L VIL = GND CL = 13pF Propagation Delay Time, VL = 3 V IO = 40mA /LE-OUTn, /OE = L Propagation Delay Time, REXT = 470 RL = 65 /OE-OUTn, /LE = H Propagation Delay Time, CLK-SDO Propagation Delay Time, CLK-OUTn, /LE = H, /OE = L Propagation Delay Time, /LE-OUTn, /OE = L Propagation Delay Time, /OE-OUTn, /LE = H Propagation Delay Time, CLK-SDO Output Rise Time 10 ~ 90% of voltage waveform Output Fall Time 90 ~ 10% of voltage waveform 4/18 STP16CP596 EQUIVALENT CIRCUIT OF INPUTS AND OUTPUTS Figure 2: /OE Terminal Figure 3: /LE Terminal Figure 4: CLK, SDI Terminal 5/18 STP16CP596 Figure 5: SDO Terminal Figure 6: Block Diagram 6/18 STP16CP596 Table 9: Truth Table CLOCK /LE H L H X X /OE L L L L L SERIAL-IN Dn Dn + 1 Dn + 2 Dn + 3 Dn + 3 OUT0 .................. OUT7 .................. OUT15 Dn ..... Dn - 7 ..... Dn -15 No Change Dn - 2 ..... Dn - 5 ..... Dn -13 Dn - 2 ..... Dn - 5 ..... Dn -13 OFF SDO Dn - 15 Dn - 14 Dn - 13 Dn - 13 Dn - 13 Note 1: OUT0 to OUT15 = ON when Dn = H; OUT0 to OUT15 = OFF when Dn = L. Figure 7: Timing Diagram Note: The latches circuit holds data when the LE terminal is Low. When LE terminal is at High level, latch circuit doesn't hold the data it passes from the input to the output. When OE terminal is at Low level, output terminals OUT0 to OUT15 respond to the data, either ON or OFF. When OE terminal is at High level, it switches off all the data on the output terminal. 7/18 STP16CP596 Figure 8: Clock, Serial-in, Serial-out Figure 9: Clock, Serial-in, Latch, Enable, Outputs 8/18 STP16CP596 Figure 10: Outputs TEST CIRCUIT Figure 11: DC Characteristic Figure 12: AC Characteristic 9/18 STP16CP596 Figure 13: Output Current-R EXT Resistor Figure 15: Output Current vs Dropout Voltage Figure 14: Power Dissipation vs Temperature Package Figure 16: Output Current vs IOL(%) 10/18 STP16CP596 Plastic DIP-24 (0.25) MECHANICAL DATA mm. DIM. MIN. A A1 A2 B B1 c D E E1 e E1 L M 3.18 0 0.41 1.40 0.20 31.62 7.62 6.35 6.60 2.54 7.62 3.43 15 0.125 0 0.38 3.3 0.46 1.52 0.25 31.75 0.51 1.65 0.30 31.88 8.26 6.86 0.016 0.055 0.008 1.245 0.300 0.250 0.260 0.100 0.300 0.135 15 TYP MAX. 4.32 0.015 0.130 0.018 0.060 0.010 1.250 0.020 0.065 0.012 1.255 0.325 0.270 MIN. TYP. MAX. 0.170 inch E E1 A1 A2 Stand-off B B1 e e1 L A c D 24 13 .015 0,38 Gage Plan e 1 12 M 0034965/D 11/18 STP16CP596 SO-24 MECHANICAL DATA DIM. A A1 B C D E e H h L k ddd 10.00 0.25 0.4 0 mm. MIN. 2.35 0.1 0.33 0.23 15.20 7.4 1.27 10.65 0.75 1.27 8 0.100 0.394 0.010 0.016 0 TYP MAX. 2.65 0.30 0.51 0.32 15.60 7.6 MIN. 0.093 0.004 0.013 0.009 0.598 0.291 0.050 0.419 0.030 0.050 8 0.004 inch TYP. MAX. 0.104 0.012 0.020 0.013 0.614 0.299 0070769C 12/18 STP16CP596 TSSOP24 EXPOSED PAD MECHANICAL DATA mm. DIM. MIN. A A1 A2 b c D D1 E E1 E2 e K L 0 0.45 0.60 0.8 0.19 0.09 7.7 2.7 6.2 4.3 1.5 0.65 8 0.75 0 0.018 0.024 6.4 4.4 6.6 4.5 7.8 1 TYP MAX. 1.2 0.15 1.05 0.30 0.20 7.9 0.031 0.007 0.004 0.303 0.106 0.244 0.169 0.059 0.0256 8 0.030 0.252 0.173 0.260 0.177 0.307 0.004 0.039 MIN. TYP. MAX. 0.047 0.006 0.041 0.012 0.0089 0.311 inch 7100778C 13/18 STP16CP596 TSSOP24 MECHANICAL DATA mm. DIM. MIN. A A1 A2 b c D E e H K L 6.25 0 0.50 0.19 0.09 7.7 4.3 0.65 BSC 6.5 8 0.70 0.246 0 0.020 0.05 0.9 0.30 0.20 7.9 4.5 0.0075 0.0035 0.303 0.169 0.0256 BSC 0.256 8 0.028 TYP MAX. 1.1 0.15 0.002 0.035 0.0118 0.0079 0.311 0.177 MIN. TYP. MAX. 0.043 0.006 inch A A2 A1 b e K c L H D E PIN 1 IDENTIFICATION 1 7047476B 14/18 STP16CP596 Tape & Reel SO-24 MECHANICAL DATA mm. DIM. MIN. A C D N T Ao Bo Ko Po P 10.8 15.7 2.9 3.9 11.9 12.8 20.2 60 30.4 11.0 15.9 3.1 4.1 12.1 0.425 0.618 0.114 0.153 0.468 TYP MAX. 330 13.2 0.504 0.795 2.362 1.197 0.433 0.626 0.122 0.161 0.476 MIN. TYP. MAX. 12.992 0.519 inch 15/18 STP16CP596 Tape & Reel TSSOP24 MECHANICAL DATA mm. DIM. MIN. A C D N T Ao Bo Ko Po P 6.8 8.2 1.7 3.9 11.9 12.8 20.2 60 22.4 7 8.4 1.9 4.1 12.1 0.268 0.323 0.067 0.153 0.468 TYP MAX. 330 13.2 0.504 0.795 2.362 0.882 0.276 0.331 0.075 0.161 0.476 MIN. TYP. MAX. 12.992 0.519 inch 16/18 STP16CP596 Table 10: Revision History Date 08-Apr-2005 02-May-2005 25-Jul-2005 Revision 1 2 3 Description of Changes First Release. Typing Error on the description features. Add note on Fig. 1 and Table 5. 17/18 STP16CP596 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics All other names are the property of their respective owners (c) 2005 STMicroelectronics - All Rights Reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com 18/18 |
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