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Micrel, Inc. Precision Edge 2.5V/3.3V TWO INPUT, 1GHz LVTTL/CMOSSY89834U Precision Edge(R) TO-LVPECL 1:4 FANOUT BUFFER/ SY89834U TRANSLATOR WITH 2:1 INPUT MUX (R) FEATURES s Selects between two LVTTL/CMOS inputs and provides 4 LVPECL output copies s Guaranteed AC performance over temperature and voltage: * DC-to >1.0GHz throughput * <500ps propagation delay (IN-to-Q) * < 20ps within-device skew * < 225ps rise/fall time s Ultra-low jitter design: * < 1psRMS cycle-to-cycle jitter * < 1psRMS random jitter * < 10psPP deterministic jitter * < 10psPP total jitter (clock) s Low voltage 2.5V and 3.3V supply operation s 100K LVPECL outputs s Industrial temperature range: -40C to +85C s Includes a 2:1 MUX select input s Accepts single-ended TTL/CMOS inputs and provides four LVPECL outputs s Available in 16-pin (3mm x 3mm) MLFTM package Precision Edge(R) DESCRIPTION The SY89834U is a high-speed, 1GHz LVTTL/CMOS-toLVPECL fanout buffer/translator optimized for high-speed ultra-low skew applications. The input stage is designed to accept two single-ended LVTTL/CMOS compatible signals that feed into a 2:1 MUX. The selected input is translated and distributed as four differential 100K LVPECL outputs. Within device skew is guaranteed to be less than 20ps over supply voltage and temperature. The single-ended input buffers accept TTL/CMOS logic levels. The internal threshold of the buffers is defined as VCC/2. The SY89834U is a part of Micrel's high-speed Precision Edge(R) family. For applications that require a different I/O combination, consult Micrel's website at: www.micrel.com, and choose from a comprehensive product line of highspeed, low-skew fanout buffers, translators and clock generators. APPLICATIONS s s s s s Processor clock distribution/translation SONET clock distribution/translation Fibre Channel clock distribution/translation Gigabit Ethernet clock distribution/translation Single-ended ASIC-to-differential communication IC signal translation FUNCTIONAL BLOCK DIAGRAM 1:4 Q0 /Q0 SEL (LVTTL/CMOS) Q1 IN1 (LVTTL/CMOS) /Q1 1 MUX 0 IN2 (LVTTL/CMOS) EN LVTTL/CMOS) D Q Q2 /Q2 Q3 /Q3 Precision Edge is a registered trademark of Micrel, Inc. MicroLeadFrame and MLF are trademarks of Amkor Technology, Inc. August 2005 1 M9999-080505 hbwhelp@micrel.com or (408) 955-1690 Micrel, Inc. Precision Edge(R) SY89834U PACKAGE/ORDERING INFORMATION VCC GND /Q0 Q0 Ordering Information(1) 12 11 10 9 16 15 14 13 Q1 /Q1 Q2 /Q2 1 2 3 4 5 6 7 8 IN1 SEL NC IN2 Part Number SY89834UMI SY89834UMITR(2) SY89834UMG(3) SY89834UMGTR(2, 3) Package Type MLF-16 MLF-16 MLF-16 MLF-16 Operating Range Industrial Industrial Industrial Industrial Package Marking 834U 834U 834U with Pb-Free bar line indicator 834U with Pb-Free bar line indicator Lead Finish Sn-Pb Sn-Pb NiPdAu Pb-Free NiPdAu Pb-Free /Q3 Q3 VCC EN 16-Pin MLFTM (MLF-16) Notes: 1. Contact factory for die availability. Dice are guaranteed at TA = 25C, DC Electricals only. 2. Tape and Reel. 3. Pb-Free package is recommended for new designs. PIN DESCRIPTION Pin Number 15, 16 1, 2, 3, 4, 5, 6 8 Pin Name Q0, /Q0 Q1, /Q1 Q2, /Q2 Q3, /Q3 EN Pin Function Differential 100K LVPECL Outputs: These LVPECL outputs are the precision, low skew copies of the inputs. Please refer to the "Truth Table" section for details. Unused output pairs may be left open. Terminate wtih 50 to VCC-2V. See "Output Termination Recommendations" section for more details. This single-ended TTL/CMOS-compatible input functions as a synchronous output enable. The synchronous enable ensures that enable/disable will only occur when the outputs are in a logic LOW state. Note that this input is internally connected to a 25k pull-up resistor and will default to logic HIGH state (enabled) if left open. Single-ended TTL/CMOS-compatible inputs to the device. These inputs are internally connected to a 25k pull-up resistor and will default to logic HIGH state if left open. The input threshold is VCC/2. No connect. Not internally connected. TTL/CMOS Compatible Select Input for signals IN1 and IN2. The input threshold is VCC/2. HIGH at the SEL input selects signal IN1. LOW at the SEL input selects signal IN2. SEL includes a 25k pull-up resistor. The default state is HIGH when left floating. Ground. GND pins and exposed pad must be connected to the most negative potential of the device ground. Positive Power Supply: Bypass with 0.1F//0.01F low ESR capacitors and place as close to each VCC pin as possible. 12, 9 10 11 IN1 IN2 NC SEL 13 7, 14 GND VCC TRUTH TABLE IN1 0 1 X X X IN2 X X 0 1 X EN 1 1 1 1 0 SEL 1 1 0 0 X Q0-Q3 0 1 0 1 0(1) /Q0-Q3 1 0 1 0 0(1) Note: 1. On next negative transition of the input signal (IN). M9999-080505 hbwhelp@micrel.com or (408) 955-1690 2 Micrel, Inc. Precision Edge(R) SY89834U Absolute Maximum Ratings(1) Supply Voltage (VCC) .................................. -0.5V to +4.0V Input Voltage (VIN) ............................... -0.5V to VCC +0.3V LVPECL Output Current (IOUT) Continuous ............................................................. 50mA Surge .................................................................... 100mA Input Current (IN1, IN2) ............................................ 50mA Lead Temperature (Soldering, 20sec.), ................... 260C Storage Temperature (TS) ....................... -65C to +150C Operating Ratings(2) Supply Voltage Range ........................ +2.375V to +2.625V ............................................................ +3.0V to +3.6V Ambient Temperature (TA) ......................... -40C to +85C Package Thermal Resistance(3) MLFTM (JA) Still-Air ............................................................. 60C/W MLFTM (JB) Junction-to-Board ............................................ 32C/W DC ELECTRICAL CHARACTERISTICS(4) TA = -40C to +85C, unless otherwise stated. Symbol VCC ICC Parameter Power Supply Power Supply Current No load, max. VCC. Condition Min 2.375 3.0 50 Typ Max 2.625 3.6 75 Units V V mA LVTTL/CMOS INPUTS DC ELECTRICAL CHARACTERISTICS(4) VCC = 2.5V 5% or VCC = 3.3V 10%; TA = -40C to +85C, unless otherwise stated. Symbol VIH VIL IIH IIL Parameter Input HIGH Voltage Input LOW Voltage Input HIGH Current Input LOW Current IIH @ VIN = 2.7V -125 -125 Condition Min 2.0 0.8 30 Typ Max Units V V A A (100KEP) LVPECL OUTPUTS DC ELECTRICAL CHARACTERISTICS(4) VCC = 2.5V 5% or VCC = 3.3V 10% , RL = 50 to VCC-2V; TA = -40C to +85C, unless otherwise stated. Symbol VOH VOL VOUT VDIFF_OUT Parameter Output HIGH Voltage Output LOW Voltage Output Voltage Swing Differential Output Voltage Swing See Figures 2a. See Figures 2b. Condition Min Typ Max Units V V mV mV VCC-1.145 VCC-1.020 VCC-0.895 VCC-1.945 VCC-1.820 VCC-1.695 550 1100 800 1600 1050 2100 Notes: 1. Permanent device damage may occur if absolute maximum ratings are exceeded. This is a stress rating only and functional operation is not implied at conditions other than those detailed in the operational sections of this data sheet. Exposure to absolute maximum ratlng conditions for extended periods may affect device reliability. 2. The data sheet limits are not guaranteed if the device is operated beyond the operating ratings. 3. Junction-to-board resistance assumes exposed pad is soldered (or equivalent) to the device's most negative potential on the PCB. JA and JB values are determined for a 4-layer board in still-air, unless otherwise stated. 4. The circuit is designed to meet the DC specifications shown in the above table after thermal equilibrium has been established. 3 M9999-080505 hbwhelp@micrel.com or (408) 955-1690 Micrel, Inc. Precision Edge(R) SY89834U AC ELECTRICAL CHARACTERISTICS(5) VCC = 2.5V 5% or VCC = 3.3V 10% , RL = 50 to VCC-2V; TA = -40C to +85C, unless otherwise stated. Symbol fMAX tpd tSW tSKEW tJITTER Parameter Maximum Frequency Propagation Delay Switchover Time Within-Device Skew Part-to-Part Skew Data Random Jitter (RJ) Deterministic Jitter (DJ) Clock Cycle-to-Cycle Jitter Total Jitter (TJ) DC tS tH tr, tf Notes: 5. 6. 7. 8. 9. High-frequency AC parameters are guaranteed by design and characterization. VIH = 2.0V, VIL = 0.8V, 50% duty cycle. Delay measured at 100MHz from the crossing of the input signal with VCC/2 as the crossing of the differential output signal. See Figure 1. Within device skew is measured between two different outputs under identical input transitions. Part-to-part skew is defined for two parts with identical power supply voltages at the same temperature and no skew at the edges at the respective inputs. Random jitter is measured with a K28.7 pattern, measured at fMAX. Condition Input tr / tf 350ps IN-to-Q SEL-to-Q Note 7 Note 8 Note 9 Note 10 Note 11 Note 12 Input tr/tf 350ps, Note 13 EN to IN1, IN EN to IN1, IN Note 14 and Note 15 Note 14 and Note 15 Note 6 Min 1.0 200 200 Typ Max Units GHz 320 320 5 500 500 20 300 1 10 1 10 ps ps ps ps psRMS psPP psRMS psPP % ps ps Duty Cycle Set-Up Time Hold Time 45 300 500 70 50 55 Output Rise/Fall Times (20% to 80%) 140 225 ps 10. Deterministic jitter is measured at 2.5Gbps with both K28.5 and 223-1 PRBS pattern. 11. Cycle-to-cycle jitter definition: The variation period between adjacent cycles over a random sample of adjacent cycle pairs. TJITTER_CC = Tn - Tn+1, where T is the time between rising edges of the output signal. 12. Total jitter definition: with an ideal clock input frequency of fMAX (device), no more than one output edge in 1012 output edges will deviate by more than the specified peak-to-peak jitter value. 13. If tr/tf is less than 350ps, the duty cycle distortion will increase beyond the duty cycle limits. 14. Set-up and hold times apply to synchronous applications that intend to enable/disable before the next clock cycle. For asynchronous applications set-up and hold times do not apply. 15. See "Timing Diagrams," Figure 1a. 4 M9999-080505 hbwhelp@micrel.com or (408) 955-1690 Micrel, Inc. Precision Edge(R) SY89834U TIMING DIAGRAMS EN VCC/2 tS VIN IN VCC/2 tpd VCC/2 VCC/2 VCC/2 tpd VOUT tH VCC/2 /Q Q Figure 1a. Timing Diagram (EN, IN1, IN2) IN2 IN1 HIGH LOW SEL VCC/2 /Q Q tSWITCHOVER VCC/2 tSWITCHOVER VOUT Figure 1b. Timing Diagram (SEL) SINGLE-ENDED AND DIFFERENTIAL SWINGS VOUT V DIFF_OUT Figure 2a. Single-Ended Swing Figure 2b. Differential Swing 5 M9999-080505 hbwhelp@micrel.com or (408) 955-1690 Micrel, Inc. Precision Edge(R) SY89834U TYPICAL OPERATING CHARACTERISTICS VCC = 3.3V, GND = 0V, RL = 50 to VCC-2V; TA = 25C, unless otherwise stated. 800 OUTPUT SWING (mV) 700 600 500 400 300 200 100 0 0 Output Swing vs. Frequency PROPAGATION DELAY (ps) 400 380 360 340 320 300 280 260 240 Propagation Delay vs. Temperature 0.5 1 1.5 2 2.5 FREQUENCY (GHz) 3 220 200 -50 -30 -10 10 30 50 70 TEMPERATURE (C) 90 6 M9999-080505 hbwhelp@micrel.com or (408) 955-1690 Micrel, Inc. Precision Edge(R) SY89834U FUNCTIONAL CHARACTERISTICS VCC = 3.3V, GND = 0V, RL = 50 to VCC-2V, TA = 25C, unless otherwise stated. 155MHz Output 622MHz Output 275mV Offset (150mV/div.) TIME (1ns/div.) 300mV Offset (150mV/div.) TIME (321.9ps/div.) 1GHz Output 300mV Offset (150mV/div.) TIME (200ps/div.) 7 M9999-080505 hbwhelp@micrel.com or (408) 955-1690 Micrel, Inc. Precision Edge(R) SY89834U DIFFERENTIAL INPUT VCC 25k IN1 IN2 SEL EN R R GND Figure 3. Simplified TTL/CMOS Input Buffer RELATED PRODUCTS AND SUPPORT DOCUMENTATION Part Number SY89830U SY89831U SY89832U SY89833U Function 2.5V/3.3V/5V 2.5GHz 1:4 PECL/ECL Clock Driver with 2:1 Differential Input Mux Ultra-Precision 1:4 LVPECL Fanout Buffer/ Translator with Internal Termination 2.5V Ultra-Precision 1:4 LVDS Fanout Buffer/ Translator with Internal Termination 3.3V Ultra-Precision 1:4 LVDS Fanout Buffer/ Translator with Internal Termination 16-MLFTM Manufacturing Guidelines Exposed Pad Application Note HBW Solutions New Products + Termination App Note Data Sheet Link http://www.micrel.com/product-info/products/sy89830u.shtml http://www.micrel.com/product-info/products/sy89831u.shtml http://www.micrel.com/product-info/products/sy89832u.shtml http://www.micrel.com/product-info/products/sy89833u.shtml http://www.amkor.com/products/notes-papers/ MLF-appnote-0301.pdf http://www.micrel.com/product-info/as/solutions.shtml 8 M9999-080505 hbwhelp@micrel.com or (408) 955-1690 Micrel, Inc. Precision Edge(R) SY89834U TERMINATION RECOMMENDATIONS +3.3V +3.3V ZO = 50 ZO = 50 R1 130 R1 130 +3.3V R2 82 R2 82 Vt = VCC --2V Figure 4a. Parallel Termination-Thevenin Equivalent Note: 1. For +2.5V systems: R1 = 250, R2 = 62.5 For +3.3V systems: R1 = 130, R2 = 82 +3.3V Z = 50 Z = 50 VCC +3.3V "source" 50 50 50 Rb "destination" C1 0.01F (optional) Figure 4b. Three-Resistor "Y-Termination" Notes: 1. Power-saving alternative to Thevenin termination. 2. Place termination resistors as close to destination inputs as possible. 3. Rb resistor sets the DC bias voltage, equal to Vt. For +3.3V systems Rb = 50. For +2.5V systems Rb = 19. +3.3V R1 130 ZO = 50 /Q Vt = VCC --2V R2 82 +3.3V R1 130 Vt = VCC --1.3V R3 +3.3V 1k +3.3V Q R4 1.6k R2 82 Figure 4c. Terminating Unused LVPECL I/O Notes: 1. Unused output (/Q) must be terminated to balance the output. 2. For +2.5V systems: R1 = 250, R2 = 62.5, R3 = 1.25k, R4 = 1.2k. 2. Unused output pairs (Q and /Q) may be left floating. 9 M9999-080505 hbwhelp@micrel.com or (408) 955-1690 Micrel, Inc. Precision Edge(R) SY89834U 16 LEAD EPAD MicroLeadFrameTM (MLF-16) Package EP- Exposed Pad Die CompSide Island Heat Dissipation Heat Dissipation VEE Heavy Copper Plane VEE Heavy Copper Plane PCB Thermal Consideration for 16-Pin MLFTM Package (Always solder, or equivalent, the exposed pad to the PCB.) Package Notes: Note 1. Note 2. Package meets Level 2 moisture sensitivity classification, and are shipped in dry-pack form. Exposed pads must be soldered to a ground for proper thermal management. MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 TEL USA + 1 (408) 944-0800 FAX + 1 (408) 474-1000 WEB http://www.micrel.com The information furnished by Micrel in this datasheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for its use. Micrel reserves the right to change circuitry and specifications at any time without notification to the customer. Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser's use or sale of Micrel Products for use in life support appliances, devices or systems is at Purchaser's own risk and Purchaser agrees to fully indemnify Micrel for any damages resulting from such use or sale. (c) 2005 Micrel, Incorporated. 10 M9999-080505 hbwhelp@micrel.com or (408) 955-1690 |
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